CN109301031A - The production method of N-type double-side cell - Google Patents
The production method of N-type double-side cell Download PDFInfo
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- CN109301031A CN109301031A CN201811062226.9A CN201811062226A CN109301031A CN 109301031 A CN109301031 A CN 109301031A CN 201811062226 A CN201811062226 A CN 201811062226A CN 109301031 A CN109301031 A CN 109301031A
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 14
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 31
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 31
- 239000010703 silicon Substances 0.000 claims abstract description 31
- 238000000034 method Methods 0.000 claims abstract description 23
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical compound [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims abstract description 21
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims abstract description 16
- 229910052698 phosphorus Inorganic materials 0.000 claims abstract description 16
- 239000011574 phosphorus Substances 0.000 claims abstract description 16
- 235000008216 herbs Nutrition 0.000 claims abstract description 13
- 210000002268 wool Anatomy 0.000 claims abstract description 13
- 230000008569 process Effects 0.000 claims abstract description 9
- 238000005245 sintering Methods 0.000 claims abstract description 8
- 229910052581 Si3N4 Inorganic materials 0.000 claims abstract description 7
- 238000007747 plating Methods 0.000 claims abstract description 7
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims abstract description 7
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims abstract description 6
- 229910052796 boron Inorganic materials 0.000 claims abstract description 6
- 238000009792 diffusion process Methods 0.000 claims abstract description 6
- 239000002002 slurry Substances 0.000 claims abstract description 5
- RZVAJINKPMORJF-UHFFFAOYSA-N Acetaminophen Chemical compound CC(=O)NC1=CC=C(O)C=C1 RZVAJINKPMORJF-UHFFFAOYSA-N 0.000 claims abstract description 4
- 239000005297 pyrex Substances 0.000 claims abstract description 4
- 238000000151 deposition Methods 0.000 claims description 9
- 230000008021 deposition Effects 0.000 claims description 6
- 239000011521 glass Substances 0.000 claims description 6
- 238000004140 cleaning Methods 0.000 claims description 3
- 239000011248 coating agent Substances 0.000 claims description 3
- 238000000576 coating method Methods 0.000 claims description 3
- 238000012544 monitoring process Methods 0.000 claims description 3
- 230000003247 decreasing effect Effects 0.000 claims 1
- 238000005516 engineering process Methods 0.000 description 3
- 239000013078 crystal Substances 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 238000007792 addition Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 230000004660 morphological change Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Formation Of Insulating Films (AREA)
- Chemically Coating (AREA)
- Photovoltaic Devices (AREA)
Abstract
The invention discloses a kind of production methods of N-type double-side cell, comprising: S1, silicon wafer remove damaging layer SDE；The low surface concentration phosphorus diffusion of S2, silicon chip back side；S3, PSG layers of outer plating SINx film；S4, front side of silicon wafer making herbs into wool；S5, it is promoted for a long time using boron expander progress high temperature；S6, the positive Pyrex BSG of removal；S7, front generate aluminium oxide ALD+ silicon nitride SINx；S8, printing and sintering: it chooses the preferable slurry of contact performance and matches sintering temperature simultaneously.The present invention reduces cell piece removal PSG and the step of thermal oxide, reduce battery process flow and it is required remove PSG board and thermal oxide board, and then production cost greatly reduces.
Description
Technical field
The present invention relates to a kind of N-type solar cell manufacture craft, the production method of specifically a kind of N-type double-side cell.
Background technique
P-type crystal silicon battery occupies the absolute share in market at present.However, constantly pursuing improved efficiency and cost reduction is light
Lie prostrate the eternal theme of industry.N type single crystal silicon has many advantages, such as minority carrier life time height compared with conventional single, and photo attenuation is small, has bigger
Improved efficiency space, while there is N-type mono-crystal component dim light to respond, the advantages such as temperature coefficient is low.Therefore, N-type monocrystalline system
Uniting has the double dominant of generated energy height and high reliablity.The manufacture craft of N-type cell is more compared with p-type technique process, and the time is long, at
This is higher, and how to reduce cost is the key that N-type cell production.
Summary of the invention
The present invention is directed to the problem of background technique, proposes the N-type that a kind of process is few, the process time is short, at low cost
The production method of double-side cell.
Technical solution
Method includes the following steps:
S1, silicon wafer go damaging layer；
The low surface concentration phosphorus diffusion of S2, silicon chip back side generates PSG layers；
S3, PSG layers of outer plating SINx film, SINx film thickness monitoring is in 80~90nm；
S4, front side of silicon wafer making herbs into wool；
S5, it is promoted for a long time using boron expander progress high temperature, the P content in PSG layers persistently reduces, and PSG layers are become
SIO2 layers；
S6, the positive Pyrex BSG of removal；
S7, front generate aluminium oxide ALD+ silicon nitride SINx；
S8, printing and sintering: it chooses the preferable slurry of contact performance and matches sintering temperature simultaneously.
Specifically, thickness thinning is controlled in 8-9um, Reducing thickness in 0.45-0.5g in step S1.
In step S2, silicon chip back side, which is used, obtains lower surface concentration, tool by reducing phosphorus source amount and two step low temperature depositings
Body:
Phosphorus source amount is reduced to 100sccm from 188sccm；
- 750 DEG C of deposition 10min；
- 780 DEG C of deposition 8min；
By aforesaid operations, raw PSG layer sheet resistance is increased to 95ohm from 80ohm；Phosphorus in phosphorosilicate glass PSG simultaneously
Content reduces.
Specifically, in step S3, SINx film thickness 85nm.
Specifically, the control of making herbs into wool Reducing thickness is within 0.3g during front side of silicon wafer making herbs into wool in step S4.
Specifically, front side of silicon wafer making herbs into wool cross Cheng Qian there are one HF cleaning process, production when removing back side coating film
Edge current leakage is reduced around plating in raw front.
Specifically, it is for a long time 2h that the high temperature, which is 1000 DEG C, in step S5；By the operation, in phosphorosilicate glass PSG
Phosphorus concentration further decrease, reduce the surface concentration of front side of silicon wafer and increase junction depth, surface concentration is reduced to 1E19cm-3,
Junction depth increases to 1.2um.
Specifically, in step S7, aluminium oxide ALD thickness 6nm, front side silicon nitride silicon SINx are with a thickness of 78nm, refractive index
2.07。
Beneficial effects of the present invention
Present invention employs the phosphoric diffusion technologies of low surface concentration, so that the P content in silicon chip surface and PSG is very low, then
One layer of SINx film is plated on PSG, is carried out high temperature using boron expander and is promoted for a long time, so that the P in PSG continues to reduce, finally
So that the step of becoming the few SIO2 layer of P content in PSG, reducing cell piece removal PSG and thermal oxide, reduces battery
Process flow and it is required remove PSG board and thermal oxide board, and then production cost greatly reduces.
Detailed description of the invention
Fig. 1 is flow chart of the present invention.
Fig. 2 is silicon wafer morphologic change schematic diagram after step S2 of the present invention and step S5.
Specific embodiment
Below with reference to embodiment, the invention will be further described, and but the scope of the present invention is not limited thereto:
In conjunction with Fig. 1, a kind of production method of N-type double-side cell, method includes the following steps:
S1, silicon wafer remove damaging layer SDE；In the present embodiment, thickness thinning is controlled in 8-9um, Reducing thickness in 0.45-0.5g.
The low surface concentration phosphorus diffusion of S2, silicon chip back side generates PSG layers,；Silicon chip back side is used by reducing phosphorus source amount and two
It walks low temperature depositing and obtains lower surface concentration, as shown in Fig. 2, specifically:
Phosphorus source amount is reduced to 100sccm from 188sccm；
- 750 DEG C of deposition 10min；
- 780 DEG C of deposition 8min；
By aforesaid operations, raw PSG layer sheet resistance is increased to 95ohm from 80ohm；Phosphorus in phosphorosilicate glass PSG simultaneously
Content reduces.
S3, PSG layers of outer plating SINx film, SINx film thickness monitoring is in 80~90nm；In the present embodiment, SINx film thickness 85nm.
S4, front side of silicon wafer making herbs into wool；In the present embodiment, during front side of silicon wafer making herbs into wool making herbs into wool Reducing thickness control 0.3g with
It is interior.In other embodiments, front side of silicon wafer making herbs into wool cross Cheng Qian there are one HF cleaning process, when removing back side coating film
Edge current leakage is reduced around plating in the front of generation.
S5, it is promoted for a long time using boron expander progress high temperature, the P content in PSG layers persistently reduces, and PSG layers are become
SIO2 layers；In the present embodiment, it is for a long time 2h that the high temperature, which is 1000 DEG C,；As shown in Fig. 2, by the operation, phosphorosilicate glass
Phosphorus concentration in PSG further decreases, and the surface concentration and increase junction depth, surface concentration of front side of silicon wafer are reduced to 1E19cm-3, knot
Increase to 1.2um deeply.
S6, the positive Pyrex BSG of removal；
S7, front generate aluminium oxide ALD+ silicon nitride SINx；In the present embodiment, aluminium oxide ALD thickness 6nm, front side silicon nitride
Silicon SINx is with a thickness of 78nm, refractive index 2.07.
S8, printing and sintering: it chooses the preferable slurry of contact performance and matches sintering temperature simultaneously；Front uses He man of great strength
9642 slurries, peak temperature are 780 DEG C；The back side uses Du Pont C7980, and peak temperature is 780 DEG C.
Present invention employs the phosphoric diffusion technologies of low surface concentration, so that the P content in silicon chip surface and PSG is very low, then
One layer of SINx film is plated on PSG, is carried out high temperature using boron expander and is promoted for a long time, so that the P in PSG continues to reduce, finally
So that the step of becoming the few SIO2 layer of P content in PSG, reducing cell piece removal PSG and thermal oxide, reduces battery
Process flow and it is required remove PSG board and thermal oxide board, and then production cost greatly reduces.
Specific embodiment described herein is only to illustrate to spirit of that invention.The neck of technology belonging to the present invention
The technical staff in domain can make various modifications or additions to the described embodiments or replace by a similar method
In generation, however, it does not deviate from the spirit of the invention or beyond the scope of the appended claims.
Claims (8)
1. a kind of production method of N-type double-side cell, it is characterised in that method includes the following steps:
S1, silicon wafer remove damaging layer SDE；
The low surface concentration phosphorus diffusion of S2, silicon chip back side generates PSG layers；
S3, PSG layers of outer plating SINx film, SINx film thickness monitoring is in 80~90nm；
S4, front side of silicon wafer making herbs into wool；
S5, it is promoted for a long time using boron expander progress high temperature, the P content in PSG layers persistently reduces, and becomes SIO2 for PSG layers
Layer；
S6, the positive Pyrex BSG of removal；
S7, front generate aluminium oxide ALD+ silicon nitride SINx；
S8, printing and sintering: it chooses the preferable slurry of contact performance and matches sintering temperature simultaneously.
2. according to the method described in claim 1, it is characterized in that thickness thinning exists in 8-9um, Reducing thickness control in step S1
0.45-0.5g。
3. according to the method described in claim 1, it is characterized in that in step S2, silicon chip back side use by reduce phosphorus source amount and
Two step low temperature depositings obtain lower surface concentration, specific:
Phosphorus source amount is reduced to 100sccm from 188sccm；
- 750 DEG C of deposition 10min；
- 780 DEG C of deposition 8min；
By aforesaid operations, raw PSG layer sheet resistance is increased to 95ohm from 80ohm；Phosphorus content in phosphorosilicate glass PSG simultaneously
It reduces.
4. according to the method described in claim 1, it is characterized in that in step S3, SINx film thickness 85nm.
5. according to the method described in claim 1, it is characterized in that in step S4, making herbs into wool Reducing thickness during front side of silicon wafer making herbs into wool
Control is within 0.3g.
6. according to the method described in claim 5, it is characterized in that crossing Cheng Qian in front side of silicon wafer making herbs into wool, there are one HF cleanings
Edge current leakage is reduced around plating in process, the front generated when removing back side coating film.
7. according to the method described in claim 1, it is characterized in that it is for a long time 2h that the high temperature, which is 1000 DEG C, in step S5；
By the operation, the phosphorus concentration in phosphorosilicate glass PSG is further decreased, and is reduced the surface concentration of front side of silicon wafer and is increased knot
Deep, surface concentration is reduced to 1E19cm-3, junction depth increases to 1.2um.
8. according to the method described in claim 1, it is characterized in that in step S7, aluminium oxide ALD thickness 6nm, front side silicon nitride silicon
SINx is with a thickness of 78nm, refractive index 2.07.
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| CN201811062226.9A CN109301031B (en) | 2018-09-12 | 2018-09-12 | Manufacturing method of N-type double-sided battery |
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| CN201811062226.9A CN109301031B (en) | 2018-09-12 | 2018-09-12 | Manufacturing method of N-type double-sided battery |
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| CN109301031B CN109301031B (en) | 2021-08-31 |
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Cited By (1)
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|---|---|---|---|---|
| CN110299434A (en) * | 2019-07-17 | 2019-10-01 | 浙江晶科能源有限公司 | A kind of production method of N-type double-side cell |
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Effective date of registration: 20230901 Address after: 226000 No. 222 Linyang Road, Nantong Economic and Technological Development Zone, Jiangsu Province Patentee after: Jiangsu Linyang Solar Energy Co.,Ltd. Address before: No. 612, Huashi Road, Huilong Town, Qidong City, Nantong City, Jiangsu Province 226200 Patentee before: JIANGSU LINYANG PHOTOVOLTAIC TECHNOLOGY CO.,LTD. |