CN109300448A - Level switch module and signal conversion method - Google Patents
Level switch module and signal conversion method Download PDFInfo
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- CN109300448A CN109300448A CN201811550482.2A CN201811550482A CN109300448A CN 109300448 A CN109300448 A CN 109300448A CN 201811550482 A CN201811550482 A CN 201811550482A CN 109300448 A CN109300448 A CN 109300448A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
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Abstract
The present invention provides a kind of level switch module and signal conversion method.Level switch module of the invention includes clock signal output unit, phase inverter, single-pole double-throw switch (SPDT) and initial signal output unit, when work, utilize the current potential of input initial signal pull-up output initial signal, so that the rising edge of output initial signal arrives when the rising edge of input initial signal arrives, the current potential of clock signal drop-down output initial signal is exported using N/2 (N is positive even numbers) articles, so that the failing edge of output initial signal arrives when the rising edge for exporting clock signal at the N/2 articles arrives, the high level width of output initial signal is enabled to meet timing requirements, it can guarantee that GOA circuit works normally when applied to GOA circuit.
Description
Technical field
The present invention relates to field of display technology more particularly to a kind of level switch modules and signal conversion method.
Background technique
With the development of display technology, the planes such as liquid crystal display device (Liquid Crystal Display, LCD) are shown
Device is widely used in mobile phone, TV, individual because having many advantages, such as that high image quality, power saving, fuselage is thin and has a wide range of application
The various consumer electrical products such as digital assistants, digital camera, laptop, desktop computer, become in display device
Mainstream.
In active liquid crystal display device, each pixel is electrically connected a thin film transistor (TFT) (TFT), thin film transistor (TFT)
Grid (Gate) is connected to horizontal scanning line, and source electrode (Source) is connected to the data line of vertical direction, and drain electrode (Drain) then connects
It is connected to pixel electrode.Apply enough voltage on horizontal scanning line, can be electrically connected on this horizontal scanning line
All TFT are opened, thus the signal voltage on data line can writing pixel, control the different light transmittances of liquid crystal and then reach control
The effect of color processed and brightness.
The driving of current active liquid crystal display panel horizontal scanning line is mainly by external integrated circuit board
(Integrated Circuit, IC) is completed, and external IC can control the charging and discharging step by step of horizontal scanning lines at different levels.
And GOA technology (Gate Driver on Array) i.e. array substrate row actuation techniques, liquid crystal display panel can be used
Gate driving circuit is produced on tft array substrate by array process, realizes the driving method progressively scanned to grid.GOA electricity
Several clock signals of access and initial signal are generally required in road, to realize the function of its grid progressive scan.In the prior art,
Original clock signal and original initial signal usually are exported using sequence controller (Tcon) and are transmitted to level switch module
(level shifter) carries out boosting by level switch module and generates output clock signal and output initial signal and output extremely
In the GOA circuit of liquid crystal display panel.
Start successively after the rising edge of the output initial signal of current level conversion unit output through preset duration
Multiple output clock signals are exported, and generally require the failing edge for meeting output initial signal and the n-th/2 output clock letter
Number rising edge occur simultaneously, n is positive even numbers.Referring to Fig. 1, exporting initial signal by taking four output clock signals as an example
After the rising edge of STVout after the high level duration of 1/2 times of output initial signal STVout first output clock signal
CLKout1, the second output clock signal clk out2, the third output clock signal of output clock signal clk out3 and the 4th
First rising edge of CLKout4 is sequentially generated, the first output clock signal clk out1, the second output clock signal
CLKout2, third output clock signal clk out3 and the 4th export phase between first rising edge of clock signal clk out4
The high level duration of poor 1/2 times of output initial signal STVout, in first rising of the second output clock signal clk out2
Failing edge along output initial signal STVout when arriving arrives.The output initial signal exported by level switch module
The width for the original initial signal that width follows sequence controller to transmit, when needing to provide a fairly large number of output clock signal
When, original initial signal the case where there are width wretched insufficiencies, leads to the width wretched insufficiency for exporting initial signal, be unable to satisfy
The rising edge that its failing edge exports clock signal with the N/2 occurs simultaneously, will lead to GOA failure, the problem of reliability occurs.
Summary of the invention
The purpose of the present invention is to provide a kind of level switch modules, enable to the high level width of output initial signal
Meet timing requirements.
Another object of the present invention is to provide a kind of signal conversion methods, enable to the high level of output initial signal
Width meets timing requirements.
To achieve the above object, present invention firstly provides a kind of level switch module, including it is clock signal output unit, anti-
Phase device, single-pole double-throw switch (SPDT) and initial signal output unit;
The clock signal output unit is used to export the output clock signal of N pulse, and N item exports clock signal respectively
First rising edge be sequentially generated;Wherein, N is positive even numbers;
The input terminal of the phase inverter is electrically connected clock signal output unit, accesses the in N articles of output clock signal
N/2 item exports clock signal, and output end is electrically connected the first movable contact of single-pole double-throw switch (SPDT);
The second movable contact access input initial signal of the single-pole double-throw switch (SPDT), stationary contact export intermediate initial signal extremely
Initial signal output unit, control terminal are electrically connected stationary contact;The single-pole double-throw switch (SPDT) will when its control terminal is high potential
Stationary contact is connect with the first movable contact, connect stationary contact with the second movable contact when its control terminal is low potential;The input
The rising edge of initial signal produces before first rising edge of first output clock signal in N item output clock signal
It is raw;
The initial signal output unit generates output initial signal after being used to carry out intermediate initial signal boosting processing;
It is described output initial signal the high potential period and the low potential period respectively with the high potential period of the intermediate initial signal and
The low potential period is corresponding.
The clock signal output unit accesses the N item provided by sequence controller for being electrically connected sequence controller
Input clock signal, the clock signal output unit to N input clock signal export after boosting processing respectively with N item
The corresponding N item of input clock signal exports clock signal.
Each export clock signal the high potential period and the low potential period respectively with corresponding input clock signal
High potential period and low potential period are corresponding.
The input initial signal is provided by the sequence controller.
The period of N item output clock signal and duty ratio are all the same.
Interval between respective first rising edge of any two adjacent output clock signals is a preset duration.
N item export clock signal in first clock signal first rising edge and input initial signal rising edge it
Between between be divided into the preset duration.
When intermediate initial signal is high potential, the output initial signal is preset constant pressure high potential, this is preset
Constant pressure high potential is greater than the high potential of intermediate initial signal.
When intermediate initial signal is low potential, the output initial signal is identical as the low potential of intermediate initial signal
Low potential.
The present invention also provides a kind of signal conversion methods, include the following steps:
Step S1, above-mentioned level switch module is provided;
Step S2, the N/2 articles output clock signal is low potential, the input initial signal in N articles of output clock signal
For low potential, the control terminal of the intermediate initial signal and single-pole double-throw switch (SPDT) is low potential, and single-pole double-throw switch (SPDT) is by stationary contact
It is connect with the second movable contact so that intermediate initial signal and the control terminal of single-pole double-throw switch (SPDT) keep low potential, the output starting
Signal is low potential;
Step S3, the N/2 articles output clock signal is low potential in N articles of output clock signal, and the output end of phase inverter is
High potential, the input initial signal become high potential, and the control terminal of the intermediate initial signal and single-pole double-throw switch (SPDT) becomes
Stationary contact and the connection of the first movable contact are made the intermediate initial signal and single-pole double-throw switch (SPDT) by high potential, single-pole double-throw switch (SPDT)
Control terminal keeps high potential, and the output initial signal is preset constant pressure high potential;
Step S4, the N/2 articles output clock signal becomes high potential, the output end of phase inverter in N articles of output clock signal
Become low potential, the intermediate initial signal becomes low potential, and the output initial signal is low potential.
Beneficial effects of the present invention: level switch module of the invention includes clock signal output unit, phase inverter, hilted broadsword
Commutator and initial signal output unit, when work, using the current potential of input initial signal pull-up output initial signal, so that
The rising edge of output initial signal arrives when inputting the rising edge arrival of initial signal, utilizes N/2 (N is positive even numbers) articles to export
The current potential of clock signal drop-down output initial signal, so that the rising edge for exporting clock signal at the N/2 articles exports when arriving
The failing edge of beginning signal arrives, and enables to the high level width of output initial signal to meet timing requirements, is applied to GOA circuit
When can guarantee GOA circuit work normally.Signal conversion method of the invention enables to the high level of output initial signal wide
Degree meets timing requirements.
Detailed description of the invention
For further understanding of the features and technical contents of the present invention, it please refers to below in connection with of the invention detailed
Illustrate and attached drawing, however, the drawings only provide reference and explanation, is not intended to limit the present invention.
In attached drawing,
Fig. 1 is the output initial signal of existing level switch module and the waveform diagram for exporting clock signal;
Fig. 2 is the structural schematic diagram of level switch module of the invention;
Fig. 3 is the flow chart of signal conversion method of the invention;
Fig. 4 is the timing diagram of signal conversion method of the invention.
Specific embodiment
Further to illustrate technological means and its effect adopted by the present invention, below in conjunction with preferred implementation of the invention
Example and its attached drawing are described in detail.
Referring to Fig. 2, the present invention provides a kind of level switch module, including clock signal output unit 10, phase inverter 20,
Single-pole double-throw switch (SPDT) K and initial signal output unit 30.
The clock signal output unit 10 is used to export the output clock signal of N pulse, and it is each that N item exports clock signal
From first rising edge be sequentially generated.Wherein, N is positive even numbers, for example, can be 4,6,8.The output clock of the N pulse
Signal is exported into the GOA circuit of liquid crystal display panel to be progressively scanned for controlling GOA circuit.
The input terminal of the phase inverter 20 is electrically connected clock signal output unit 10, and access N item exports in clock signal
The N/2 articles output clock signal clk OUT-N/2, output end be electrically connected single-pole double-throw switch (SPDT) K the first movable contact.It is described
The second movable contact access input initial signal STV of single-pole double-throw switch (SPDT) K, stationary contact export intermediate initial signal STV1 and extremely originate
Signal output unit 30, control terminal are electrically connected stationary contact.The single-pole double-throw switch (SPDT) K will be quiet when its control terminal is high potential
Contact is connect with the first movable contact, connect stationary contact with the second movable contact when its control terminal is low potential;It is described to input
The rising edge of beginning signal STV produces before first rising edge of first output clock signal in N item output clock signal
It is raw.The initial signal output unit 30 generates output initial signal after being used to carry out intermediate initial signal STV1 boosting processing
STVOUT.It is described output initial signal STVOUT the high potential period and the low potential period respectively with the intermediate initial signal
The high potential period and low potential period of STV1 is corresponding.
Specifically, the clock signal output unit 10 is used to be electrically connected the sequence controller outside level switch module
9, the N input clock signal provided by sequence controller 9 is accessed, the clock signal output unit 10 is to N input clock
Signal exports N item output clock signal corresponding with N input clock signal respectively after carrying out boosting processing.When each exports
The high potential period and low potential period of clock signal respectively with the high potential period of corresponding input clock signal and low potential when
Section is corresponding.
Specifically, the input initial signal STV is provided by the sequence controller 9.
Specifically, the period of N item output clock signal and duty ratio are all the same.Any two adjacent output clock signals
Interval between respective first rising edge is a preset duration.N item exports first clock signal in clock signal
The preset duration is divided between first rising edge and the rising edge for inputting initial signal STV.
Specifically, when intermediate initial signal STV1 is high potential, the output initial signal STVOUT is preset perseverance
High potential is pressed, which is greater than the high potential of intermediate initial signal STV1.When intermediate initial signal STV1 is
When low potential, the output initial signal STVOUT is low potential identical with the low potential of intermediate initial signal STV1.
Incorporated by reference to Fig. 2 and Fig. 4, the course of work of level switch module of the invention is as follows:
The N/2 articles output clock signal clk OUT-N/2 is low potential in the initial stage, N articles of output clock signal, instead
The output end of phase device 20 is high potential, and the input initial signal STV is low potential, the intermediate initial signal STV1 and hilted broadsword
The control terminal of commutator K is low potential, and single-pole double-throw switch (SPDT) K connects stationary contact and the second movable contact so that intermediate starting is believed
The control terminal of number STV1 and single-pole double-throw switch (SPDT) K keeps the low potential of input initial signal STV, exports initial signal at this time
STVOUT is low potential.Then, the N/2 articles output clock signal clk OUT-N/2 keeps low potential in N articles of output clock signal,
The output end of phase inverter 20 remains high potential, and the input initial signal STV becomes high potential, incites somebody to action in single-pole double-throw switch (SPDT) K
In the case that stationary contact is still connect with the second movable contact, the control terminal of intermediate initial signal STV1 and single-pole double-throw switch (SPDT) K become
For high potential, so that stationary contact is connect by single-pole double-throw switch (SPDT) K with the first movable contact, the intermediate initial signal STV1 and hilted broadsword
The control terminal of commutator K keeps the high potential of the output end of phase inverter 20, at this point, the output initial signal STVOUT is pre-
If constant pressure high potential.Then, when in N articles of output clock signal the N/2 articles output clock signal clk OUT-N/2 become high electricity
Position, the output end of phase inverter 20 becomes low potential, in the feelings that stationary contact is still connect by single-pole double-throw switch (SPDT) K with the first movable contact
Under condition, the intermediate initial signal STV1 becomes low potential, and the output initial signal STVOUT is low potential.To this hair
Bright realize pulls up output initial signal STVOUT using input initial signal STV, so that input initial signal STV's is upper
The rising edge risen along output initial signal STVOUT when arriving arrives, and utilizes the N/2 articles output clock signal clk OUT-N/2
Output initial signal STVOUT is pulled down, so that the rising edge for exporting clock signal clk OUT-N/2 at the N/2 articles arrives
When output initial signal STVOUT failing edge arrive, no matter quantity how many item of output clock signal, exports initial signal
STVOUT is able to maintain high level up to the rising edge arrival of the N/2 articles output clock signal clk OUT-N/2, enables to
The high level width of output initial signal STVOUT meets timing requirements, can guarantee that GOA circuit is normal when applied to GOA circuit
Work.
Based on the same inventive concept, referring to Fig. 3, and combine Fig. 4, the present invention also provides a kind of signal conversion method, packet
Include following steps:
Step S1, referring to Fig. 2, above-mentioned level switch module is provided, herein no longer to the structure of level switch module
Carry out repeated description.
Step S2, the N/2 articles output clock signal clk OUT-N/2 is low potential, phase inverter in N articles of output clock signal
20 output end is high potential, and the input initial signal STV is low potential, the intermediate initial signal STV1 and single-pole double throw
The control terminal of switch K is low potential, and single-pole double-throw switch (SPDT) K connects stationary contact and the second movable contact so that intermediate initial signal
The control terminal of STV1 and single-pole double-throw switch (SPDT) K keep the low potential of input initial signal STV, export initial signal STVOUT at this time
For low potential.
Step S3, the N/2 articles output clock signal clk OUT-N/2 keeps low potential, reverse phase in N articles of output clock signal
The output end of device 20 remains high potential, and the input initial signal STV becomes high potential, in single-pole double-throw switch (SPDT) K by stationary contact
In the case that point is still connect with the second movable contact, the control terminal of intermediate initial signal STV1 and single-pole double-throw switch (SPDT) K become high
Current potential, so that stationary contact is connect by single-pole double-throw switch (SPDT) K with the first movable contact, the intermediate initial signal STV1 and single-pole double throw
The control terminal of switch K keeps the high potential of the output end of phase inverter 20, at this point, the output initial signal STVOUT is preset
Constant pressure high potential.
Step S4, the N/2 articles output clock signal clk OUT-N/2 becomes high potential in N articles of output clock signal, reverse phase
The output end of device 20 becomes low potential, in the case where stationary contact is still connect by single-pole double-throw switch (SPDT) K with the first movable contact, institute
Stating intermediate initial signal STV1 becomes low potential, and the output initial signal STVOUT is low potential.
It should be noted that signal conversion method of the invention can be realized utilization using above-mentioned level switch module
Input initial signal STV pulls up output initial signal STVOUT, when so that the rising edge of input initial signal STV arriving
The rising edge for exporting initial signal STVOUT arrives, and is originated using the N/2 articles output clock signal clk OUT-N/2 to output
Signal STVOUT is pulled down, so that output starting when the rising edge for exporting clock signal clk OUT-N/2 at the N/2 articles arrives
The failing edge of signal STVOUT arrives, no matter how many item of the quantity of output clock signal, exports the equal energy of initial signal STVOUT
It enough keeps high level to arrive up to the rising edge of the N/2 articles output clock signal clk OUT-N/2, output starting is enabled to believe
The high level width of number STVOUT meets timing requirements, can guarantee that GOA circuit works normally when applied to GOA circuit.
In conclusion level switch module of the invention includes clock signal output unit, phase inverter, single-pole double-throw switch (SPDT)
And initial signal output unit, when work, using the current potential of input initial signal pull-up output initial signal, so that input starting
The rising edge of output initial signal arrives when the rising edge of signal arrives, and utilizes N/2 (N is positive even numbers) articles of output clock signal
The current potential of drop-down output initial signal, so that output initial signal when the rising edge for exporting clock signal at the N/2 articles arrives
Failing edge arrives, and enables to the high level width of output initial signal to meet timing requirements, can protect when applied to GOA circuit
GOA circuit is demonstrate,proved to work normally.When signal conversion method of the invention enables to the high level width of output initial signal to meet
Sequence requirement.
The above for those of ordinary skill in the art can according to the technique and scheme of the present invention and technology
Other various corresponding changes and modifications are made in design, and all these change and modification all should belong to the claims in the present invention
Protection scope.
Claims (10)
1. a kind of level switch module, which is characterized in that double including clock signal output unit (10), phase inverter (20), hilted broadsword
Throw switch (K) and initial signal output unit (30);
The clock signal output unit (10) is used to export the output clock signal of N pulse, and N item exports clock signal respectively
First rising edge be sequentially generated;Wherein, N is positive even numbers;
The input terminal of the phase inverter (20) is electrically connected clock signal output unit (10), in access N item output clock signal
The N/2 articles output clock signal (CLKOUT-N/2), output end be electrically connected single-pole double-throw switch (SPDT) (K) the first movable contact;
The second movable contact access input initial signal (STV) of the single-pole double-throw switch (SPDT) (K), the intermediate starting letter of stationary contact output
Number (STV1) to initial signal output unit (30), control terminal are electrically connected stationary contact;The single-pole double-throw switch (SPDT) (K) is in its control
Stationary contact is connect by end processed when being high potential with the first movable contact, when its control terminal is low potential by stationary contact and the second dynamic touching
Point connection;First output clock signal of the rising edge of input initial signal (STV) in N item output clock signal
It is generated before first rising edge;
The initial signal output unit (30) is used to generate after boosting processing to intermediate initial signal (STV1) to export
Beginning signal (STVOUT);It is described output initial signal (STVOUT) the high potential period and the low potential period respectively with the centre
The high potential period and low potential period of initial signal (STV1) are corresponding.
2. level switch module as described in claim 1, which is characterized in that the clock signal output unit (10) is for electricity
Property connection sequence controller (9), access N input clock signal being provided by sequence controller (9), the clock signal exports
Unit (10) exports N item output corresponding with N input clock signal respectively after carrying out boosting processing to N input clock signal
Clock signal.
3. level switch module as claimed in claim 2, which is characterized in that the high potential period of each output clock signal
And the low potential period is corresponding with the high potential period of corresponding input clock signal and low potential period respectively.
4. level switch module as claimed in claim 2, which is characterized in that the input initial signal (STV) by it is described when
Sequence controller (9) provides.
5. level switch module as described in claim 1, which is characterized in that N item exports period and the duty ratio of clock signal
It is all the same.
6. level switch module as claimed in claim 5, which is characterized in that any two adjacent output clock signals are respectively
First rising edge between interval be a preset duration.
7. level switch module as claimed in claim 6, which is characterized in that N item exports first clock letter in clock signal
Number first rising edge and input initial signal (STV) rising edge between be divided into the preset duration.
8. level switch module as described in claim 1, which is characterized in that when intermediate initial signal (STV1) is high potential
When, the output initial signal (STVOUT) is preset constant pressure high potential, which is greater than intermediate starting
The high potential of signal (STV1).
9. level switch module as described in claim 1, which is characterized in that when intermediate initial signal (STV1) is low potential
When, output initial signal (STVOUT) is low potential identical with the low potential of intermediate initial signal (STV1).
10. a kind of signal conversion method, which comprises the steps of:
Step S1, such as the described in any item level switch modules of claim 1-9 are provided;
Step S2, the N/2 articles output clock signal (CLKOUT-N/2) is low potential, the input in N articles of output clock signal
Initial signal (STV) is low potential, and the control terminal of the intermediate initial signal (STV1) and single-pole double-throw switch (SPDT) (K) is low electricity
Position, single-pole double-throw switch (SPDT) (K) connects stationary contact and the second movable contact so that intermediate initial signal (STV1) and single-pole double throw are opened
The control terminal for closing (K) keeps low potential, and the output initial signal (STVOUT) is low potential;
Step S3, the N/2 articles output clock signal (CLKOUT-N/2) is low potential, phase inverter in N articles of output clock signal
(20) output end is high potential, and the input initial signal (STV) becomes high potential, the intermediate initial signal (STV1) and
The control terminal of single-pole double-throw switch (SPDT) (K) becomes high potential, and stationary contact is connect by single-pole double-throw switch (SPDT) (K) with the first movable contact makes institute
The control terminal for stating intermediate initial signal (STV1) and single-pole double-throw switch (SPDT) (K) keeps high potential, the output initial signal
It (STVOUT) is preset constant pressure high potential;
Step S4, the N/2 articles output clock signal (CLKOUT-N/2) becomes high potential in N articles of output clock signal, phase inverter
(20) output end becomes low potential, and the intermediate initial signal (STV1) becomes low potential, the output initial signal
It (STVOUT) is low potential.
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CN104680991A (en) * | 2015-03-03 | 2015-06-03 | 深圳市华星光电技术有限公司 | Level shifting circuit and method for GOA-framework liquid crystal panel |
CN107665683A (en) * | 2017-10-12 | 2018-02-06 | 深圳市华星光电技术有限公司 | Clock signal output circuit and clock signal output method |
CN108735162A (en) * | 2018-05-25 | 2018-11-02 | 京东方科技集团股份有限公司 | Display device, gate driving circuit, shift register and its control method |
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