CN105096874B - A kind of GOA circuits, array base palte and liquid crystal display - Google Patents
A kind of GOA circuits, array base palte and liquid crystal display Download PDFInfo
- Publication number
- CN105096874B CN105096874B CN201510494476.XA CN201510494476A CN105096874B CN 105096874 B CN105096874 B CN 105096874B CN 201510494476 A CN201510494476 A CN 201510494476A CN 105096874 B CN105096874 B CN 105096874B
- Authority
- CN
- China
- Prior art keywords
- goa
- output end
- unit
- input
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Abstract
The invention discloses a kind of GOA circuits, array base palte and liquid crystal display, the circuit includes：GOA modules, it includes N number of GOA unit, and the output end of a GOA unit is connected with the input of next GOA unit, and the reset terminal of a GOA unit is connected with the output end of next GOA unit, each output end of the output end formation GOA modules of each GOA unit；Time-sharing multiplex module, it includes M control end, N number of input and N × M output end, wherein, the connection corresponding with the output end of GOA modules respectively of the input of time-sharing multiplex module, N × M output end connection corresponding with N × M bar scan lines of array base palte respectively, M control end connects one to one with M bars selection lines；Time-sharing multiplex module is set to the selection signal according to received by M control end, and the connection between corresponding input and output end is turned on.The GOA circuits become for two-dimensional structure from one-dimentional structure, so as to reduce the quantity of the GOA unit included in GOA circuits, and additionally provide the reliability of product.
Description
Technical field
The present invention relates to technical field of liquid crystal display, specifically, it is related to a kind of GOA circuits, array base palte and liquid crystal
Show device.
Background technology
In recent years, low temperature polycrystalline silicon (Low Temperature Poly-Silicon, referred to as LTPS) technology extensively should
For in the mobile phone and tablet personal computer product of higher-end.Liquid crystal display based on LPTS technologies has low in energy consumption, reaction rate
Many advantages, such as high and aperture opening ratio is high, therefore, LPTS technologies are one of high indispensable important technologies of PPI products of production.
With continuing to develop for LTPS technology, narrow frame and low cost are increasingly becoming the important development side of liquid crystal display
To.This development trend is complied with, GOA (Gate Driver on Array) circuit is widely applied.GOA circuits use with
The semiconductor devices identical thin film-forming method such as liquid crystal drive switch to make simultaneously with array base palte face inner structure in face, and it goes out
The cost of scanning line driving chip is now eliminated, while flexible PCB FPC need not be welded to the edge of liquid crystal display panel.
GOA circuits not only the control of liquid crystal display and designed more to facilitate, and have been greatly reduced the width of liquid crystal display frame
Degree.
Current scanning line driving mode mainly has three kinds：Unilateral driving, bilateral driving and Interlace drivings.Such as
Shown in Fig. 1 a, for the liquid crystal display of unilateral type of drive, its GOA circuit 101 is distributed in liquid crystal display panel and shown
The side in region 102.As shown in figs. lb and lc, for bilateral domain mode and the liquid crystal display of Interlace type of drive
For, its GOA circuit 101 is evenly distributed on the both sides of liquid crystal display panel viewing area 102.
However, because GOA circuits are to be directly integrated in using the mode of film forming on array base palte, therefore LCD
The both sides of plate viewing area still need to reserve certain area for forming GOA circuits, and this is obviously unfavorable for narrow frame liquid crystal
The realization of display.
The content of the invention
The technical problems to be solved by the invention are to reduce the occupancy face of GOA circuits in order to simplify the structure of GOA circuits
Product.To solve the above problems, one embodiment of the present of invention provide firstly a kind of GOA circuits, the GOA circuits include：
GOA modules, it is used to produce shift LD signal, and the GOA modules include N number of GOA unit, a GOA unit
Output end is connected with the input of next GOA unit, and the reset terminal of a GOA unit is connected with the output end of next GOA unit, respectively
The output end of individual GOA unit forms each output end of the GOA modules, and wherein N is natural number, N >=2；
Time-sharing multiplex module, it includes M control end, N number of input and N × M output end, wherein, the timesharing is answered
With the connection corresponding with the output end of the GOA modules respectively of the input of module, the N × M output end respectively with array base
N × M bars scan line correspondence of plate is connected, and the M control end connects one to one with M bars selection lines, and wherein M is nature
Number, M >=2；
The time-sharing multiplex module is set to the selection signal according to received by the M control end, will be corresponding defeated
The connection entered between end and output end is turned on.
According to one embodiment of present invention, the time-sharing multiplex module includes：
M time-sharing multiplex unit, each time-sharing multiplex unit includes a control end, N number of input and N number of output
End, the N number of output end of N number of input of each time-sharing multiplex unit respectively with the GOA modules connects one to one, wherein,
The control end of i-th of time-sharing multiplex unit is connected with the i-th bars selection line, 1≤i≤M.
According to one embodiment of present invention, the time-sharing multiplex unit includes：
N number of switch element, each switch element includes output end, control end and two inputs, wherein, the first input
Hold and connected with the output end of corresponding GOA unit, the second input is connected with voltage pull-down line, the control of N number of switch element
End processed is connected with same signal behavior line.
According to one embodiment of present invention, the switch element includes first switch part and second switch part, described the
One switch member and second switch part include：Control end, input and output end, wherein, the control end of the first switch part
Be connected the control end to form the switch element with the control end of the second switch part, the input of the first switch part and
The input of the second switch part forms the first input end and the second input of the switch element respectively, and described first opens
The output end for closing part is connected the output end to form the switch element with the output end of the second switch part, wherein,
When the level for inputting the selection signal of control end of the switch member is the first level, the first switch part is led
Lead to and the disconnection of second switch part, it is described when the level for inputting the selection signal of control end of the switch member is second electrical level
Second switch part is turned on and first switch part disconnects.
According to one embodiment of present invention, the M control end is sequentially received the selection signal of the first level, when one
When the level for the selection signal that control end is received is the first level, the level of the selection signal that other control ends are received is the
Two level.
According to one embodiment of present invention, the GOA modules also include：
N number of pulse sequence control unit, its connection corresponding with the output end of N number of GOA unit is described for controlling
The pulse sequence for the shift LD signal that GOA unit is generated；
N number of power amplifier unit, the connection corresponding with the output end of N number of pulse sequence control unit of its input, it is exported
End forms each output end of the GOA modules, the driving force for improving the shift LD signal respectively.
According to one embodiment of present invention, the GOA circuits also include：
Selection signal generation module, it includes M output end, and the M output end and the M bars selection line are one by one
Correspondence connection, the selection signal generation module is used to produce selection signal, to control the time-sharing multiplex module to be sequentially output
The scanning signal needed.
According to one embodiment of present invention, the selection signal generation module is opened with the GOA modules using same frame
Signal is opened to start.
Present invention also offers a kind of array base palte, the GOA electricity described in as above any one is formed with the array base palte
Road and N × M bar scan lines, wherein, N × M output end of N × M bars scan line and the GOA circuits, which is corresponded, to be connected
Connect.
Present invention also offers kind of a liquid crystal display, the liquid crystal display includes array base palte as described above.
The GOA circuits that the present embodiment is provided employ time-sharing multiplex on the basis of existing CMOS GOA circuits
Principle simplifies the structure of GOA modules.In order to realize the multiplexing of GOA unit, in addition to GOA modules, the GOA that the present embodiment is provided
Circuit increase Demux circuit structures (i.e. time-sharing multiplex module).By M bar selection signals line (i.e. signal behavior line) by a frame
Image is divided into M parts, respectively by cause a NTFT in the 1/M of frame duration effectively, so that corresponding GOA unit be produced
Raw open signal (i.e. scanning signal) is transferred in corresponding scan line.
GOA circuits provided by the present invention are swept by way of using time-sharing multiplex setting time-sharing multiplex module in a frame
Retouch and each GOA unit is reused in the cycle so that GOA circuits become for two-dimensional structure from one-dimentional structure, so as to reduce GOA
The quantity of GOA unit included in circuit.
For GOA circuits provided by the present invention, when circuit occurs abnormal, because GOA unit quantity is few, piecemeal
It is simple in construction, therefore the fault detect to GOA circuits is easily realized, consequently facilitating the investigation of failure.In addition, GOA unit number
GOA unit is also reduced while proportionally reducing and abnormal ratio occurs, so as to improve the non-defective unit of product to a certain extent
Rate, it is ensured that the reliability of product.
Further, since the GOA circuits greatly reduce the number of GOA unit circuit, this also just reduces used TFT
Total number, so as to provide more flexible space for narrow frame design.Meanwhile, in case of need, can also basis
Demand increases the TFT line widths of GOA circuits, and power consumption is reduced with this and yield is improved.
Other features and advantages of the present invention will be illustrated in the following description, also, partly becomes from specification
Obtain it is clear that or being understood by implementing the present invention.The purpose of the present invention and other advantages can be by specification, rights
Specifically noted structure is realized and obtained in claim and accompanying drawing.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing
There is the accompanying drawing required in technology description to do simple introduction：
Fig. 1 a are the structural representations of the liquid crystal display of existing unilateral driving；
Fig. 1 b are the structural representations of the liquid crystal display of existing bilateral driving；
Fig. 1 c are the structural representations of the liquid crystal display of existing Interlace drivings；
Fig. 2 is the structural representation of GOA circuits according to an embodiment of the invention；
Fig. 3 is the concrete structure schematic diagram of GOA circuits according to an embodiment of the invention；
Fig. 4 is the waveform diagram of the selection signal of GOA circuits according to an embodiment of the invention.
Embodiment
Describe embodiments of the present invention in detail below with reference to drawings and Examples, how the present invention is applied whereby
Technological means solves technical problem, and reaches the implementation process of technique effect and can fully understand and implement according to this.Need explanation
As long as not constituting each embodiment in conflict, the present invention and each feature in each embodiment can be combined with each other,
The technical scheme formed is within protection scope of the present invention.
Meanwhile, in the following description, many details are elaborated for illustrative purposes, to provide to of the invention real
Apply the thorough understanding of example.It will be apparent, however, to one skilled in the art, that the present invention can be without tool here
Body details or described ad hoc fashion are implemented.
Fig. 2 shows the structural representation for the GOA circuits that this implementation is provided.
As shown in Fig. 2 the GOA circuits that the present embodiment is provided include：GOA modules 201, time-sharing multiplex module 202 and choosing
Select signal generation module 203.Wherein, comprising N, (N is natural number to GOA modules 201, and (i.e. the first GOA is mono- for the individual GOA unit of and N >=2)
First 201_1, the second GOA unit 201_2 to N GOA unit 201_N).For these GOA units, an OGA units it is defeated
Go out end to be connected with the input of next GOA unit, the reset terminal of the GOA unit is connected with the output end of next GOA unit, each
Each output end of the output end formation GOA modules of GOA unit.
Specifically, as shown in Fig. 2 the first GOA unit 201_1 input is connected with STV signal wires, its output end and the
Two GOA unit 201_2 input connection, the second GOA unit 201_2 output end and the first GOA unit 201_1 reset terminal
Connection, by that analogy.So, GOA modules just can generate shift LD signal (i.e. scanning signal).
In the present embodiment, time-sharing multiplex module 202 includes M control end, N number of input and N × M output end.Wherein,
The connection corresponding with the output end of GOA modules 201 respectively of each input of time-sharing multiplex module 202, time-sharing multiplex module 202
The connection corresponding with N × M bar scan lines in array base palte, M control end of time-sharing multiplex module 202 respectively of N × M output end
Connected one to one with M bars selection lines.In the present embodiment, M is natural number, and M >=2.
Selection signal generation module 203 includes M output end, and these output ends are corresponded with M bars selection line
Connection.Selection signal generation module 203 can produce selection signal, to control time-sharing multiplex module 202 to be sequentially output needs
Scanning signal.
The GOA circuits that the present embodiment is provided employ time-sharing multiplex on the basis of existing CMOS GOA circuits
Principle simplifies the structure of GOA modules.In order to realize the multiplexing of GOA unit, in addition to GOA modules, the GOA that the present embodiment is provided
Circuit also add Demux circuit structures (i.e. time-sharing multiplex module 202).Pass through M bar selection signals line (i.e. signal behavior line)
One two field picture is divided into M parts, respectively by cause a NTFT in the 1/M of frame duration effectively so that will be corresponding
The open signal (i.e. scanning signal) that GOA unit is produced is transferred in corresponding scan line.
It is pointed out that in the present embodiment, GOA modules 201 employ same frame with selection signal generation module 203 and opened
Open signal (i.e. STV signals) to be started, so that ensure that can between GOA modules 201 and selection signal generation module 203
Realize the synchronization of signal.
Certainly, in the other embodiment of invention, GOA circuits can also ensure GOA moulds using other reasonable manners
Signal is synchronous between block and selection signal generation module, and the invention is not restricted to this.
Fig. 3 shows the ripple of selection signal in an embodiment of the invention produced by selection signal generation module 203
Shape schematic diagram.In the embodiment shown in fig. 3, selection signal generation module 203 includes 4 output ends (i.e. M is equal to 4), and this 4
Individual output end respectively with 4 bars selection lines (i.e. signal behavior line A, signal behavior line B, signal behavior line C and signal behavior line
D) connect.
Within the t1 periods, selection signal generation module 203 exports high electricity to the first signal behavior line (i.e. signal behavior line A)
Flat selection signal and export low level selection signal to other signal behavior lines.So, the 1st of time-sharing multiplex module 202
Input to N inputs just respectively with the 1st output end G1To N output ends correspondence conducting GN.Therefore, in GOA modules 201
The shift LD signal that each GOA unit is produced will pass through time-sharing multiplex module 202 and conduct respectively to be swept to the 1st scan line to N
Retouch line.
Within the t2 periods, selection signal generation module 203 exports high electricity to secondary signal selection line (i.e. signal behavior line B)
Flat selection signal and export low level selection signal to other signal behavior lines.So, the 1st of time-sharing multiplex module 202
Input to N inputs just respectively with N+1 output ends GN+1G is turned on to 2N output ends2NCorrespondence conducting.Now, by GOA
The shift LD signal that each GOA unit is produced in module 201, which will pass through time-sharing multiplex module 202 and conduct respectively to N+1, to be swept
Line is retouched to 2N scan lines.
Similarly, within the t3 periods, the shift LD signal that each GOA unit is produced in GOA modules 201 will pass through timesharing
Multiplexing module 202 conducts to 2N+1 scan lines to 3N scan lines respectively；And within the t4 periods, in GOA modules 201 each
The shift LD signal that GOA unit is produced will pass through time-sharing multiplex module 202 and conduct respectively to be swept to 3N+1 scan lines to 4N
Retouch line.
It follows that in this embodiment, time-sharing multiplex module 202 enables to repeatedly make within the time for scanning a frame
Same GOA unit is used, so that the quantity of the GOA unit required for reducing.Specifically, in a FHD liquid crystal display, altogether
There are 1920 scan lines, and in the left and right sides point odd even scan line line of viewing area.If using 1:M time-sharing multiplex structure
It is transformed, then one side only needs to set the ÷ M GOA units of 1920 ÷ 2.
For example with 1:If 4 time-sharing multiplex structure, the one side of the viewing area of a FHD liquid crystal display is only needed to
The ÷ 4=240 GOA units of 1920 ÷ 2 are set.And for existing GOA circuits, the display of a FHD liquid crystal display
The one side in region needs to set 1920 ÷ 2=960 GOA units.Compared to existing GOA circuits, what the present embodiment was provided
The quantity of GOA unit is significantly reduced in GOA circuits, and the structure of GAO circuits is also just simpler.
Fig. 4 shows the concrete structure schematic diagram for the GOA circuits that the present embodiment is provided.
As shown in figure 4, the present embodiment, which provides GOA circuits, also includes (i.e. the first pulse of N number of pulse sequence control unit
Timing control unit 401_1, the second pulse sequence control unit 401_2 to N pulse sequence control unit 402_N) and N number of work(
Put unit (i.e. the first power amplifier unit 401_1, the second power amplifier unit 401_2 to N power amplifier unit 402_N).Wherein, i-th of arteries and veins
The output end that timing control unit is rushed with i-th of GOA unit is connected, for the shift LD signal for controlling GOA unit to be generated
The pulse sequence of (i.e. scanning signal).The output end of the input of i-th power amplifier unit and i-th of pulse sequence control unit connects
Connect, i-th of output end of its output end formation GOA modules 201.The displacement that power amplifier unit is used for produced by improving GOA modules is posted
Deposit the driving force of signal.
The time-sharing multiplex module 202 that the present embodiment is provided includes M structure identical time-sharing multiplex unit 403.Each
Time-sharing multiplex unit 403 includes control end, N number of input and N number of output end, each time-sharing multiplex unit 403 it is N number of
Input connects one to one with N number of output end of GOA modules 201 respectively.Wherein, the control end of the i-th time-sharing multiplex unit with
I-th signal behavior line is connected.
For convenience of description, structure, the original to time-sharing multiplex module are carried out by taking the 1st time-sharing multiplex unit 403 as an example below
Reason and purpose are further illustrated.
As shown in figure 4, the 1st time-sharing multiplex unit 403 includes N number of switch element 404.Each switch element is containing output
End, control end and two inputs.Wherein, the output end of first input end and corresponding GOA modules is connected, the second input with
The VGL connections of voltage pull-down line, control end and the same signal behavior of N number of switch element that the time-sharing multiplex unit 403 is included
Line is connected.For the 1st time-sharing multiplex unit 403, the control end of its N number of switch element included with signal behavior line
A connections.
In the present embodiment, the structure of each switch element is identical, and it is constituted by two switch members.With the 1st switch element
Exemplified by 404, it includes first switch part T1 and second switch part T2.Wherein, first switch part T1 control end and second switch
Part T2 control end connects the control end to form the 1st switch element 404, first switch part T1 output end and second switch part T2
Output end connect the output end G to form the 1st switch element 4041.The first switch part T1 switch of input formation the 1st is single
The first input end of member 404 to be connected with the first power amplifier unit 402_1 output end, and first switch unit T2 input is formed
Second input of the 1st switch element 404 to be connected with voltage pull-down line VGL.
In the present embodiment, when the signal transmitted in signal behavior line A is high level signal, other signal behavior lines are (i.e.
Signal behavior line B and signal behavior line C) transmission signal then be low level signal.Because first switch part T1 has for high level
Effect (i.e. first switch part T1 control end input high level when, first switch part T1 conducting) and second switch part T2 be low level
Effectively when second switch part T2 control end input low level (i.e., second switch part T2 conductings), therefore at this point for the 1st timesharing
For Multiplexing Unit 403, the first switch part in its each switch element included is conducting and second switch part is equal
It is to disconnect, and for other time-sharing multiplex units, its first switch part is disconnection and second switch part is led
Logical, this also allows for now there was only output end G1To output end GNRespectively with the first GOA unit 201_1 to N GOA units
201_N corresponds to connection so as to export corresponding shift LD signal (i.e. scanning signal), and other output ends (i.e. output end GN+1
To output end G3N) be then connected to export low level signal with voltage pull-down line VGL.
Similarly, when the signal transmitted in signal behavior line B is high level signal, (i.e. signal is selected other signal behavior lines
Select line A and signal behavior line C) signal of transmission is then low level signal, now only output end GN+1To output end G2NRespectively with
The connection of first GOA unit 201_1 to N GOA units 201_N correspondences so as to export corresponding shift LD signal, (i.e. believe by scanning
Number), and other output ends (i.e. output end G1To output end GNAnd output end G2N+1To output end G3N) then with voltage pull-down line
VGL connections are so as to export low level signal.
Similarly, when the signal transmitted in signal behavior line C is high level signal, (i.e. signal is selected other signal behavior lines
Select line A and signal behavior line B) signal of transmission is then low level signal, now only output end G2N+1To output end G3NRespectively
(scanned with the corresponding connections of the first GOA unit 201_1 to N GOA units 201_N so as to export corresponding shift LD signal
Signal), and other output ends (i.e. output end G1To output end G2N) be then connected to export low level with voltage pull-down line VGL
Signal.
In the present embodiment, first switch part and second switch part are realized using transistor.It should be noted that at this
In the other embodiment of invention, first switch part and/or second switch part can also use other rational components or circuit
To realize, the invention is not restricted to this.
As can be seen that GOA circuits provided by the present invention are by setting time-sharing multiplex module to use from foregoing description
The mode of time-sharing multiplex reuses each GOA unit within a frame-scan period so that GOA circuits from one-dimentional structure become in order to
Two-dimensional structure, so as to reduce the quantity of the GOA unit included in GOA circuits.
For GOA circuits provided by the present invention, when circuit occurs abnormal, because GOA unit quantity is few, piecemeal
It is simple in construction, therefore the fault detect to GOA circuits is easily realized, consequently facilitating the investigation of failure.In addition, GOA unit number
GOA unit is also reduced while proportionally reducing and abnormal ratio occurs, so as to improve the non-defective unit of product to a certain extent
Rate, it is ensured that the reliability of product.
Further, since the GOA circuits greatly reduce GOA unit circuits present, it is total that this also just reduces used TFT
Number, so as to provide more flexible space for narrow frame design.Meanwhile, in case of need, can also be according to demand
Increase the TFT line widths of GOA circuits, power consumption is reduced with this and yield is improved.
Present invention also offers a kind of array base palte, GOA circuits as described above and N × M are formed with the array base palte
Bar scan line, wherein, this N × M bars scan line and N × M output end of the GOA circuits connect one to one.
In addition, present invention also offers a kind of liquid crystal display, the array base palte of the liquid crystal display is as described above
Array base palte.
It should be understood that disclosed embodiment of this invention is not limited to specific structure disclosed herein, and it should prolong
Reach the equivalent substitute for these features that those of ordinary skill in the related art are understood.It is to be further understood that using herein
Term be only used for describing the purpose of specific embodiment, and be not intended to limit.
" one embodiment " or " embodiment " mentioned in specification means special characteristic, the structure described in conjunction with the embodiments
Or during characteristic is included at least one embodiment of the present invention.Therefore, the phrase " reality that specification various places throughout occurs
Apply example " or " embodiment " same embodiment might not be referred both to.
For convenience, multiple projects as used herein, construction unit and/or component units may alternatively appear in common list.
However, these lists should be interpreted that each element in the list is respectively identified as individually unique member.Therefore, not anti-
Face illustrate in the case of, no one of list member can be based only upon they appear in just be interpreted in common list it is identical
The actual equivalent of any other member of list.In addition, the reference that can also be come together herein together with the replacement for each element
Various embodiments of the present invention and example.It should be appreciated that these embodiments, example and replacement be not construed as it is mutual etc.
Jljl, and it is considered as the independent autonomous representative of the present invention.
Although above-mentioned example is used to illustrate principle of the present invention in one or more applications, for the technology of this area
For personnel, in the case of the principle and thought without departing substantially from the present invention, hence it is evident that can in form, the details of usage and implementation
It is upper various modifications may be made and without paying creative work.Therefore, the present invention is defined by the appended claims.
Claims (10)
1. a kind of GOA circuits, it is characterised in that the GOA circuits include：
GOA modules, it is used to produce shift LD signal, and the GOA modules include N number of GOA unit, the output of a GOA unit
End is connected with the input of next GOA unit, and the reset terminal of a GOA unit is connected with the output end of next GOA unit, each
The output end of GOA unit forms each output end of the GOA modules, and wherein N is natural number, N >=2；
Time-sharing multiplex module, it includes M control end, N number of input and N × M output end, wherein, the time-sharing multiplex mould
The connection corresponding with the output end of the GOA modules, the N of the N × M output end respectively with array base palte respectively of the input of block
× M bars scan line correspondence is connected, and the M control end connects one to one with M bars selection lines, and wherein M is natural number, M
≥2；
The time-sharing multiplex module is set to the selection signal according to received by the M control end, by corresponding input
Connection conducting between output end.
2. GOA circuits as claimed in claim 1, it is characterised in that the time-sharing multiplex module includes：
M time-sharing multiplex unit, each time-sharing multiplex unit includes a control end, N number of input and N number of output end, respectively
N number of output end of the N number of input of individual time-sharing multiplex unit respectively with the GOA modules connects one to one, wherein, i-th
The control end of time-sharing multiplex unit is connected with the i-th bars selection line, 1≤i≤M.
3. GOA circuits as claimed in claim 2, it is characterised in that the time-sharing multiplex unit includes：
N number of switch element, each switch element include output end, control end and two inputs, wherein, first input end with
The output end connection of corresponding GOA unit, the second input is connected with voltage pull-down line, the control end of N number of switch element
It is connected with same signal behavior line.
4. GOA circuits as claimed in claim 3, it is characterised in that the switch element is opened including first switch part and second
Part is closed, the first switch part and second switch part include：Control end, input and output end, wherein, the first switch
The control end of part is connected the control end to form the switch element, the first switch part with the control end of the second switch part
Input and the input of the second switch part form the first input end and the second input of the switch element respectively,
The output end of the first switch part is connected the output end to form the switch element with the output end of the second switch part, its
In,
When the level for inputting the selection signal of control end of the switch member is the first level, the first switch part conducting and
Second switch part disconnects, when the level for inputting the selection signal of control end of the switch member is second electrical level, and described second
Switch member is turned on and first switch part disconnects.
5. GOA circuits as claimed in claim 1, it is characterised in that the M control end is sequentially received the choosing of the first level
Signal is selected, when the level for the selection signal that a control end is received is the first level, the selection letter that other control ends are received
Number level be second electrical level.
6. such as GOA circuits according to any one of claims 1 to 5, it is characterised in that the GOA modules also include：
N number of pulse sequence control unit, its connection corresponding with the output end of N number of GOA unit, for controlling the GOA mono-
The pulse sequence for the shift LD signal that member is generated；
N number of power amplifier unit, the connection corresponding with the output end of N number of pulse sequence control unit of its input, its output end point
Each output end of the GOA modules is not formed, the driving force for improving the shift LD signal.
7. GOA circuits as claimed in claim 1, it is characterised in that the GOA circuits also include：
Selection signal generation module, it includes M output end, and the M output end is corresponded with the M bars selection line
Connection, the selection signal generation module is used to produce selection signal, to control the time-sharing multiplex module to be sequentially output needs
Scanning signal.
8. GOA circuits as claimed in claim 7, it is characterised in that the selection signal generation module is adopted with the GOA modules
Started with same frame open signal.
9. a kind of array base palte, it is characterised in that formed on the array base palte just like any one of claim 1~8
GOA circuits and N × M bar scan lines, wherein, N × M output end of N × M bars scan line and the GOA circuits is one by one
Correspondence connection.
10. a kind of liquid crystal display, it is characterised in that the liquid crystal display includes array base palte as claimed in claim 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510494476.XA CN105096874B (en) | 2015-08-12 | 2015-08-12 | A kind of GOA circuits, array base palte and liquid crystal display |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510494476.XA CN105096874B (en) | 2015-08-12 | 2015-08-12 | A kind of GOA circuits, array base palte and liquid crystal display |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105096874A CN105096874A (en) | 2015-11-25 |
| CN105096874B true CN105096874B (en) | 2017-10-17 |
Family
ID=54577166
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510494476.XA Active CN105096874B (en) | 2015-08-12 | 2015-08-12 | A kind of GOA circuits, array base palte and liquid crystal display |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105096874B (en) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106847155B (en) * | 2017-02-27 | 2021-03-19 | 上海中航光电子有限公司 | GOA circuit, array substrate and display device |
| CN107705739B (en) * | 2017-07-11 | 2019-11-26 | 深圳市华星光电半导体显示技术有限公司 | Scan drive circuit and display device |
| CN107610634A (en) * | 2017-09-28 | 2018-01-19 | 惠科股份有限公司 | The drive circuit and driving method of a kind of display device |
| CN111192546B (en) | 2018-11-15 | 2023-08-15 | 群创光电股份有限公司 | Display panel and electronic device |
| US10916172B2 (en) | 2019-07-11 | 2021-02-09 | Tcl China Star Optoelectronics Technology Co., Ltd. | Stage-number reduced gate on array circuit and display device |
| CN110322825A (en) * | 2019-07-11 | 2019-10-11 | 深圳市华星光电技术有限公司 | A kind of circuit reducing GOA series and display device |
| CN110517621B (en) * | 2019-09-03 | 2023-02-03 | 京东方科技集团股份有限公司 | GOA multiplexing unit, pixel circuit, driving circuit, display device and display panel thereof |
| US11475827B2 (en) | 2020-01-22 | 2022-10-18 | Innolux Corporation | Electronic device for reducing power consumption |
| CN113990231A (en) * | 2021-11-22 | 2022-01-28 | 信利（惠州）智能显示有限公司 | Display exception switching system |
| CN115188309A (en) * | 2022-06-29 | 2022-10-14 | 武汉天马微电子有限公司 | Display panel and display device |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1949164A (en) * | 2006-07-10 | 2007-04-18 | 王耀 | Time-division multiplexing IC card interface equipment |
| EP2450779A2 (en) * | 2010-11-08 | 2012-05-09 | AU Optronics Corporation | Touch sensing device and method of driving same |
| CN202736457U (en) * | 2012-06-18 | 2013-02-13 | 北京京东方光电科技有限公司 | Array-substrate grid drive circuit and LCD |
| CN104240631A (en) * | 2014-08-18 | 2014-12-24 | 京东方科技集团股份有限公司 | GOA circuit, driving method for GOA circuit and display device for GOA circuit |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201984789U (en) * | 2011-04-19 | 2011-09-21 | 京东方科技集团股份有限公司 | Array substrate row driving circuit, array substrate and liquid crystal display device |
| CN103730094B (en) * | 2013-12-30 | 2016-02-24 | 深圳市华星光电技术有限公司 | Goa circuit structure |
| CN104464667B (en) * | 2014-12-08 | 2017-04-19 | 深圳市华星光电技术有限公司 | GOA type display panel and driving circuit structure and driving method of GOA type display panel |
-
2015
- 2015-08-12 CN CN201510494476.XA patent/CN105096874B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1949164A (en) * | 2006-07-10 | 2007-04-18 | 王耀 | Time-division multiplexing IC card interface equipment |
| EP2450779A2 (en) * | 2010-11-08 | 2012-05-09 | AU Optronics Corporation | Touch sensing device and method of driving same |
| CN202736457U (en) * | 2012-06-18 | 2013-02-13 | 北京京东方光电科技有限公司 | Array-substrate grid drive circuit and LCD |
| CN104240631A (en) * | 2014-08-18 | 2014-12-24 | 京东方科技集团股份有限公司 | GOA circuit, driving method for GOA circuit and display device for GOA circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| CN105096874A (en) | 2015-11-25 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN105096874B (en) | A kind of GOA circuits, array base palte and liquid crystal display | |
| CN104050935B (en) | Shift register, bi-directional shift apparatus for temporary storage and apply its display panels | |
| KR102277072B1 (en) | GOA circuit driving architecture | |
| CN103730094B (en) | Goa circuit structure | |
| CN104808862B (en) | The driving method of array base palte, touch-control display panel and array base palte | |
| CN100443960C (en) | Display driving device and method and liquid crystal display apparatus having the same | |
| CN102645773B (en) | Gate driving circuit and liquid crystal display having same | |
| CN107591145B (en) | A kind of abnormity display panel and its driving method, display device | |
| CN105489189B (en) | Drive element of the grid, gate driving circuit and its driving method and display device | |
| CN107346650A (en) | Display panel, display device and scanning drive method | |
| CN108564916A (en) | A kind of display panel and display device | |
| CN104537972B (en) | Drive circuit, touch-control display panel and touch control display apparatus | |
| CN103035216B (en) | Display device | |
| CN104977763A (en) | Drive circuit, drive method thereof and liquid crystal display | |
| CN105390116B (en) | Gate driving circuit | |
| CN101577104A (en) | Gate driver and associated method for a double gate liquid crystal display | |
| CN104464667A (en) | GOA type display panel and driving circuit structure and driving method of GOA type display panel | |
| CN106055151A (en) | Touch screen, display device and driving method of touch screen | |
| CN107025872A (en) | Shift register cell, gate driving circuit and display device | |
| CN103559912A (en) | Shift register circuit | |
| CN108877634A (en) | Isochronous controller, display device and its control method | |
| CN109410810A (en) | Shift register cell and its driving method, gate driving circuit and display device | |
| CN103280205A (en) | Display device, time schedule controller and image displaying method | |
| CN101872593A (en) | Liquid crystal display device and control method thereof | |
| CN106406623A (en) | Array substrate, touch display panel and touch display device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |