CN105096874A - GOA (Gate Driver On Array) circuit, array substrate and liquid crystal display - Google Patents

GOA (Gate Driver On Array) circuit, array substrate and liquid crystal display Download PDF

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CN105096874A
CN105096874A CN201510494476.XA CN201510494476A CN105096874A CN 105096874 A CN105096874 A CN 105096874A CN 201510494476 A CN201510494476 A CN 201510494476A CN 105096874 A CN105096874 A CN 105096874A
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goa
output terminal
module
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input end
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CN105096874B (en
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高天华
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Wuhan China Star Optoelectronics Technology Co Ltd
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Wuhan China Star Optoelectronics Technology Co Ltd
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Abstract

The invention discloses a GOA (Gate Driver On Array) circuit, an array substrate and a liquid crystal display. The circuit comprises a GOA module and a time division multiplexing module, wherein the GOA module comprises N GOA units, the output end of one GOA unit is connected with the input end of the next GOA unit, the reset end of one GOA unit is connected with the output end of the next GOA unit, and the output end of each GOA unit forms each output end of the GOA module; the time division multiplexing module comprises M control ends, N input ends and N*M output ends, the input ends of the time division multiplexing module are in corresponding connection with the output ends of the GOA module, the N*M output ends are in corresponding connection with N*M scanning lines of the array substrate, the M control ends are in one-to-one corresponding connection with M signal selection lines; and the time division multiplexing module is set to conduct connection between corresponding input ends and output ends according to selection signals received by the M control ends. The GOA circuit becomes a two-dimensional structure from a one-dimensional structure, the number of GOA units included in the GOA circuit can be reduced, and product reliability is improved.

Description

A kind of GOA circuit, array base palte and liquid crystal display
Technical field
The present invention relates to technical field of liquid crystal display, specifically, relate to a kind of GOA circuit, array base palte and liquid crystal display.
Background technology
In recent years, in low temperature polycrystalline silicon (LowTemperaturePoly-Silicon, referred to as LTPS) the technology mobile phone that is widely used in higher-end and panel computer product.Liquid crystal display based on LPTS technology has the plurality of advantages such as low in energy consumption, reaction rate is high and aperture opening ratio is high, and therefore, LPTS technology produces one of indispensable important technology of high PPI product.
Along with the development of LTPS technology, narrow frame and low cost become the important developing direction of liquid crystal display gradually.Comply with this development trend, GOA (GateDriveronArray) circuit is widely applied.GOA circuit adopts the thin film-forming method identical with the semiconductor devices such as liquid crystal drive switch in face and array base palte face inner structure makes simultaneously, its appearance eliminates the cost of scanning line driving chip, simultaneously without the need to welding the edge of flexible PCB FPC to display panels.GOA circuit not only makes the control of liquid crystal display and designs convenient, also greatly reduces the width of liquid crystal display frame.
Current scanning line driving mode mainly contains three kinds: monolateral driving, and bilateral driving and Interlace drive.As shown in Figure 1a, for the liquid crystal display of monolateral type of drive, its GOA circuit 101 is distributed in the side of display panels viewing area 102.As shown in figs. lb and lc, for the liquid crystal display of bilateral domain mode and Interlace type of drive, its GOA circuit 101 is evenly distributed on the both sides of display panels viewing area 102.
But because GOA circuit utilizes the mode of film forming to be directly integrated on array base palte, therefore the both sides of display panels viewing area still need reserved certain area for formation GOA circuit, and this is obviously unfavorable for the realization of narrow frame liquid crystal display.
Summary of the invention
Technical matters to be solved by this invention is that structure in order to simplify GOA circuit is to reduce the area occupied of GOA circuit.For solving the problem, one embodiment of the present of invention provide firstly a kind of GOA circuit, and described GOA circuit comprises:
GOA module, it is for generation of shift LD signal, described GOA module comprises N number of GOA unit, the output terminal of one GOA unit is connected with the input end of next GOA unit, the reset terminal of one GOA unit is connected with the output terminal of next GOA unit, the output terminal of each GOA unit forms each output terminal of described GOA module, and wherein N is natural number, N >=2;
Time-sharing multiplex module, it comprises M control end, N number of input end and N × M output terminal, wherein, the input end of described time-sharing multiplex module is corresponding with the output terminal of described GOA module respectively to be connected, described N × M output terminal is corresponding with N × M bar sweep trace of array base palte respectively to be connected, a described M control end and M bars select line to connect one to one, and wherein M is natural number, M >=2;
Described time-sharing multiplex module installation is the selection signal received by a described M control end, by the connection conducting between corresponding input end and output terminal.
According to one embodiment of present invention, described time-sharing multiplex module comprises:
M time-sharing multiplex unit, each time-sharing multiplex unit includes a control end, N number of input end and N number of output terminal, N number of input end of each time-sharing multiplex unit connects one to one with N number of output terminal of described GOA module respectively, wherein, control end and i-th bars of i-th time-sharing multiplex unit select line to be connected, 1≤i≤M.
According to one embodiment of present invention, described time-sharing multiplex unit comprises:
N number of switch element, each switch element all comprises output terminal, control end and two input ends, and wherein, first input end is connected with the output terminal of corresponding GOA unit, second input end is connected with voltage pull-down line, and the control end of described N number of switch element is connected with same signal behavior line.
According to one embodiment of present invention, described switch element comprises the first switch member and second switch part, described first switch member and second switch part include: control end, input end and output terminal, wherein, the control end of described first switch member and the control end of described second switch part are connected to form the control end of described switch element, the input end of described first switch member and the input end of described second switch part form first input end and second input end of described switch element respectively, the output terminal of described first switch member and the output terminal of described second switch part are connected to form the output terminal of described switch element, wherein,
When the level of the selection signal of the control end of the described switch member of input is the first level, described first switch member conducting and second switch part disconnect, when the level of selection signal of the control end inputting described switch member is second electrical level, described second switch part conducting and the first switch member disconnects.
According to one embodiment of present invention, a described M control end receives the selection signal of the first level successively, and when the level of the selection signal that a control end receives is the first level, the level of the selection signal that other control ends receive is second electrical level.
According to one embodiment of present invention, described GOA module also comprises:
N number of pulse sequence control module, it is corresponding with the output terminal of described N number of GOA unit connects, for controlling the pulse sequence of the shift LD signal that described GOA unit generates;
N number of power amplifier unit, its input end is corresponding with the output terminal of described N number of pulse sequence control module to be connected, and its output terminal forms each output terminal of described GOA module respectively, for improving the driving force of described shift LD signal.
According to one embodiment of present invention, described GOA circuit also comprises:
Select signal generation module, it comprises M output terminal, a described M output terminal and described M bars select line to connect one to one, described selection signal generation module for generation of selection signal, to control the sweep signal that described time-sharing multiplex module exports needs successively.
According to one embodiment of present invention, described selection signal generation module and described GOA module adopt same frame start signal to start.
Present invention also offers a kind of array base palte, described array base palte is formed with the GOA circuit as above described in any one and N × M bar sweep trace, wherein, N × M output terminal of described N × M bar sweep trace and described GOA circuit connects one to one.
Present invention also offers kind of a liquid crystal display, described liquid crystal display comprises array base palte as above.
The GOA circuit that the present embodiment provides, on the basis of existing CMOSGOA circuit, have employed the principle of time-sharing multiplex to simplify the structure of GOA module.In order to realize the multiplexing of GOA unit, except GOA module, the GOA circuit that the present embodiment provides increases Demux circuit structure (i.e. time-sharing multiplex module).Select signal wire (i.e. signal behavior line) that a two field picture is divided into M part by M bar, respectively by making a NTFT effective in the duration of the 1/M of a frame, thus the start signal (i.e. sweep signal) corresponding GOA unit produced is transferred in corresponding sweep trace.
GOA circuit provided by the present invention adopts the mode of time-sharing multiplex to reuse each GOA unit within a frame-scan period by arranging time-sharing multiplex module, make GOA circuit become two-dimensional structure from one-dimentional structure, thus decrease the quantity of the GOA unit comprised in GOA circuit.
For GOA circuit provided by the present invention, when circuit occurs abnormal, because GOA unit quantity is few, partitioned organization is simple, therefore easily realizes the fault detect to GOA circuit, thus is convenient to the investigation of fault.In addition, also reduce GOA unit while GOA unit number reduces in proportion and occur abnormal ratio, thus improve the yields of product to a certain extent, ensure that the reliability of product.
In addition, because this GOA circuit greatly reduces the number of GOA unit circuit, this also just decreases total number of used TFT, thus provides space more flexibly for narrow frame design.Meanwhile, in case of need, also can increase the TFT live width of GOA circuit according to demand, reduce power consumption with this and improve yield.
Other features and advantages of the present invention will be set forth in the following description, and, partly become apparent from instructions, or understand by implementing the present invention.Object of the present invention and other advantages realize by structure specifically noted in instructions, claims and accompanying drawing and obtain.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, do simple introduction by accompanying drawing required in embodiment or description of the prior art below:
Fig. 1 a is the structural representation of the liquid crystal display of existing monolateral driving;
Fig. 1 b is the structural representation of the liquid crystal display of existing bilateral driving;
Fig. 1 c is the structural representation of the liquid crystal display that existing Interlace drives;
Fig. 2 is the structural representation of GOA circuit according to an embodiment of the invention;
Fig. 3 is the concrete structure schematic diagram of GOA circuit according to an embodiment of the invention;
Fig. 4 is the waveform schematic diagram of the selection signal of GOA circuit according to an embodiment of the invention.
Embodiment
Describe embodiments of the present invention in detail below with reference to drawings and Examples, to the present invention, how application technology means solve technical matters whereby, and the implementation procedure reaching technique effect can fully understand and implement according to this.It should be noted that, only otherwise form conflict, each embodiment in the present invention and each feature in each embodiment can be combined with each other, and the technical scheme formed is all within protection scope of the present invention.
Meanwhile, in the following description, many details have been set forth for illustrative purposes, to provide thorough understanding of embodiments of the invention.But, it will be apparent to those skilled in the art that the present invention can detail here or described ad hoc fashion implement.
Fig. 2 shows the structural representation of the GOA circuit that this enforcement provides.
As shown in Figure 2, the GOA circuit that the present embodiment provides comprises: GOA module 201, time-sharing multiplex module 202 and selection signal generation module 203.Wherein, GOA module 201 comprises N (N is natural number, and N >=2) individual GOA unit (namely the first GOA unit 201_1, the second GOA unit 201_2 are to NGOA unit 201_N).For these GOA unit, the output terminal of an OGA unit is connected with the input end of next GOA unit, and the reset terminal of this GOA unit is connected with the output terminal of next GOA unit, and the output terminal of each GOA unit forms each output terminal of GOA module.
Particularly, as shown in Figure 2, the input end of the first GOA unit 201_1 is connected with STV signal wire, and its output terminal is connected with the input end of the second GOA unit 201_2, the output terminal of the second GOA unit 201_2 is connected with the reset terminal of the first GOA unit 201_1, by that analogy.Like this, GOA module just can generate shift LD signal (i.e. sweep signal).
In the present embodiment, time-sharing multiplex module 202 comprises M control end, N number of input end and N × M output terminal.Wherein, each input end of time-sharing multiplex module 202 is corresponding with the output terminal of GOA module 201 respectively to be connected, N × M output terminal of time-sharing multiplex module 202 is corresponding with the N × M bar sweep trace in array base palte respectively to be connected, and M control end of time-sharing multiplex module 202 and M bars select line to connect one to one.In the present embodiment, M is natural number, and M >=2.
Select signal generation module 203 to include M output terminal, these output terminals and M bars select line to connect one to one.Select signal generation module 203 can produce selection signal, control the sweep signal that time-sharing multiplex module 202 exports needs successively.
The GOA circuit that the present embodiment provides, on the basis of existing CMOSGOA circuit, have employed the principle of time-sharing multiplex to simplify the structure of GOA module.In order to realize the multiplexing of GOA unit, except GOA module, the GOA circuit that the present embodiment provides also add Demux circuit structure (i.e. time-sharing multiplex module 202).Select signal wire (i.e. signal behavior line) that a two field picture is divided into M part by M bar, respectively by making a NTFT effective in the duration of the 1/M of a frame, thus the start signal (i.e. sweep signal) corresponding GOA unit produced is transferred in corresponding sweep trace.
It is to be noted, in the present embodiment, GOA module 201 have employed same frame start signal (i.e. STV signal) with selection signal generation module 203 and starts, thus ensure that GOA module 201 and select can realize the synchronous of signal between signal generation module 203.
Certainly, in other embodiments of invention, GOA circuit can also adopt other reasonable manners to ensure GOA module and to select the synchronous of signal between signal generation module, the present invention is not limited thereto.
Fig. 3 shows the waveform schematic diagram of the selection signal selecting signal generation module 203 to produce in an embodiment of the invention.In the embodiment shown in fig. 3, select signal generation module 203 to include 4 output terminals (namely M equals 4), these 4 output terminals select line (i.e. signal behavior line A, signal behavior line B, signal behavior line C and signal behavior line D) to be connected respectively with 4 barss.
Within the t1 period, select signal generation module 203 to the first signal behavior line (i.e. signal behavior line A) export high level selection signal and to the selection signal of other signal behavior line output low levels.Like this, time-sharing multiplex module 202 the 1st input end to N input end just respectively with the 1st output terminal G 1to the corresponding conducting G of N output terminal n.Therefore, the shift LD signal produced by each GOA unit in GOA module 201 just conducts to the 1st sweep trace to N sweep trace respectively by time-sharing multiplex module 202.
Within the t2 period, select signal generation module 203 to secondary signal select line (i.e. signal behavior line B) export high level selection signal and to the selection signal of other signal behavior line output low levels.Like this, time-sharing multiplex module 202 the 1st input end to N input end just respectively with N+1 output terminal G n+1to 2N output terminal conducting G 2Ncorresponding conducting.Now, the shift LD signal produced by each GOA unit in GOA module 201 just conducts to N+1 sweep trace to 2N sweep trace respectively by time-sharing multiplex module 202.
In like manner, within the t3 period, the shift LD signal produced by each GOA unit in GOA module 201 just conducts to 2N+1 sweep trace to 3N sweep trace respectively by time-sharing multiplex module 202; And within the t4 period, the shift LD signal produced by each GOA unit in GOA module 201 just conducts to 3N+1 sweep trace to 4N sweep trace respectively by time-sharing multiplex module 202.
It can thus be appreciated that in this embodiment, time-sharing multiplex module 202 can make repeatedly to use same GOA unit within the time of scanning one frame, thus decreased the quantity of required GOA unit.Particularly, in a FHD liquid crystal display, have 1920 sweep traces, and divide odd even sweep trace line in the left and right sides of viewing area.If adopt the time-sharing multiplex structure of 1:M to transform it, then one-sided needs arrange 1920 ÷ 2 ÷ M GOA unit.
Such as adopt the time-sharing multiplex structure of 1:4, one-sided needs of the viewing area of a FHD liquid crystal display arrange 1920 ÷ 2 ÷ 4=240 GOA unit.And for existing GOA circuit, the one-sided needs of the viewing area of a FHD liquid crystal display arranges a 1920 ÷ 2=960 GOA unit.Compared to existing GOA circuit, in the GOA circuit that the present embodiment provides, the quantity of GOA unit is obviously reduced, and the structure of GAO circuit is also just simpler.
Fig. 4 shows the concrete structure schematic diagram of the GOA circuit that the present embodiment provides.
As shown in Figure 4, the present embodiment provides GOA circuit also to include N number of pulse sequence control module (namely the first pulse sequence control module 401_1, the second pulse sequence control module 401_2 are to N pulse sequence control unit 402_N) and N number of power amplifier unit (namely the first power amplifier unit 401_1, the second power amplifier unit 401_2 are to N power amplifier unit 402_N).Wherein, i-th pulse sequence control module is connected with the output terminal of i-th GOA unit, for controlling the pulse sequence of the shift LD signal (i.e. sweep signal) that GOA unit generates.The input end of i-th power amplifier unit is connected with the output terminal of i-th pulse sequence control module, and its output terminal forms i-th output terminal of GOA module 201.The driving force of shift LD signal of power amplifier unit for improving GOA module and producing.
The time-sharing multiplex module 202 that the present embodiment provides comprises the identical time-sharing multiplex unit 403 of M structure.Each time-sharing multiplex unit 403 includes a control end, N number of input end and N number of output terminal, and N number of input end of each time-sharing multiplex unit 403 connects one to one with N number of output terminal of GOA module 201 respectively.Wherein, the control end of the i-th time-sharing multiplex unit is connected with the i-th signal behavior line.
For convenience of description, for the 1st time-sharing multiplex unit 403, the structure of time-sharing multiplex module, principle and object are set forth further below.
As shown in Figure 4, the 1st time-sharing multiplex unit 403 comprises N number of switch element 404.Each switch element is all containing output terminal, control end and two input ends.Wherein, first input end is connected with the output terminal of corresponding GOA module, and the second input end is connected with voltage pull-down line VGL, and the control end of N number of switch element that this time-sharing multiplex unit 403 comprises is connected with same signal behavior line.For the 1st time-sharing multiplex unit 403, the control end of its N number of switch element comprised all is connected with signal behavior line A.
In the present embodiment, the structure of each switch element is identical, and it is formed by two switch member.For the 1st switch element 404, it comprises the first switch member T1 and second switch part T2.Wherein, the control end of the first switch member T1 and the control end of second switch part T2 are connected to form the control end of the 1st switch element 404, the output terminal of the first switch member T1 and the output terminal of second switch part T2 be connected to form the 1st switch element 404 output terminal G 1.The first input end of input end formation the 1st switch element 404 of the first switch member T1 is connected with the output terminal of the first power amplifier unit 402_1, and the second input end of input end formation the 1st switch element 404 of the first switch element T2 is connected with voltage pull-down line VGL.
In the present embodiment, when the signal transmitted in signal behavior line A is high level signal, the signal that other signal behavior lines (i.e. signal behavior line B and signal behavior line C) transmit is then low level signal.Because the first switch member T1 is that high level is effectively (i.e. during the control end input high level of the first switch member T1, first switch member T1 conducting) and second switch part T2 is that Low level effective is (i.e. during the control end input low level of second switch part T2, second switch part T2 conducting), therefore now for the 1st time-sharing multiplex unit 403, the first switch member in its each switch element comprised is all conducting and second switch part is all disconnect, and for other time-sharing multiplex unit, its first switch member is all disconnection and second switch part is all conductings, this also just makes now only have output terminal G 1to output terminal G ncorrespondingly to the first GOA unit 201_1 to NGOA unit 201_N respectively connect thus export corresponding shift LD signal (i.e. sweep signal), and other output terminals (i.e. output terminal G n+1to output terminal G 3N) be then all connected thus output low level signal with voltage pull-down line VGL.
In like manner, when the signal transmitted in signal behavior line B is high level signal, the signal that other signal behavior lines (i.e. signal behavior line A and signal behavior line C) transmit is then low level signal, now only has output terminal G n+1to output terminal G 2Ncorrespondingly to the first GOA unit 201_1 to NGOA unit 201_N respectively connect thus export corresponding shift LD signal (i.e. sweep signal), and other output terminals (i.e. output terminal G 1to output terminal G nand output terminal G 2N+1to output terminal G 3N) be then all connected thus output low level signal with voltage pull-down line VGL.
In like manner, when the signal transmitted in signal behavior line C is high level signal, the signal that other signal behavior lines (i.e. signal behavior line A and signal behavior line B) transmit is then low level signal, now only has output terminal G 2N+1to output terminal G 3Ncorrespondingly to the first GOA unit 201_1 to NGOA unit 201_N respectively connect thus export corresponding shift LD signal (i.e. sweep signal), and other output terminals (i.e. output terminal G 1to output terminal G 2N) be then all connected thus output low level signal with voltage pull-down line VGL.
In the present embodiment, the first switch member and second switch part all adopt transistor to realize.It should be noted that, in other embodiments of the invention, the first switch member and/or second switch part can also adopt other rational components and parts or circuit to realize, and the present invention is not limited thereto.
As can be seen from foregoing description, GOA circuit provided by the present invention adopts the mode of time-sharing multiplex to reuse each GOA unit within a frame-scan period by arranging time-sharing multiplex module, make GOA circuit become two-dimensional structure from one-dimentional structure, thus decrease the quantity of the GOA unit comprised in GOA circuit.
For GOA circuit provided by the present invention, when circuit occurs abnormal, because GOA unit quantity is few, partitioned organization is simple, therefore easily realizes the fault detect to GOA circuit, thus is convenient to the investigation of fault.In addition, also reduce GOA unit while GOA unit number reduces in proportion and occur abnormal ratio, thus improve the yields of product to a certain extent, ensure that the reliability of product.
In addition, because this GOA circuit greatly reduces GOA unit circuits present, this also just decreases the total number of used TFT, thus provides space more flexibly for narrow frame design.Meanwhile, in case of need, also can increase the TFT live width of GOA circuit according to demand, reduce power consumption with this and improve yield.
Present invention also offers a kind of array base palte, this array base palte is formed with GOA circuit as above and N × M bar sweep trace, wherein, N × M output terminal of this N × M bar sweep trace and this GOA circuit connects one to one.
In addition, present invention also offers a kind of liquid crystal display, the array base palte of this liquid crystal display is array base palte as above.
It should be understood that disclosed embodiment of this invention is not limited to ad hoc structure disclosed herein, and the equivalent of these features that those of ordinary skill in the related art understand should be extended to substitute.It is to be further understood that term is only for describing the object of specific embodiment as used herein, and and do not mean that restriction.
Special characteristic, structure or characteristic that " embodiment " mentioned in instructions or " embodiment " mean to describe in conjunction with the embodiments comprise at least one embodiment of the present invention.Therefore, instructions various places throughout occur phrase " embodiment " or " embodiment " might not all refer to same embodiment.
Conveniently, multiple project, structural unit and/or component units can appear in common list as used herein.But each element that these lists should be interpreted as in this list is identified as member unique separately respectively.Therefore, when not having reverse side to illustrate, in this list, neither one member only can appear in common list the actual equivalent of other member any being just interpreted as same list based on them.In addition, can also come together with reference to various embodiment of the present invention and example together with for the alternative of each element at this.Should be understood that, these embodiments, example and substitute and be not interpreted as equivalent each other, and be considered to representative autonomous separately of the present invention.
Although above-mentioned example is for illustration of the principle of the present invention in one or more application, but for a person skilled in the art, when not deviating from principle of the present invention and thought, obviously can in form, the details of usage and enforcement does various amendment and need not creative work be paid.Therefore, the present invention is limited by appending claims.

Claims (10)

1. a GOA circuit, is characterized in that, described GOA circuit comprises:
GOA module, it is for generation of shift LD signal, described GOA module comprises N number of GOA unit, the output terminal of one GOA unit is connected with the input end of next GOA unit, the reset terminal of one GOA unit is connected with the output terminal of next GOA unit, the output terminal of each GOA unit forms each output terminal of described GOA module, and wherein N is natural number, N >=2;
Time-sharing multiplex module, it comprises M control end, N number of input end and N × M output terminal, wherein, the input end of described time-sharing multiplex module is corresponding with the output terminal of described GOA module respectively to be connected, described N × M output terminal is corresponding with N × M bar sweep trace of array base palte respectively to be connected, a described M control end and M bars select line to connect one to one, and wherein M is natural number, M >=2;
Described time-sharing multiplex module installation is the selection signal received by a described M control end, by the connection conducting between corresponding input end and output terminal.
2. GOA circuit as claimed in claim 1, it is characterized in that, described time-sharing multiplex module comprises:
M time-sharing multiplex unit, each time-sharing multiplex unit includes a control end, N number of input end and N number of output terminal, N number of input end of each time-sharing multiplex unit connects one to one with N number of output terminal of described GOA module respectively, wherein, control end and i-th bars of i-th time-sharing multiplex unit select line to be connected, 1≤i≤M.
3. GOA circuit as claimed in claim 2, it is characterized in that, described time-sharing multiplex unit comprises:
N number of switch element, each switch element all comprises output terminal, control end and two input ends, and wherein, first input end is connected with the output terminal of corresponding GOA unit, second input end is connected with voltage pull-down line, and the control end of described N number of switch element is connected with same signal behavior line.
4. GOA circuit as claimed in claim 3, it is characterized in that, described switch element comprises the first switch member and second switch part, described first switch member and second switch part include: control end, input end and output terminal, wherein, the control end of described first switch member and the control end of described second switch part are connected to form the control end of described switch element, the input end of described first switch member and the input end of described second switch part form first input end and second input end of described switch element respectively, the output terminal of described first switch member and the output terminal of described second switch part are connected to form the output terminal of described switch element, wherein,
When the level of the selection signal of the control end of the described switch member of input is the first level, described first switch member conducting and second switch part disconnect, when the level of selection signal of the control end inputting described switch member is second electrical level, described second switch part conducting and the first switch member disconnects.
5. GOA circuit as claimed in claim 1, it is characterized in that, a described M control end receives the selection signal of the first level successively, and when the level of the selection signal that a control end receives is the first level, the level of the selection signal that other control ends receive is second electrical level.
6. the GOA circuit according to any one of Claims 1 to 5, is characterized in that, described GOA module also comprises:
N number of pulse sequence control module, it is corresponding with the output terminal of described N number of GOA unit connects, for controlling the pulse sequence of the shift LD signal that described GOA unit generates;
N number of power amplifier unit, its input end is corresponding with the output terminal of described N number of pulse sequence control module to be connected, and its output terminal forms each output terminal of described GOA module respectively, for improving the driving force of described shift LD signal.
7. GOA circuit as claimed in claim 1, it is characterized in that, described GOA circuit also comprises:
Select signal generation module, it comprises M output terminal, a described M output terminal and described M bars select line to connect one to one, described selection signal generation module for generation of selection signal, to control the sweep signal that described time-sharing multiplex module exports needs successively.
8. GOA circuit as claimed in claim 7, it is characterized in that, described selection signal generation module and described GOA module adopt same frame start signal to start.
9. an array base palte, is characterized in that, described array base palte is formed with the GOA circuit according to any one of claim 1 ~ 8 and N × M bar sweep trace, and wherein, N × M output terminal of described N × M bar sweep trace and described GOA circuit connects one to one.
10. a liquid crystal display, is characterized in that, described liquid crystal display comprises array base palte as claimed in claim 9.
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CN106847155A (en) * 2017-02-27 2017-06-13 上海中航光电子有限公司 A kind of GOA circuits, array base palte and display device
CN107610634A (en) * 2017-09-28 2018-01-19 惠科股份有限公司 The drive circuit and driving method of a kind of display device
CN107705739A (en) * 2017-07-11 2018-02-16 深圳市华星光电半导体显示技术有限公司 Scan drive circuit and display device
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CN110322825A (en) * 2019-07-11 2019-10-11 深圳市华星光电技术有限公司 A kind of circuit reducing GOA series and display device
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US11475827B2 (en) 2020-01-22 2022-10-18 Innolux Corporation Electronic device for reducing power consumption
WO2023087337A1 (en) * 2021-11-22 2023-05-25 信利(惠州)智能显示有限公司 Display abnormity switching system
CN115188309A (en) * 2022-06-29 2022-10-14 武汉天马微电子有限公司 Display panel and display device
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