CN109037040B - 提高双大马士革刻蚀次沟槽工艺窗口的方法 - Google Patents
提高双大马士革刻蚀次沟槽工艺窗口的方法 Download PDFInfo
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Abstract
本发明涉及提高双大马士革刻蚀次沟槽工艺窗口的方法,涉及半导体集成电路制造技术,包括S1:在硅片上依次淀积底部刻蚀阻挡层、下层氧化物介质层、中间刻蚀阻挡层及上层氧化物介质层,并进行薄膜沉淀及孔洞刻蚀工艺,形成孔洞,之后进行光阻塞沉淀工艺,形成光阻塞;S2:进行所述光阻塞回刻;S3:涂光阻,进行光阻刻蚀,形成沟槽图形;S4:以所述光阻为掩膜,通过刻蚀工艺形成所述沟槽,刻蚀工艺完成后所述光阻塞高于所述中间刻蚀阻挡层的顶部,且在所述光阻塞的两侧形成突出阻塞;S5:光阻塞回刻,所述突出阻塞暴露;S6:刻蚀以去除所述突出阻塞;S7:去所述光阻及所述光阻塞;S8:进行所述底部刻蚀阻挡层刻蚀,以提高次沟槽的工艺窗口。
Description
技术领域
本发明涉及一种半导体集成电路制造技术,尤其涉及一种提高双大马士革刻蚀次沟槽工艺窗口的方法。
背景技术
在半导体集成电路制造过程中,双大马士革刻蚀工艺是顶层刻蚀常见的刻蚀工艺。请参阅图1a至图1f,图1a至图1f分别为现有技术的双大马士革刻蚀工艺过程示意图,如图1a所示,在硅片上依次淀积底部刻蚀阻挡层410、下层氧化物介质层210、中间刻蚀阻挡层420及上层氧化物介质层220,并进行薄膜沉淀及孔洞刻蚀工艺,形成孔洞900,之后进行光阻塞沉淀工艺,形成光阻塞100;如图1b所示,进行光阻塞回刻;如图1c所示,涂光阻500,进行光阻刻蚀;如图1d所示,以光阻500为掩膜,进行沟槽800刻蚀,为了避免栅栏的产生,通常刻蚀过程控制光阻塞100的高度比沟槽800底部低,对于中间刻蚀阻挡层420和下层氧化物介质层210的保护有所欠缺,中间刻蚀阻挡层420的边缘被刻蚀,致使暴露出下层氧化物介质层210,等离子轰击下层氧化物介质层210时,由于孔洞900顶角处的两个面都暴露出来,导致容易产生次沟槽700;如图1e所示,进行去光阻及光阻塞100;如图1f所示,进行底部刻蚀阻挡层410刻蚀。在现有应用中,只能减少次沟槽700,却无法杜绝,导致次沟槽工艺窗口很小。
因此在半导体集成电路制造过程中,需要一种提高双大马士革刻蚀次沟槽工艺窗口的方法。
发明内容
本发明的目的在于提供一种提高双大马士革刻蚀次沟槽工艺窗口的方法,以提高双大马士革刻蚀次沟槽的工艺窗口。
本发明提供的提高双大马士革刻蚀次沟槽工艺窗口的方法,包括:S1:在硅片上依次淀积底部刻蚀阻挡层、下层氧化物介质层、中间刻蚀阻挡层及上层氧化物介质层,并进行薄膜沉淀及孔洞刻蚀工艺,形成孔洞,之后进行光阻塞沉淀工艺,形成光阻塞;S2:进行所述光阻塞回刻;S3:涂光阻,进行光阻刻蚀,形成沟槽图形;S4:以所述光阻为掩膜,通过刻蚀工艺形成所述沟槽,刻蚀工艺完成后所述光阻塞高于所述中间刻蚀阻挡层的顶部,且在所述光阻塞的两侧形成突出阻塞;S5:光阻塞回刻,所述突出阻塞暴露;S6:刻蚀以去除所述突出阻塞;S7:去所述光阻及所述光阻塞;以及S8:进行所述底部刻蚀阻挡层刻蚀。
更进一步的,所述步骤S4中所述沟槽止于所述中间刻蚀阻挡层。
更进一步的,所述步骤S4中所述突出阻塞位于所述中间刻蚀阻挡层之上。
更进一步的,所述步骤S4中所述突出阻塞由残留的所述上层氧化物介质层构成。
更进一步的,所述步骤S4中所述突出阻塞为三角形结构。
更进一步的,所述步骤S5中进行光阻塞回刻,以使所述光阻塞低于所述中间刻蚀阻挡层的顶部。
更进一步的,所述步骤S6中需要程式刻蚀所述突出阻塞对所述中间刻蚀阻挡层的选择比大于5。
更进一步的,所述中间刻蚀阻挡层为氮化物材料。
更进一步的,所述突出阻塞为氧化物
材料。
本发明提供的提高双大马士革刻蚀次沟槽工艺窗口的方法,在双大马士革刻蚀工艺中通过提高光阻塞高度,使其产生突出阻塞,来保护刻蚀阻挡层和下层氧化物介质层,再在之后的工艺程式中加入光阻塞高度降低和突出阻塞去除步骤,提高了次沟槽的工艺窗口。
附图说明
图1a至图1f分别为现有技术的双大马士革刻蚀工艺过程示意图。
图2a至图2h分别为本发明一实施例的双大马士革刻蚀工艺过程示意图。
具体实施方式
下面将结合附图,对本发明中的技术方案进行清楚、完整的描述,显然,所描述的实施例是本发明的一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在不做出创造性劳动的前提下所获得的所有其它实施例,都属于本发明保护的范围。
本发明一实施例中,提供一种提高双大马士革刻蚀次沟槽工艺窗口的方法,请参阅图2a至图2h,图2a至图2h分别为本发明一实施例的双大马士革刻蚀工艺过程示意图。本发明的一实施例的提高双大马士革刻蚀次沟槽工艺窗口的方法包括以下步骤:
S1:在硅片上依次淀积底部刻蚀阻挡层、下层氧化物介质层、中间刻蚀阻挡层及上层氧化物介质层,并进行薄膜沉淀及孔洞刻蚀工艺,形成孔洞,之后进行光阻塞沉淀工艺,形成光阻塞。具体的,如图2a所示,在硅片上依次淀积底部刻蚀阻挡层410、下层氧化物介质层210、中间刻蚀阻挡层420及上层氧化物介质层220,并进行薄膜沉淀形成孔洞图形,之后进行孔洞刻蚀工艺,形成孔洞900,之后进行光阻塞沉淀工艺,具体的,在孔洞900中及上层氧化物介质层220之上沉淀光阻塞材料,形成光阻塞100。
S2:进行光阻塞回刻。如图2b所示,进行光阻塞100回刻,使光阻塞100低于上层氧化物介质层220的顶部221。
S3:涂光阻,进行光阻刻蚀,形成沟槽图形。如图2c所示,在上层氧化物介质层220上涂光阻500,进行光阻刻蚀,形成沟槽图形。
S4:以光阻为掩膜,通过刻蚀工艺形成沟槽,刻蚀工艺完成后光阻塞高于中间刻蚀阻挡层的顶部,且在光阻塞的两侧形成突出阻塞。如图2d所示,以光阻500为掩膜,通过干法或湿法刻蚀工艺形成沟槽800,沟槽800止于中间刻蚀阻挡层420,光阻塞100高于中间刻蚀阻挡层420的顶部421,即高于沟槽800底部,且在中间刻蚀阻挡层420之上及光阻塞100的两侧形成突出阻塞600。在本发明一实施例中,突出阻塞600由残留的上层氧化物介质层220构成。在本发明一实施例中,突出阻塞为三角形结构。在本发明一实施例中,刻蚀工艺完成后光阻塞100比中间刻蚀阻挡层420的顶部421高之间。
S5:光阻塞回刻,突出阻塞暴露。如图2e所示,光阻塞100回刻,使光阻塞100低于中间刻蚀阻挡层420的顶部421,突出阻塞600暴露出来。
S6:刻蚀以去除突出阻塞。如图2f所示,在本发明一实施例中,通过使用炭氟气体和氧气去除突出阻塞。且在本发明一实施例中,需要程式刻蚀突出阻塞600(即氧化物)对中间刻蚀阻挡层420(即氮化物)的选择比大于5,以使在去除突出阻塞时中间刻蚀阻挡层420的边缘不被刻蚀,以保护下层氧化物介质层210,如此减小次沟槽,更优的避免次沟槽的产生,以提高次沟槽的工艺窗口。
S7:去光阻及光阻塞。如图2g所示,为去光阻500及光阻塞100之后的示意图。
S8:进行底部刻蚀阻挡层刻蚀。如图2h所示进行底部刻蚀阻挡层410刻蚀,形成双大马士革结构。
在本发明一实施例中,光阻塞100可为底部抗反射涂层材料、氮化硅,碳氮化硅,氮氧化硅等材料;底部刻蚀阻挡层410和中间刻蚀阻挡层420为氮化硅、碳氮化硅及氮氧化硅等氮化物材料;下层氧化物介质层210和上层氧化物介质层220为二氧化硅及其掺杂材料等氧化物材料;同样的,突出阻塞600为二氧化硅及其掺杂材料等氧化物材料。
本发明一实施例中,双大马士革刻蚀工艺中通过提高光阻塞高度,使其产生突出阻塞,来保护刻蚀阻挡层和下层氧化物介质层,再在之后的工艺程式中加入光阻塞高度降低和突出阻塞去除步骤,提高了次沟槽的工艺窗口。
最后应说明的是:以上各实施例仅用以说明本发明的技术方案,而非对其限制;尽管参照前述各实施例对本发明进行了详细的说明,本领域的普通技术人员应当理解:其依然可以对前述各实施例所记载的技术方案进行修改,或者对其中部分或者全部技术特征进行等同替换;而这些修改或者替换,并不使相应技术方案的本质脱离本发明各实施例技术方案的范围。
Claims (7)
1.一种提高双大马士革刻蚀次沟槽工艺窗口的方法,其特征在于,包括:
S1:在硅片上依次淀积底部刻蚀阻挡层、下层氧化物介质层、中间刻蚀阻挡层及上层氧化物介质层,并进行薄膜沉淀及孔洞刻蚀工艺,形成孔洞,之后进行光阻塞沉淀工艺,形成光阻塞;
S2:进行所述光阻塞回刻;
S3:涂光阻,进行光阻刻蚀,形成沟槽图形;
S4:以所述光阻为掩膜,通过刻蚀工艺形成所述沟槽,所述沟槽止于所述中间刻蚀阻挡层,刻蚀工艺完成后所述光阻塞高于所述中间刻蚀阻挡层的顶部,并在中间刻蚀阻挡层之上及光阻塞的两侧由残留的所述上层氧化物介质层形成突出阻塞;
S5:光阻塞回刻,所述突出阻塞暴露;
S6:刻蚀以去除所述突出阻塞,其中在该步骤S6中需要程式刻蚀所述突出阻塞对所述中间刻蚀阻挡层的选择比大于5;
S7:去所述光阻及所述光阻塞;以及
S8:进行所述底部刻蚀阻挡层刻蚀。
2.根据权利要求1所述的提高双大马士革刻蚀次沟槽工艺窗口的方法,其特征在于,所述步骤S4中所述突出阻塞为三角形结构。
3.根据权利要求1所述的提高双大马士革刻蚀次沟槽工艺窗口的方法,其特征在于,所述步骤S5中进行光阻塞回刻,以使所述光阻塞低于所述中间刻蚀阻挡层的顶部。
4.根据权利要求1所述的提高双大马士革刻蚀次沟槽工艺窗口的方法,其特征在于,所述中间刻蚀阻挡层为氮化物材料。
5.根据权利要求1所述的提高双大马士革刻蚀次沟槽工艺窗口的方法,其特征在于,所述突出阻塞为氧化物材料。
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WO2005029556A2 (en) * | 2003-09-19 | 2005-03-31 | Brewer Science Inc. | Method of filling structures for forming via-first dual damascene interconnects |
TW200837877A (en) * | 2007-03-01 | 2008-09-16 | United Microelectronics Corp | Method of forming composite opening and method of dual damascene process using the same |
CN101937869A (zh) * | 2009-06-30 | 2011-01-05 | 上海华虹Nec电子有限公司 | 无介质膜栅栏残留风险的大马士革工艺集成方法 |
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