CN109037033A - A kind of wafer thining method - Google Patents

A kind of wafer thining method Download PDF

Info

Publication number
CN109037033A
CN109037033A CN201810786447.4A CN201810786447A CN109037033A CN 109037033 A CN109037033 A CN 109037033A CN 201810786447 A CN201810786447 A CN 201810786447A CN 109037033 A CN109037033 A CN 109037033A
Authority
CN
China
Prior art keywords
wafer
back side
equipment
grinding
thining method
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201810786447.4A
Other languages
Chinese (zh)
Inventor
杨凡
杨一凡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Wuhan Xinxin Semiconductor Manufacturing Co Ltd
Original Assignee
Wuhan Xinxin Semiconductor Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Wuhan Xinxin Semiconductor Manufacturing Co Ltd filed Critical Wuhan Xinxin Semiconductor Manufacturing Co Ltd
Priority to CN201810786447.4A priority Critical patent/CN109037033A/en
Publication of CN109037033A publication Critical patent/CN109037033A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02008—Multistep processes
    • H01L21/0201—Specific process step
    • H01L21/02013—Grinding, lapping
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02008—Multistep processes
    • H01L21/0201—Specific process step
    • H01L21/02016—Backside treatment

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)

Abstract

The present invention relates to technical field of semiconductors more particularly to a kind of wafer thining methods, and applied to the back side of an equipment wafer, the front of equipment wafer is connect with a carrying wafer；Include: step S1, the back side of equipment wafer is ground using one first grinding technics, by the first preset thickness of thinning back side of equipment wafer；Step S2 grinds the back side of equipment wafer using one second grinding technics, by the second preset thickness of thinning back side of equipment wafer；Wherein, in step S1, the first grinding technics is to be ground using the back side of first lapping liquid to equipment wafer；In step S2, the second grinding technics is to use to be ground for removing the second lapping liquid of residue；The impurity and residual that grinding generates can be removed, while oxide layer and/or nitration case being avoided to ensure that the validity of grinding to the influence of grinding effect.

Description

A kind of wafer thining method
Technical field
The present invention relates to technical field of semiconductors more particularly to a kind of wafer thining methods.
Background technique
With the development of integrated circuit, CIS (CMOS Image Sensor complementary metal-oxide-semiconductor image sensing Device, abbreviation CIS) manufacturing technology reached its maturity.In general, preparation CIS needs to provide a carrying wafer and holds positioned at this Carry the equipment wafer on wafer.For not thinned equipment wafer, overall thickness generally can achieve 800 microns, Being thinned by the back side to equipment wafer can control equipment wafer to 3 microns or less.
But in the thinning process of equipment wafer, since equipment wafer is often hydrophobic material, pass through water merely It is rinsed, the impurity generated in thinning process, residual can not be removed.The part that wafer is exposed to surface be also possible to in air Oxygen and/or nitrogen react, oxide layer and/or nitration case are formed, to further influence the thinned effect of wafer.
Summary of the invention
In view of the above-mentioned problems, the invention proposes a kind of wafer thining method, it is described applied to the back side of an equipment wafer The front of equipment wafer is connect with a carrying wafer；Wherein, comprising:
Step S1 is ground using the back side of one first grinding technics to the equipment wafer, and the equipment is brilliant Round the first preset thickness of thinning back side；
Step S2 is ground using the back side of one second grinding technics to the equipment wafer, and the equipment is brilliant Round the second preset thickness of thinning back side；
Wherein, in the step S1, first grinding technics is using the first lapping liquid to the back of the equipment wafer It is ground in face；In the step S2, second grinding technics is to be carried out using the second lapping liquid for removing residue Grinding.
Above-mentioned wafer thining method, wherein the back side of the equipment wafer is formed by silicon, silica and silicon nitride.
Above-mentioned wafer thining method, wherein first preset thickness is 1.5 μm~3.5 μm.
Above-mentioned wafer thining method, wherein second preset thickness is 0.05 μm~0.2 μm.
Above-mentioned wafer thining method, wherein in the step S1, first lapping liquid is with high grinding rate to described The back side of equipment wafer is ground, and the high grinding rate is 0.5~1.5 μm/min.
Above-mentioned wafer thining method, wherein first lapping liquid includes silica and water.
Above-mentioned wafer thining method, wherein the ratio of silica and water is 1:10~1:20.
Above-mentioned wafer thining method, wherein first lapping liquid to the grinding rate of silicon and silica select than for 0.5~1.5；
It is 0.2~1.0 that first lapping liquid, which selects ratio to the grinding rate of silica and silicon nitride,.
Above-mentioned wafer thining method, wherein second lapping liquid is alkaline solution.
Above-mentioned wafer thining method, wherein second lapping liquid includes SiO2And H2O2。
Above-mentioned wafer thining method, wherein the ratio of SiO2 and H2O2 is 1:10~1:30.
Above-mentioned wafer thining method, wherein between the step S1 and the step S2 further include:
It is cleaned using the back side of the cleaning solution to the equipment wafer.
Above-mentioned wafer thining method, wherein the cleaning solution is water.
The utility model has the advantages that a kind of wafer thining method proposed by the present invention, can remove the impurity and residual that grinding generates, together When avoid oxide layer and/or nitration case from ensure that the validity of grinding to the influence of grinding effect.
Detailed description of the invention
Fig. 1 is the step flow chart of wafer thining method in one embodiment of the invention；
Fig. 2 is that different lapping liquids correspond to the thinned flatness generated (most in wafer thining method in one embodiment of the invention Big thickness-minimum thickness) line chart.
Specific embodiment
Invention is further explained with reference to the accompanying drawings and examples.
In a preferred embodiment, as shown in Figure 1, proposing a kind of wafer thining method, it is brilliant to be applied to an equipment The round back side, the front of equipment wafer are connect with a carrying wafer；Wherein it is possible to include:
Step S1 grinds the back side of equipment wafer using one first grinding technics, by the back side of equipment wafer The first preset thickness is thinned；
Step S2 grinds the back side of equipment wafer using one second grinding technics, by the back side of equipment wafer The second preset thickness is thinned；
Wherein, in step S1, the first grinding technics is to be ground using the back side of first lapping liquid to equipment wafer；Step In rapid S2, the second grinding technics is to use to be ground for removing the second lapping liquid of residue.
In above-mentioned technical proposal, after carrying wafer is bonded with equipment wafer in front, carrying wafer should be located at equipment wafer Lower section, the back side of equipment wafer be then exposed to top, can be ground under the work of milling apparatus；Crystalline substance in the present invention Circle thining method can be applied between wet etching twice, it is therefore an objective to control equipment wafer in 3 microns, different etching The etching effect of liquid can be as shown in Figure 2；Step S1 is mainly used for the impurity of the backside surface of eliminating equipment wafer and/or residual It stays, step S2 is then that one second default thickness is removed and be thinned to the oxide layer and/or nitration case at the back side of equipment wafer Degree.
In a preferred embodiment, the back side of equipment wafer can be formed by silicon, silica and silicon nitride, can also be with The substrate material for being considered equipment wafer is silicon and its derivative.
In a preferred embodiment, the first preset thickness can be 1.5 μm of (micron)~3.5 μm, for example, can To be 2.6 μm or 2.7 μm or 2.8 μm or 2.9 μm or 3.0 μm or 3.1 μm or 3.2 μm or 3.3 μm or 3.4 μm etc..
In a preferred embodiment, the second preset thickness can be 0.05 μm~0.2 μm, for example, can be 0.06 μm or 0.09 μm or 0.12 μm or 0.15 μm or 0.18 μm etc..
In a preferred embodiment, in step S1, the first lapping liquid is with high grinding rate to the back side of equipment wafer It is ground, high grinding rate is 0.5~1.5 μm/min ([mu), for example, can be 0.6 μm/min or 0.7 μm/min or 0.8 μm/min or 0.9 μm/min or 1.0 μm/min or 1.1 μm/min or 1.2 μm/min etc..
In a preferred embodiment, the first lapping liquid may include silica and water.In above-described embodiment, preferably The ratio of ground, silica and water can be 1:10~1:20, for example, can be 1:12 or 1:15 or 1: 18 or 1:25 or 1:28 etc..
In above-described embodiment, it is preferable that it is 0.5~1.5 that the first lapping liquid, which selects ratio to the grinding rate of silicon and silica,；
It is 0.2~1.0 that first lapping liquid, which selects ratio to the grinding rate of silica and silicon nitride,.
In above-mentioned technical proposal, the first lapping liquid such as can be 0.6 to the grinding rate selection percentage of silicon and silica, or 0.7 or 0.9 or 1.2 or 1.3 or 1.4 etc.；First lapping liquid to the grinding rate selection percentage of silica and silicon nitride such as It can be 0.3 or 0.6 or 0.7 or 0.8 or 0.9 etc..
In a preferred embodiment, the second lapping liquid is alkaline solution, can be to the backside surface of equipment wafer Oxide layer and/or nitration case are corroded, so that the thinned thickness of grinding will not depositing because of oxide layer and/or nitration case And it is too low, ensure that thinned overall thickness can reach technique requirement.
In above-described embodiment, it is preferable that the second lapping liquid includes SiO2And H2O2With other organic additives, SiO2It is two Silica, H2O2For hydrogen peroxide.
In above-described embodiment, it is preferable that SiO2And H2O2Ratio be 1:10~1:30, for example, can be 1:12, Or 1:15 or 1:18 or 1:25 or 1:28 etc..
In a preferred embodiment, between step S1 and step S2 further include:
It is cleaned using the back side of the cleaning solution to equipment wafer.
In above-described embodiment, it is preferable that cleaning solution can be water, and being also possible to other has cleaning impurity or remaining clear Washing lotion.
In conclusion a kind of wafer thining method proposed by the present invention, applied to the back side of an equipment wafer, equipment wafer Front with one carry wafer connect；Include: step S1, the back side of equipment wafer is ground using one first grinding technics Mill, by the first preset thickness of thinning back side of equipment wafer；Step S2, using one second grinding technics to the back of equipment wafer Face is ground, by the second preset thickness of thinning back side of equipment wafer；Wherein, in step S1, the first grinding technics is to adopt It is ground with the back side of first lapping liquid to equipment wafer；In step S2, the second grinding technics is using for removing residual Second lapping liquid of object is ground；The impurity and residual that grinding generates can be removed, while avoiding oxide layer and/or nitration case Influence to grinding effect ensure that the validity of grinding.
By description and accompanying drawings, the exemplary embodiments of the specific structure of specific embodiment are given, based on present invention essence Mind can also make other conversions.Although foregoing invention proposes existing preferred embodiment, however, these contents are not intended as Limitation.
For a person skilled in the art, after reading above description, various changes and modifications undoubtedly be will be evident. Therefore, appended claims should regard the whole variations and modifications for covering true intention and range of the invention as.It is weighing The range and content of any and all equivalences, are all considered as still belonging to the intent and scope of the invention within the scope of sharp claim.

Claims (13)

1. a kind of wafer thining method, applied to the back side of an equipment wafer, the front of the equipment wafer and a carrying wafer Connection；It is characterised by comprising:
Step S1 is ground using the back side of one first grinding technics to the equipment wafer, by the equipment wafer The first preset thickness of thinning back side；
Step S2 is ground using the back side of one second grinding technics to the equipment wafer, by the equipment wafer The second preset thickness of thinning back side；
Wherein, in the step S1, first grinding technics be using the first lapping liquid to the back side of the equipment wafer into Row grinding；In the step S2, second grinding technics is to use to be ground for removing the second lapping liquid of residue.
2. wafer thining method according to claim 1, which is characterized in that the back side of the equipment wafer is by silicon, oxidation Silicon and silicon nitride are formed.
3. wafer thining method according to claim 1, which is characterized in that first preset thickness is 1.5 μm~3.5 μm。
4. wafer thining method according to claim 1, which is characterized in that second preset thickness be 0.05 μm~ 0.2μm。
5. wafer thining method according to claim 1, which is characterized in that in the step S1, first lapping liquid It is ground with the back side of the high grinding rate to the equipment wafer, the high grinding rate is 0.5~1.5 μm/min.
6. wafer thining method according to claim 1 or 5, which is characterized in that first lapping liquid includes titanium dioxide Silicon and water.
7. wafer thining method according to claim 6, which is characterized in that the ratio of silica and water is 1:10~1: 20。
8. wafer thining method according to claim 1, which is characterized in that first lapping liquid is to silicon and silica It is 0.5~1.5 that grinding rate, which selects ratio,；
It is 0.2~1.0 that first lapping liquid, which selects ratio to the grinding rate of silica and silicon nitride,.
9. wafer thining method according to claim 1, which is characterized in that second lapping liquid is alkaline solution.
10. wafer thining method according to claim 9, which is characterized in that second lapping liquid includes SiO2With H2O2。
11. wafer thining method according to claim 10, which is characterized in that SiO2And H2O2Ratio be 1:10~1: 30。
12. wafer thining method according to claim 1, which is characterized in that between the step S1 and the step S2 Further include:
It is cleaned using the back side of the cleaning solution to the equipment wafer.
13. wafer thining method according to claim 12, which is characterized in that the cleaning solution is water.
CN201810786447.4A 2018-07-17 2018-07-17 A kind of wafer thining method Pending CN109037033A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201810786447.4A CN109037033A (en) 2018-07-17 2018-07-17 A kind of wafer thining method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201810786447.4A CN109037033A (en) 2018-07-17 2018-07-17 A kind of wafer thining method

Publications (1)

Publication Number Publication Date
CN109037033A true CN109037033A (en) 2018-12-18

Family

ID=64643621

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201810786447.4A Pending CN109037033A (en) 2018-07-17 2018-07-17 A kind of wafer thining method

Country Status (1)

Country Link
CN (1) CN109037033A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109848814A (en) * 2019-02-26 2019-06-07 北京中电科电子装备有限公司 A kind of full-automatic wafer attenuated polishing device
CN112846948A (en) * 2019-11-28 2021-05-28 东莞新科技术研究开发有限公司 Wafer surface processing method
CN116852183A (en) * 2023-08-02 2023-10-10 山东有研半导体材料有限公司 Grinding process for improving wafer morphology of large wafer grinder

Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6276997B1 (en) * 1998-12-23 2001-08-21 Shinhwa Li Use of chemical mechanical polishing and/or poly-vinyl-acetate scrubbing to restore quality of used semiconductor wafers
WO2002017411A1 (en) * 2000-08-23 2002-02-28 Fine Semitech Co., Ltd. Polishing apparatus comprising pad and polishing method using the same
US20020175143A1 (en) * 2001-05-22 2002-11-28 Seh America, Inc. Processes for polishing wafers
TW200811991A (en) * 2006-08-24 2008-03-01 United Microelectronics Corp Complex chemical mechanical polishing and method for manufacturing shallow trench isolation structure
CN101308790A (en) * 2007-05-16 2008-11-19 联华电子股份有限公司 Method for removing dielectric layer on substrate and chemical mechanical polishing process
CN102371534A (en) * 2010-08-24 2012-03-14 中芯国际集成电路制造(上海)有限公司 Chemical mechanical polishing method for surface of wafer
CN102623327A (en) * 2011-01-31 2012-08-01 中芯国际集成电路制造(上海)有限公司 Chemical mechanical lapping method
CN104802071A (en) * 2014-01-24 2015-07-29 中芯国际集成电路制造(上海)有限公司 Chemical mechanical polishing method
CN104802068A (en) * 2014-01-24 2015-07-29 中芯国际集成电路制造(上海)有限公司 Chemical mechanical polishing method
CN106558529A (en) * 2015-09-30 2017-04-05 无锡华润微电子有限公司 Shallow trench isolation method
EP3264449A1 (en) * 2016-06-28 2018-01-03 Phoenix Silicon International Corp. Manufacturing process of wafer thinning

Patent Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6276997B1 (en) * 1998-12-23 2001-08-21 Shinhwa Li Use of chemical mechanical polishing and/or poly-vinyl-acetate scrubbing to restore quality of used semiconductor wafers
WO2002017411A1 (en) * 2000-08-23 2002-02-28 Fine Semitech Co., Ltd. Polishing apparatus comprising pad and polishing method using the same
US20020175143A1 (en) * 2001-05-22 2002-11-28 Seh America, Inc. Processes for polishing wafers
TW200811991A (en) * 2006-08-24 2008-03-01 United Microelectronics Corp Complex chemical mechanical polishing and method for manufacturing shallow trench isolation structure
CN101308790A (en) * 2007-05-16 2008-11-19 联华电子股份有限公司 Method for removing dielectric layer on substrate and chemical mechanical polishing process
CN102371534A (en) * 2010-08-24 2012-03-14 中芯国际集成电路制造(上海)有限公司 Chemical mechanical polishing method for surface of wafer
CN102623327A (en) * 2011-01-31 2012-08-01 中芯国际集成电路制造(上海)有限公司 Chemical mechanical lapping method
CN104802071A (en) * 2014-01-24 2015-07-29 中芯国际集成电路制造(上海)有限公司 Chemical mechanical polishing method
CN104802068A (en) * 2014-01-24 2015-07-29 中芯国际集成电路制造(上海)有限公司 Chemical mechanical polishing method
CN106558529A (en) * 2015-09-30 2017-04-05 无锡华润微电子有限公司 Shallow trench isolation method
EP3264449A1 (en) * 2016-06-28 2018-01-03 Phoenix Silicon International Corp. Manufacturing process of wafer thinning

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109848814A (en) * 2019-02-26 2019-06-07 北京中电科电子装备有限公司 A kind of full-automatic wafer attenuated polishing device
CN112846948A (en) * 2019-11-28 2021-05-28 东莞新科技术研究开发有限公司 Wafer surface processing method
CN112846948B (en) * 2019-11-28 2024-02-23 东莞新科技术研究开发有限公司 Wafer surface processing method
CN116852183A (en) * 2023-08-02 2023-10-10 山东有研半导体材料有限公司 Grinding process for improving wafer morphology of large wafer grinder
CN116852183B (en) * 2023-08-02 2024-04-02 山东有研半导体材料有限公司 Grinding process for improving wafer morphology of large wafer grinder

Similar Documents

Publication Publication Date Title
CN109037033A (en) A kind of wafer thining method
US9956663B2 (en) Method for polishing silicon wafer
JP2012060149A (en) Method for polishing substrate composed of semiconductor material
CN109500663A (en) A kind of polishing process reducing by 8 inches of silicon polished surface roughnesses
CN109671801A (en) Ultra-thin super optical flat plate base and preparation method thereof
US20200276619A1 (en) Cleaning member attaching part, cleaning member assembly and substrate cleaning apparatus
WO2005098921A1 (en) Alkaline etchant for controlling surface roughness of semiconductor wafer
CN102814727A (en) Method for chemically and mechanically grinding shallow trench isolation structure
CN103270580A (en) Semiconductor wafer cleaning method
TWI313483B (en)
US9305851B2 (en) Systems and methods for chemical mechanical planarization with fluorescence detection
KR20020017910A (en) Method for converting a reclaim wafer into a semiconductor wafer
CN103094090A (en) Method making back of wafer flat
US20100285655A1 (en) Method of producing bonded wafer
Zhao et al. Wafer backside thinning process integrated with post-thinning clean and TSV exposure recess etch
JP2015220370A (en) Method for manufacturing silicon wafer and silicon wafer
CN102909639B (en) The surface treatment method of Semiconductor substrate
US20230066183A1 (en) Method of fabricating a semiconductor structure and semiconductor structure obtained therefrom
CN111384204A (en) Back processing technology of back-illuminated photoelectric device
EP1968102B1 (en) Method of evaluation of bonded wafer
CN102485420A (en) Processing method capable of reducing surface roughness and surface damage of silicon wafer
CN110416126A (en) Board and wafer thining method is thinned in wafer
US7955874B2 (en) Method of producing bonded silicon wafer
CN109360805A (en) A kind of preparation method of figure soi wafer
CN110429022B (en) Method for thinning crystal back

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication
RJ01 Rejection of invention patent application after publication

Application publication date: 20181218