CN109003767B - Piezoresistor horizontally mounted and preparation method thereof - Google Patents
Piezoresistor horizontally mounted and preparation method thereof Download PDFInfo
- Publication number
- CN109003767B CN109003767B CN201810793502.2A CN201810793502A CN109003767B CN 109003767 B CN109003767 B CN 109003767B CN 201810793502 A CN201810793502 A CN 201810793502A CN 109003767 B CN109003767 B CN 109003767B
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- layer
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- pin
- cushion layer
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- 238000002360 preparation method Methods 0.000 title claims abstract description 10
- 239000011248 coating agent Substances 0.000 claims description 5
- 238000000576 coating method Methods 0.000 claims description 5
- 238000009434 installation Methods 0.000 claims description 4
- 238000004519 manufacturing process Methods 0.000 claims description 3
- 238000005253 cladding Methods 0.000 claims 1
- 239000000463 material Substances 0.000 claims 1
- 238000005538 encapsulation Methods 0.000 abstract description 15
- 239000008393 encapsulating agent Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000004075 alteration Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
- H01C7/10—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material voltage responsive, i.e. varistors
- H01C7/105—Varistor cores
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/006—Apparatus or processes specially adapted for manufacturing resistors adapted for manufacturing resistor chips
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Manufacturing & Machinery (AREA)
- Thermistors And Varistors (AREA)
Abstract
The invention provides a piezoresistor which is horizontally arranged, comprising a chip component, wherein the opposite sides of the chip component are respectively connected with a first pin and a second pin, the opposite sides of the chip component are respectively provided with a first cushion layer and a second cushion layer, the first cushion layer is in a convex hull, one end of the first cushion layer extends to the end part of the chip component, the other end of the first cushion layer extends to the end part of the first pin, the second cushion layer is in a convex hull, one end of the second cushion layer extends to the end part of the chip component, the other end of the second cushion layer extends to the end part of the second pin, the chip component is also coated with an encapsulation layer, and the encapsulation layer is coated with an envelope. The invention also provides a preparation method of the piezoresistor which is horizontally arranged. Compared with the prior art, the invention can effectively solve the problem that the piezoresistor is difficult to fix on the circuit board in the prior art.
Description
Technical Field
The invention relates to a piezoresistor, in particular to a piezoresistor which is horizontally arranged and a preparation method thereof.
Background
The varistor is a resistance device with nonlinear volt-ampere characteristic, and is mainly used for clamping voltage when the circuit is subjected to overvoltage, and absorbing redundant current to protect sensitive devices. The piezoresistor is also called a lying piezoresistor, is mounted on the circuit board in a lying mode, but when the piezoresistor is used, the piezoresistor is influenced by pins, and after being mounted on the circuit board, the piezoresistor is easy to shake due to a certain height difference between the pins of the piezoresistor and a body bracket of the piezoresistor, is unfavorable for being fixed on the circuit board, and is also required to be fixed by other auxiliary mechanisms, so that a certain trouble is brought to the mounting.
Disclosure of Invention
In view of the above, the invention provides a piezoresistor which is horizontally arranged and a preparation method thereof, and aims to solve the problem that the piezoresistor is difficult to fix on a circuit board in the prior art.
In one aspect, the invention provides a piezoresistor for horizontal installation, which comprises a chip component, wherein the opposite sides of the chip component are respectively connected with a first pin and a second pin, the opposite sides of the chip component are respectively provided with a first cushion layer and a second cushion layer, the first cushion layer is in a convex hull, one end of the first cushion layer extends to the end part of the chip component, the other end of the first cushion layer extends to the end part of the first pin, the second cushion layer is in a convex hull, one end of the second cushion layer extends to the end part of the chip component, the other end of the second cushion layer extends to the end part of the second pin, the chip component is further coated with an encapsulation layer, and the encapsulation layer is coated with an envelope.
Further, the thickness of the encapsulating layer is gradually reduced from the top of the chip part to the bottom of the chip part.
Further, the first cushion layer and the second cushion layer are arc convex hulls.
Further, a third pad layer is provided on the top end of the chip component.
Further, a fourth cushion layer and a fifth cushion layer are respectively arranged on two opposite sides of the third cushion layer, one end of the fourth cushion layer extends to the end part of the third cushion layer, the other end of the fourth cushion layer extends to the end part of the first cushion layer and coats the first cushion layer, one end of the fifth cushion layer extends to the end part of the third cushion layer, and the other end of the fifth cushion layer extends to the end part of the second cushion layer and coats the second cushion layer.
Further, the fourth cushion layer and the fifth cushion layer are arc convex hulls.
Further, the top of the encapsulation layer is provided with an arc surface.
On the other hand, the invention also provides a preparation method of the piezoresistor which is horizontally arranged, comprising the following preparation steps:
1) The first pins and the second pins are respectively arranged on two opposite sides of the chip component;
2) Respectively coating a first cushion layer and a second cushion layer on two opposite sides of the chip component, wherein the bottom of the first cushion layer is controlled above the end part of the first pin, and the bottom of the second cushion layer is controlled above the end part of the second pin;
3) At least two passes of the encapsulant are applied over the chip component, the first pad layer, and the second pad layer.
Further, the height of the first pad layer exceeds the first pins by at least 1mm, and the height of the second pad layer exceeds the second pins by at least 1mm.
According to the piezoresistor horizontally mounted and the preparation method thereof, the first cushion layer and the second cushion layer are utilized, so that the formed integral encapsulation layer can be of a structure with one thick end and one thin end, the piezoresistor is shaped like a wedge, a plane structure can be formed between the pins and the main body, the surface of the main body paste plate is parallel to the surface of the lead paste plate, and the problem that the piezoresistor is difficult to fix on a circuit board in the prior art is effectively solved.
Drawings
Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the invention. Also, like reference numerals are used to designate like parts throughout the figures. In the drawings:
fig. 1 is a schematic structural diagram of a high-energy piezoresistor according to an embodiment of the present invention.
Detailed Description
Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
Referring to fig. 1, the resistor in horizontal installation provided by the embodiment of the invention comprises a chip component 1, wherein a first pin 11 and a second pin 12 are respectively connected to two opposite sides of the chip component 1, a first cushion layer 13 and a second cushion layer 14 are respectively arranged on two opposite sides of the chip component 1, the first cushion layer 13 is in an arc convex hull, one end of the first cushion layer 13 extends to the end of the chip component 1, the other end extends to the end of the first pin 11, the second cushion layer 14 is in an arc convex hull, one end of the second cushion layer 14 extends to the end of the chip component 1, the other end extends to the end of the second pin 12, an encapsulation layer 15 is further coated outside the chip component 1, and a cover 16 is coated outside the encapsulation layer 15, so that the thickness of the encapsulation layer 15 gradually thins from the top of the chip component 1 to the bottom of the chip component 1, a wedge-like shape is formed, and the top of the encapsulation layer 15 can also have an arc surface 151.
With continued reference to fig. 1, the chip component 1 is provided with a third pad layer 17, and opposite sides of the third pad layer 17 are respectively provided with a fourth pad layer 171 and a fifth pad layer 172, wherein one end of the fourth pad layer 171 extends to the end of the third pad layer 17, the other end extends to the end of the first pad layer 13 and covers the first pad layer 13, one end of the fifth pad layer 172 extends to the end of the third pad layer 17, the other end extends to the end of the second pad layer 14 and covers the second pad layer 14, and both the fourth pad layer 171 and the fifth pad layer 172 are arc-shaped convex hulls. Through the arrangement of the structure, the structure with one thick end and one thin end of the encapsulation layer can be rapidly formed, and the track for rapidly coating the encapsulation machine is formed by combining the chip components during encapsulation, so that the operation is simple, convenient and rapid, the encapsulation efficiency is higher, the end structure of the chip components is more stable, and the compressive strength is higher.
With continued reference to fig. 1, there is shown a piezoresistor mounted in a recumbent manner and a method for manufacturing the same according to an embodiment of the present invention, which includes the following steps:
s1: a first pin 11 and a second pin 12 are respectively arranged on two opposite sides of the chip component 1;
s2: respectively coating a first cushion layer 13 and a second cushion layer 14 on two opposite sides of the chip component 1, wherein the bottom of the first cushion layer 13 is controlled above the end part of the first pin 11, and the bottom of the second cushion layer 14 is controlled above the end part of the second pin 12;
s3: at least two passes of the encapsulant are applied outside the chip component 1, the first pad layer 13 and the second pad layer 14.
Wherein the height of the first pad layer 13 exceeds the first pin 11:1mm, 1.5mm or 2mm, the height of the second pad layer 14 exceeds the second pins 12:1mm, 1.5mm or 2mm.
In summary, according to the piezoresistor and the manufacturing method thereof for horizontal installation provided by the embodiment, the first cushion layer and the second cushion layer are utilized, so that the formed integral encapsulation layer can be of a structure with one thick end and one thin end, and the piezoresistor is formed to be similar to a wedge-shaped appearance, so that a plane structure is formed between the pins and the main body, the surface of the main body paste board is parallel to the surface of the lead paste board, and the problem that the piezoresistor is difficult to fix on the circuit board in the prior art is effectively solved.
It will be apparent to those skilled in the art that various modifications and variations can be made to the present invention without departing from the spirit or scope of the invention. Thus, it is intended that the present invention also include such modifications and alterations insofar as they come within the scope of the appended claims or the equivalents thereof.
Claims (9)
1. The utility model provides a piezoresistor of horizontal installation, its characterized in that, includes chip part (1), the opposite both sides of chip part (1) are connected with first pin (11) and second pin (12) respectively, the opposite both sides of chip part (1) are provided with first bed course (13) and second bed course (14) respectively, first bed course (13) are the convex closure, the one end of first bed course (13) extends to the tip of chip part (1), the other end extends to the tip of first pin (11), second bed course (14) are the convex closure, the one end of second bed course (14) extends to the tip of chip part (1), the other end extends to the tip of second pin (12), the outside cladding of chip part (1) has envelope (15) still, envelope (16) are wrapped to envelope (15) outside.
2. A recumbent mounted varistor according to claim 1, characterized in that the thickness of the envelope layer (15) tapers from the top of the chip part (1) to the bottom of the chip part (1).
3. A recumbent mounted varistor according to claim 1 or 2, wherein the first and second cushion layers (13, 14) are each arcuate convex hulls.
4. A recumbent mounted varistor according to claim 1, characterized in that the tip of the chip component (1) is provided with a third cushion layer (17).
5. The resistor according to claim 4, wherein a fourth pad layer (171) and a fifth pad layer (172) are respectively disposed on opposite sides of the third pad layer (17), one end of the fourth pad layer (171) extends to an end of the third pad layer (17), the other end extends to an end of the first pad layer (13) and covers the first pad layer (13), and one end of the fifth pad layer (172) extends to an end of the third pad layer (17), and the other end extends to an end of the second pad layer (14) and covers the second pad layer (14).
6. The resistor according to claim 5, wherein the fourth pad layer (171) and the fifth pad layer (172) are each arcuate convex hulls.
7. A recumbent mounted varistor according to claim 1 or 2, characterized in that the top of the envelope layer (15) has a cambered surface (151).
8. The preparation method of the piezoresistor arranged horizontally is characterized by comprising the following preparation steps:
1) A first pin (11) and a second pin (12) are respectively arranged on two opposite sides of the chip component (1);
2) Respectively coating a first cushion layer (13) and a second cushion layer (14) on two opposite sides of the chip component (1), wherein the bottom of the first cushion layer (13) is controlled to be above the end part of the first pin (11), and the bottom of the second cushion layer (14) is controlled to be above the end part of the second pin (12);
3) At least two passes of the coating of the encapsulating material are carried out outside the chip part (1), the first cushion layer (13) and the second cushion layer (14).
9. A method of manufacturing a recumbently mounted varistor according to claim 8, characterized in that the first pad layer (13) has a height exceeding the first pins (11) by at least 1mm and the second pad layer (14) has a height exceeding the second pins (12) by at least 1mm.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810793502.2A CN109003767B (en) | 2018-07-18 | 2018-07-18 | Piezoresistor horizontally mounted and preparation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810793502.2A CN109003767B (en) | 2018-07-18 | 2018-07-18 | Piezoresistor horizontally mounted and preparation method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN109003767A CN109003767A (en) | 2018-12-14 |
| CN109003767B true CN109003767B (en) | 2023-11-28 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201810793502.2A Active CN109003767B (en) | 2018-07-18 | 2018-07-18 | Piezoresistor horizontally mounted and preparation method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN109003767B (en) |
Citations (14)
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| CN1192049A (en) * | 1992-02-26 | 1998-09-02 | 国际商业机器公司 | Refractory metal capped low resistivity metal conductor lines and vias formed using PVD and CVD |
| KR20040052145A (en) * | 2002-12-13 | 2004-06-19 | 엘지이노텍 주식회사 | Ceramic package |
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| CN102629599A (en) * | 2012-04-06 | 2012-08-08 | 天水华天科技股份有限公司 | Quad flat no lead package and production method thereof |
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| CN204010867U (en) * | 2014-07-28 | 2014-12-10 | 肇庆爱晟电子科技有限公司 | A kind of high temperature resistant moistureproof NTC themistor |
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| CN108122651A (en) * | 2017-12-20 | 2018-06-05 | 肇庆爱晟传感器技术有限公司 | A kind of ceramic membrane glass-encapsulated resistance and preparation method thereof |
| CN208538583U (en) * | 2018-07-18 | 2019-02-22 | 昆山万盛电子有限公司 | A kind of piezoresistor of accumbency installation |
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| US9431158B2 (en) * | 2014-08-19 | 2016-08-30 | Longke Electronics (Huiyang) Co., Ltd. | Barrel-shaped fireproof and explosion-proof surge protection device with over-temperature protection function |
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|---|---|---|---|---|
| GB1037822A (en) * | 1961-12-15 | 1966-08-03 | Ass Elect Ind | Improvements relating to non-linear electrical resistance elements |
| CN1192049A (en) * | 1992-02-26 | 1998-09-02 | 国际商业机器公司 | Refractory metal capped low resistivity metal conductor lines and vias formed using PVD and CVD |
| JPH10116707A (en) * | 1996-10-14 | 1998-05-06 | Mitsubishi Materials Corp | Chip type thermistor and its manufacturing method |
| KR20040052145A (en) * | 2002-12-13 | 2004-06-19 | 엘지이노텍 주식회사 | Ceramic package |
| CN101996766A (en) * | 2009-08-21 | 2011-03-30 | Tdk株式会社 | Electronic component and manufacturing method thereof |
| CN102629599A (en) * | 2012-04-06 | 2012-08-08 | 天水华天科技股份有限公司 | Quad flat no lead package and production method thereof |
| CN203218048U (en) * | 2013-03-18 | 2013-09-25 | 兴勤电子工业股份有限公司 | Explosion-proof pressure sensitive resistor |
| CN204010867U (en) * | 2014-07-28 | 2014-12-10 | 肇庆爱晟电子科技有限公司 | A kind of high temperature resistant moistureproof NTC themistor |
| JP2017037943A (en) * | 2015-08-07 | 2017-02-16 | Koa株式会社 | Surface-mounted chip varistor |
| CN206331859U (en) * | 2016-10-25 | 2017-07-14 | 东莞碧克电子有限公司 | Piezo-resistance with overcurrent protection function |
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| CN206947079U (en) * | 2017-06-09 | 2018-01-30 | 东莞市华至暄电子有限公司 | A kind of high temperature resistant piezo-resistance |
| CN108122651A (en) * | 2017-12-20 | 2018-06-05 | 肇庆爱晟传感器技术有限公司 | A kind of ceramic membrane glass-encapsulated resistance and preparation method thereof |
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Also Published As
| Publication number | Publication date |
|---|---|
| CN109003767A (en) | 2018-12-14 |
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