CN108735798A - SiC FET components and its manufacturing method with low starting voltage - Google Patents
SiC FET components and its manufacturing method with low starting voltage Download PDFInfo
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- CN108735798A CN108735798A CN201810284540.5A CN201810284540A CN108735798A CN 108735798 A CN108735798 A CN 108735798A CN 201810284540 A CN201810284540 A CN 201810284540A CN 108735798 A CN108735798 A CN 108735798A
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- silicon carbide
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- type silicon
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 8
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims abstract description 69
- 229910010271 silicon carbide Inorganic materials 0.000 claims abstract description 69
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 14
- 238000000407 epitaxy Methods 0.000 claims abstract description 13
- -1 aluminium copper silicon Chemical compound 0.000 claims abstract description 11
- 238000005530 etching Methods 0.000 claims description 18
- 238000003384 imaging method Methods 0.000 claims description 18
- 238000000151 deposition Methods 0.000 claims description 13
- 230000008021 deposition Effects 0.000 claims description 13
- 229910052751 metal Inorganic materials 0.000 claims description 7
- 239000002184 metal Substances 0.000 claims description 7
- 229920005591 polysilicon Polymers 0.000 claims description 7
- 230000003647 oxidation Effects 0.000 claims description 4
- 238000007254 oxidation reaction Methods 0.000 claims description 4
- 238000002513 implantation Methods 0.000 claims description 3
- 150000002500 ions Chemical class 0.000 claims description 3
- 229920002120 photoresistant polymer Polymers 0.000 claims description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims 2
- 229910052760 oxygen Inorganic materials 0.000 claims 2
- 239000001301 oxygen Substances 0.000 claims 2
- 230000005684 electric field Effects 0.000 abstract description 7
- 238000010586 diagram Methods 0.000 description 5
- 238000009825 accumulation Methods 0.000 description 4
- 230000005669 field effect Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 230000024241 parasitism Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000008092 positive effect Effects 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7827—Vertical transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System
- H01L29/1608—Silicon carbide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66053—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
- H01L29/66068—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
Abstract
The invention discloses a kind of SiC FET components and its manufacturing method with low starting voltage, it includes insulating layer etc., aluminium copper silicon layer both sides are connect with insulating layer, insulating layer is connect with gate oxide, polycrystalline silicon grid layer is located in gate oxide, Xiao Jite layers connect with aluminium copper silicon layer, p-type silicon carbide layer is connect with Xiao Jite layers, the wellblocks N and N-type source layer are connected and are respectively positioned between gate oxide, p-type silicon carbide layer, gate oxide, the wellblocks N, p-type silicon carbide layer are connect with N-type silicon carbide epitaxy area side, and the N-type silicon carbide epitaxy area other side is connect with N-type drain floor.The present invention can solve the problems, such as that conventional MOS FET turnaround times are long, reduction is common in the shortcomings that SiC components high start voltage and improves reliability issues of the gate oxide caused by high electric field in SiC MOSFET components, the efficiency of power device is substantially improved, ability with Quick-return reduces the starting voltage of component and improves SiC components operating in the problem of carrier transport factor reduces under reversing mode.
Description
Technical field
The present invention relates to a kind of SiC (silicon carbide) FET (abbreviation of Field Effect Transistor, field effect transistors
Pipe) component and its manufacturing method, more particularly to a kind of SiC FET components and its manufacturing method with low starting voltage.
Background technology
The component architecture of general SiC MOSFET is since SiC can bear higher critical electric field, we can in design
Enough voltage endurance capabilities are obtained with denseer N-type substrate and the concentration of the wellblocks P, but the denseer wellblocks P can improve component
Starting voltage, in addition SiC itself has higher energy gap, therefore SiC MOSFET need higher gate voltage (gate
Voltage) to form inversion layer conducting electric current, therefore it is difficult the starting voltage for reducing SiC MOSFET in the design of component；
In addition under such component architecture, the diode of he parasitism itself is simple PN diode and does not have Quick-return energy
Power, for requiring component to have the characteristic of fast diode turnaround time (Trr) in high-speed applications, this is that SiC MOSFET are another
A problem to be solved.
Invention content
Technical problem to be solved by the invention is to provide a kind of SiC FET components with low starting voltage and its manufactures
Method can relatively easily reduce the starting voltage of component, have Quick-return ability.
The present invention is to solve above-mentioned technical problem by following technical proposals：The present invention provides a kind of with low starting
The SiC FET components of voltage comprising insulating layer, polycrystalline silicon grid layer, gate oxide, aluminium copper silicon layer, Xiao Jite layers, the wellblocks N, P
Type silicon carbide layer, N-type silicon carbide epitaxy area, N-type drain floor, N-type source floor, aluminium copper silicon layer both sides are connect with insulating layer, absolutely
Edge layer is connect with gate oxide, and polycrystalline silicon grid layer is located in gate oxide, and Xiao Jite layers connect with aluminium copper silicon layer, p-type silicon carbide
Layer is connect with Xiao Jite layers, and the wellblocks N and N-type source layer are connected and be respectively positioned between gate oxide, p-type silicon carbide layer, gate oxidation
Floor, the wellblocks N, p-type silicon carbide layer are connect with the type silicon carbide epitaxy areas N side, and the N-type silicon carbide epitaxy area other side is leaked with N-type
Pole layer connection.
The present invention also provides a kind of manufacturing methods of the SiC FET components with low starting voltage comprising following steps：
Step 1：First groove exposure imaging and etching；
Step 2：After etching and photoresist removal, p-type silicon carbide is deposited；
Step 3：Silicon carbide etch-back；
Step 4：Gate groove exposure imaging and etching；
Step 5：The generation of gate pole oxidation layer and gate pole polysilicon deposition；
Step 6：Polysilicon etch back is carved；
Step 7：Source electrode exposure imaging and N-type mix the implantation of ion again；
Step 8：Dielectric layer deposition and articulamentum exposure imaging and etching；
Step 9：Schottky metal layer deposits；
Step 10：Deposition of metal exposure imaging and etching；
Step 11：Sheath deposition and sheath exposure imaging and etching.
The positive effect of the present invention is that：The present invention has Schottky diode, can solve in conventional MOS FET
In addition portion's parasitism PN junction turnaround time long problem can reduce the shortcomings that being common in SiC components high start voltage and improvement
Reliability issues of the gate oxide caused by high electric field in SiC MOSFET components；SiC material is because have higher energy gap
With the characteristic of higher critical collapse electric field, therefore the efficiency of power device can be substantially improved；With built-in Schottky two
Pole pipe and PN junction, therefore the ability with Quick-return；Since component primary operational is in carrier accumulation pattern, component can be reduced
Starting voltage and improve SiC components and operate under reversing mode the problem of carrier transport factor reduces.
Description of the drawings
Upon reading the detailed description of non-limiting embodiments with reference to the following drawings, other feature of the invention,
Objects and advantages will become more apparent upon：
Fig. 1 is the structural diagram of the present invention.
Fig. 2 is the structural schematic diagram in N-type silicon carbide epitaxy of the present invention area.
Fig. 3 is the schematic diagram of silicon carbide etch-back of the present invention.
Fig. 4 is the schematic diagram that polysilicon etch back of the present invention is carved.
Fig. 5 is the schematic diagram of schottky metal layer of the present invention deposition.
Specific implementation mode
With reference to specific embodiment, the present invention is described in detail.Following embodiment will be helpful to the technology of this field
Personnel further understand the present invention, but the invention is not limited in any way.It should be pointed out that the ordinary skill of this field
For personnel, without departing from the inventive concept of the premise, various modifications and improvements can be made.These belong to the present invention
Protection domain.
As shown in Figure 1, it includes insulating layer 1, polycrystalline silicon grid layer 2, grid that the present invention, which has the SiC FET components of low starting voltage,
Oxide layer 3, aluminium copper silicon floor 4, Xiao Jite floor 5, the wellblocks N 6, p-type silicon carbide layer 7, N-type silicon carbide epitaxy area 8, N-type drain floor 9, N
Type source layer 10,4 both sides of aluminium copper silicon layer are connect with insulating layer 1, and insulating layer 1 is connect with gate oxide 3, polycrystalline silicon grid layer 2
In in gate oxide 3, Xiao Jite layers 5 are connect with aluminium copper silicon layer 4, and p-type silicon carbide layer 7 is connect with Xiao Jite layers 5, the wellblocks N 6 and N
Type source layer 10 is connected and is respectively positioned between gate oxide 3, p-type silicon carbide layer 7, gate oxide 3, the wellblocks N 6, p-type silicon carbide layer
7 connect with 8 side of N-type silicon carbide epitaxy area, and 8 other side of N-type silicon carbide epitaxy area is connect with N-type drain floor 9.
As shown in Fig. 2, in N-type silicon carbide epitaxy area 8 redeposited second thin layer N-type silicon carbide, herein we want
The thickness of second layer SiC and concentration is asked to be below first layer SiC.
There is the present invention manufacturing method of the SiC FET components of low starting voltage to include the following steps：
Step 1：First groove exposure imaging and etching；
Step 2：After etching and photoresist removal, p-type silicon carbide is deposited；
Step 3：As shown in figure 3, silicon carbide etch-back；
Step 4：Gate groove exposure imaging and etching；
Step 5：The generation of gate pole oxidation layer and gate pole polysilicon deposition；
Step 6：As shown in figure 4, polysilicon etch back is carved；
Step 7：Source electrode exposure imaging and N-type mix the implantation of ion again；
Step 8：Dielectric layer deposition and articulamentum exposure imaging and etching；
Step 9：As shown in figure 5, schottky metal layer deposits；
Step 10：Deposition of metal exposure imaging and etching；
Step 11：Sheath deposition and sheath exposure imaging and etching.
The present invention increases a p type island region domain mixed again in the wellblocks N, by the adjustment of the upper parameter of design, component not
Under the situation of unlatching, N-type source layer is interdicted to the electric current between N-type drain layer by the complete vague and general state of the wellblocks N is caused；
In addition gate oxide also is shielded except high electric field simultaneously, improve the reliability issues of silicon carbide MOSFET, and the unlatching of component
It is the electronics accumulation by the wellblocks N, therefore the starting voltage of component is not influenced by the wide energy gap of silicon carbide, and charge accumulation mould
We also can get higher charge transporting ability under formula.
In conclusion the present invention has Schottky diode, when can solve the reply of conventional MOS FET endophyte PN junctions
Between long problem, in addition can reduce the shortcomings that being common in SiC components high start voltage and improve in SiC MOSFET components
Reliability issues of the gate oxide caused by high electric field；SiC material is because have higher energy gap and higher critical collapse
The characteristic of electric field, therefore the efficiency of power device can be substantially improved；With built-in Schottky diode and PN junction, therefore have
There is the ability of Quick-return；Since component primary operational is in carrier accumulation pattern, starting voltage and the improvement of component can be reduced
SiC components operate in the problem of carrier transport factor reduces under reversing mode.
Specific embodiments of the present invention are described above.It is to be appreciated that the invention is not limited in above-mentioned
Particular implementation, those skilled in the art can make various deformations or amendments within the scope of the claims, this not shadow
Ring the substantive content of the present invention.
Claims (2)
1. a kind of SiC FET components with low starting voltage, which is characterized in that it includes insulating layer, polycrystalline silicon grid layer, grid oxygen
Change floor, aluminium copper silicon floor, Xiao Jite floor, the wellblocks N, p-type silicon carbide layer, N-type silicon carbide epitaxy area, N-type drain floor, N-type source floor,
Aluminium copper silicon layer both sides are connect with insulating layer, and insulating layer is connect with gate oxide, and polycrystalline silicon grid layer is located in gate oxide, Xiao Ji
Special layer is connect with aluminium copper silicon layer, and p-type silicon carbide layer is connect with Xiao Jite layers, and the wellblocks N connect with N-type source layer and are respectively positioned on grid oxygen
Change between layer, p-type silicon carbide layer, gate oxide, the wellblocks N, p-type silicon carbide layer are connect with N-type silicon carbide epitaxy area side, N
The type silicon carbide epitaxy area other side is connect with N-type drain floor.
2. a kind of manufacturing method of the SiC FET components with low starting voltage, which is characterized in that it includes the following steps：
Step 1：First groove exposure imaging and etching；
Step 2：After etching and photoresist removal, p-type silicon carbide is deposited；
Step 3：Silicon carbide etch-back；
Step 4：Gate groove exposure imaging and etching；
Step 5：The generation of gate pole oxidation layer and gate pole polysilicon deposition；
Step 6：Polysilicon etch back is carved；
Step 7：Source electrode exposure imaging and N-type mix the implantation of ion again；
Step 8：Dielectric layer deposition and articulamentum exposure imaging and etching；
Step 9：Schottky metal layer deposits；
Step 10：Deposition of metal exposure imaging and etching；
Step 11：Sheath deposition and sheath exposure imaging and etching.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810284540.5A CN108735798A (en) | 2018-04-02 | 2018-04-02 | SiC FET components and its manufacturing method with low starting voltage |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810284540.5A CN108735798A (en) | 2018-04-02 | 2018-04-02 | SiC FET components and its manufacturing method with low starting voltage |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN108735798A true CN108735798A (en) | 2018-11-02 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201810284540.5A Withdrawn CN108735798A (en) | 2018-04-02 | 2018-04-02 | SiC FET components and its manufacturing method with low starting voltage |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN108735798A (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6355944B1 (en) * | 1999-12-21 | 2002-03-12 | Philips Electronics North America Corporation | Silicon carbide LMOSFET with gate reach-through protection |
| CN105576032A (en) * | 2015-08-26 | 2016-05-11 | 上海晶亮电子科技有限公司 | SiC MOSFET (Silicon Carbide Metal Oxide Semiconductor Field Effect Transistor) device unit and manufacturing method thereof |
| CN106206749A (en) * | 2016-09-23 | 2016-12-07 | 兰州大学 | A kind of schottky transistor with unsaturated characteristic and preparation method thereof |
-
2018
- 2018-04-02 CN CN201810284540.5A patent/CN108735798A/en not_active Withdrawn
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6355944B1 (en) * | 1999-12-21 | 2002-03-12 | Philips Electronics North America Corporation | Silicon carbide LMOSFET with gate reach-through protection |
| CN105576032A (en) * | 2015-08-26 | 2016-05-11 | 上海晶亮电子科技有限公司 | SiC MOSFET (Silicon Carbide Metal Oxide Semiconductor Field Effect Transistor) device unit and manufacturing method thereof |
| CN106206749A (en) * | 2016-09-23 | 2016-12-07 | 兰州大学 | A kind of schottky transistor with unsaturated characteristic and preparation method thereof |
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Application publication date: 20181102 |