CN108630531A - 解决有源区位错缺陷的方法及半导体器件 - Google Patents

解决有源区位错缺陷的方法及半导体器件 Download PDF

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CN108630531A
CN108630531A CN201810420914.1A CN201810420914A CN108630531A CN 108630531 A CN108630531 A CN 108630531A CN 201810420914 A CN201810420914 A CN 201810420914A CN 108630531 A CN108630531 A CN 108630531A
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active area
dislocation defects
solving
substrate
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罗清威
徐静静
李赟
周俊
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Wuhan Xinxin Semiconductor Manufacturing Co Ltd
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Wuhan Xinxin Semiconductor Manufacturing Co Ltd
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Abstract

本发明提供一种解决有源区位错缺陷的方法以及半导体器件，所述解决有源区位错缺陷的方法包括：提供衬底，所述衬底设置有有源区；采用低注入能量的方式注入砷元素在所述有源区形成源/漏极，所述低注入能量的方式的工艺条件包括：注入能量为3kV～30kV；进行退火工艺。本发明提供的解决有源区位错缺陷的方法以及半导体器件中，在有源区形成源/漏极时采用低注入能量的方式注入砷元素，调整器件源漏注入条件，减少有源区的晶格错位，有效的防止晶格失配，从而减少漏电流，并通过退火工艺的修复作用，减少有源区位错缺陷，提高产品的性能。

Description

解决有源区位错缺陷的方法及半导体器件
技术领域
本发明涉及集成电路制造技术领域，尤其涉及一种解决有源区位错缺陷的方法及半导体器件。
背景技术
随着集成电路设计中器件尺寸的不断缩小以及制造技术的进步，需要对有源区也进行相应的缩小，甚至还需要对器件沟道进行缩小，以实现器件尺寸的不断微缩。
但是，随着有源区和沟道尺寸的不断缩小，导致源漏之间的应力对器件性能的影响会越来越明显，从而可能形成位错缺陷等产生漏电流，这种影响随着器件尺寸的减小变得越来越不能忽视。
因此，如何提供一种解决位错缺陷的方法是本领域技术人员亟待解决的一个技术问题。
发明内容
本发明的目的在于提供一种解决有源区位错缺陷的方法及半导体器件，解决半导体器件出现位错缺陷的问题。
为了解决上述问题，本发明提供一种解决有源区位错缺陷的方法，所述解决有源区位错缺陷的方法包括：
提供衬底，所述衬底设置有有源区；
采用低注入能量的方式注入砷元素在所述有源区形成源/漏极，所述低注入能量的方式的工艺条件包括：注入能量为3kV～30kV；
进行退火工艺。
可选的，在所述解决有源区位错缺陷的方法中，所述退火工艺的工艺条件包括：温度为800℃～1100℃，时间为1mS～20S。
可选的，在所述解决有源区位错缺陷的方法中，所述衬底上还设置有侧墙，所述侧墙位于所述有源区外侧。
可选的，在所述解决有源区位错缺陷的方法中，所述侧墙朝向所述有源区倾斜形成夹角，所述夹角的角度小于80°。
可选的，在所述解决有源区位错缺陷的方法中，所述侧墙采用浅沟槽隔离工艺，所述侧墙的材料包括氧化硅和/或氮化硅。
可选的，在所述解决有源区位错缺陷的方法中，所述侧墙的高度高于所述有源区。
可选的，在所述解决有源区位错缺陷的方法中，所述衬底上还设置有栅极，所述栅极还包括栅氧化层，所述栅氧化层附着在所述衬底上。
可选的，在所述解决有源区位错缺陷的方法中，所述衬底上还设置有轻掺杂区，所述轻掺杂区位于所述栅极两侧。
本发明还提供一种半导体器件，所述半导体器件采用上述解决有源区位错缺陷的方法形成源/漏极。
综上所述，本发明提供的解决有源区位错缺陷的方法以及半导体器件中，在有源区形成源/漏极时采用低注入能量的方式注入砷元素，调整器件源漏注入条件，减少有源区的晶格错位，有效的防止晶格失配，从而减少漏电流，并通过退火工艺的修复作用，减少有源区位错缺陷，提高产品的性能。
附图说明
图1为本发明实施例的解决有源区位错缺陷的方法的流程图；
图2-3为本发明实施例的半导体器件的剖面结构示意图；
其中，10-衬底，11-有源区，20-侧墙，30-栅极，31-栅氧化层，40-轻掺杂区。
具体实施方式
为了使本发明的目的、特征和优点能够更加明显易懂，请参阅附图。须知，本说明书所附图式所绘示的结构、比例、大小等，均仅用以配合说明书所揭示的内容，以供熟悉此技术的人士了解与阅读，并非用以限定本发明可实施的限定条件，故不具技术上的实质意义，任何结构的修饰、比例关系的改变或大小的调整，在不影响本发明所能产生的功效及所能达成的目的下，均应仍落在本发明所揭示的技术内容得能涵盖的范围内。
如图1所示，本发明提供一种解决有源区位错缺陷的方法，所述凹陷缺陷的检测方法包括：
S10、提供衬底，所述衬底设置有有源区；
S20、采用低注入能量的方式注入砷元素在所述有源区形成源/漏极，所述低注入能量的方式的工艺条件包括：注入能量为3kV～30kV；
S30、进行退火工艺。
为使本发明的特征和优点能够更为明显易懂，下面结合附图对本发明的具体实施例做详细说明。
如图2所示，首先，按照步骤S10，提供衬底10，衬底10可以是半导体领域技术人员熟知的各种半导体材料，例如单晶或多晶结构的硅或锗，也可以包括化合物半导体结构的碳化硅、锑化铟或氮化镓等，可以理解的是，衬底上可是已经形成各种半导体结构、器件以及线路的半导体衬底，所述衬底设置有有源区11，有源区用于后续形成源/漏极，有源区11的尺寸大小等关系在本申请中不受限制。
继续参考图2所示，在本实施例中，所述衬底10上还设置有侧墙20，所述侧墙20位于所述有源区11外侧，侧墙20可以采用围绕有源区的方式，也可以分为多段侧墙分部在源区的侧面，通过侧墙来防止有源区在掺杂工艺中产生的不良影响，通过侧墙的隔离作用减少有源区的应力作用以及漏电流等。
在侧墙的结构上，所述侧墙20朝向所述有源区11倾斜形成夹角α，所述夹角α的角度小于80°，夹角α可以是7，°、6，°、5，°或45°等，侧墙2，形成夹角也就是形成上粗下细的结构，在有源区进行其它掺杂工艺时，由于侧墙上部受到的工艺影响越大，使侧墙上部较粗的部分可以更好的起到隔离作用。
可选的，所述侧墙2，采用浅沟槽隔离(Shallow Trench Isolation，STI)工艺，所述侧墙20的材料包括氧化硅(SiO2)和/或氮化硅(Si3N4)。
为了较佳的实现隔离，所述侧墙20的高度高于所述有源区11，可通过先在衬底上形成刻蚀阻挡层，刻蚀该刻蚀阻挡层以及衬底形成沟槽，向该沟填充介质如氧化硅或氮化硅，去除掉刻蚀阻挡层后即完成STI工艺形成该侧墙结构。
在本实施例中，所述衬底上还设置有栅极30，所述栅极30具有栅氧化层31，所述栅氧化层31附着在所述衬底10上，也就是形成浮栅结构，浮栅中没有电子注入时，在控制栅加电压时，浮栅中的电子跑到上层，下层出现空穴，由于感应，便会吸引电子，并开启沟道，如果浮栅中有电子的注入时，即加大了的管子的阈值电压，使沟道处于关闭状态，这样就实现了源/漏极之间的开关功能。
然后，按照步骤S20，通过采用低注入能量的方式注入砷元素在所述有源区形成源/漏极，在注入离子束轰击砷的靶材完成砷元素注入到有源区中，所述低注入能量的方式的工艺条件包括：注入能量为3kV～30kV，利用低注入能量的砷元素对有源区产生的晶格损失较少的原理，通过优化源/漏极注入条件来实现有源区晶格缺陷的减少，从而使得产品的漏电流降低。
接着，按照步骤S30，进行退火工艺，通过退火工艺可以恢复晶体的结构和消除缺陷，还能达到激活杂质的目的，即把处于间隙位置的杂质原子通过退火而让它们进入替换位置，还可使得少数载流子的寿命及迁移率也会得到不同程度的恢复。
可选的，所述退火工艺的工艺条件包括：温度为800℃～1100℃，时间为1mS～20S，可使晶圆在一定的真空度或氮、氩等高纯度气体的保护下，结合上述工艺条件完成退火工艺，例如，根据产品的需要，可进行较短时间的快速退火处理(Rapid Thermal Processing，RTP)，可采用1mS以上20S以上任一时间长度，晶圆中杂质运动小，玷污小和加工时间短，具体的温度设定可为800℃、900℃、1000℃或1100℃以及它们之间一范围内。
如图3所示，所述衬底10上还设置有轻掺杂区40(Lightly Doped Drain，LDD)，所述轻掺杂区40位于所述栅极30两侧，即处于源/漏极与栅极之间在沟道的附近，通过轻掺杂区40可减弱源/漏极电场，从而可改进热电子退化效应，也就是在沟道中靠近漏极的附近设置一个低掺杂的源/漏区，让该低掺杂的源/漏区也承受部分电压，这种结构可防止热电子退化效应，其中轻掺杂是相对于源漏极掺杂浓度而言的。
与之相应的，本发明还提供一种半导体器件，所述半导体器件采用如上所述解决有源区位错缺陷的方法形成源/漏极，采用低注入能量的方式注入砷元素形成的源/漏极由于改善了位错缺陷的问题，使半导体器件的漏电流较小，从而可提升产品的性能及良率。
综上所述，本发明提供的解决有源区位错缺陷的方法以及半导体器件中，在有源区形成源/漏极时采用低注入能量的方式注入砷元素，调整器件源漏注入条件，减少有源区的晶格错位，有效的防止晶格失配，从而减少漏电流，并通过退火工艺的修复作用，减少有源区位错缺陷，提高产品的性能。
上述描述仅是对本发明较佳实施例的描述，并非对本发明范围的任何限定，本发明领域的普通技术人员根据上述揭示内容做的任何变更、修饰，均属于权利要求书的保护范围。

Claims (9)

1.一种解决有源区位错缺陷的方法，其特征在于，所述解决有源区位错缺陷的方法包括：
提供衬底，所述衬底设置有有源区；
采用低注入能量的方式注入砷元素在所述有源区形成源/漏极，所述低注入能量的方式的工艺条件包括：注入能量为3kV～30kV；
进行退火工艺。
2.如权利要求1所述解决有源区位错缺陷的方法，其特征在于，所述退火工艺的工艺条件包括：温度为800℃～1100℃，时间为1mS～20S。
3.如权利要求1所述解决有源区位错缺陷的方法，其特征在于，所述衬底上还设置有侧墙，所述侧墙位于所述有源区外侧。
4.如权利要求3所述解决有源区位错缺陷的方法，其特征在于，所述侧墙朝向所述有源区倾斜形成夹角，所述夹角的角度小于80°。
5.如权利要求3或4所述解决有源区位错缺陷的方法，其特征在于，所述侧墙采用浅沟槽隔离工艺，所述侧墙的材料包括氧化硅和/或氮化硅。
6.如权利要求5所述解决有源区位错缺陷的方法，其特征在于，所述侧墙的高度高于所述有源区。
7.如权利要求1所述解决有源区位错缺陷的方法，其特征在于，所述衬底上还设置有栅极，所述栅极具有栅氧化层，所述栅氧化层附着在所述衬底上。
8.如权利要求7所述解决有源区位错缺陷的方法，其特征在于，所述衬底上还设置有轻掺杂区，所述轻掺杂区位于所述栅极两侧。
9.一种半导体器件，所述半导体器件采用如权利要求1-8中任意一项所述解决有源区位错缺陷的方法形成源/漏极。
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