CN108550624A - A kind of high heat dispersion double grid gallium oxide field-effect thin film transistor (TFT) and preparation method thereof - Google Patents
A kind of high heat dispersion double grid gallium oxide field-effect thin film transistor (TFT) and preparation method thereof Download PDFInfo
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- CN108550624A CN108550624A CN201810316763.5A CN201810316763A CN108550624A CN 108550624 A CN108550624 A CN 108550624A CN 201810316763 A CN201810316763 A CN 201810316763A CN 108550624 A CN108550624 A CN 108550624A
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- AJNVQOSZGJRYEI-UHFFFAOYSA-N digallium;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[Ga+3].[Ga+3] AJNVQOSZGJRYEI-UHFFFAOYSA-N 0.000 title claims abstract description 91
- 229910001195 gallium oxide Inorganic materials 0.000 title claims abstract description 91
- 230000005669 field effect Effects 0.000 title claims abstract description 25
- 239000010409 thin film Substances 0.000 title claims abstract description 21
- 238000002360 preparation method Methods 0.000 title claims abstract description 15
- 239000006185 dispersion Substances 0.000 title claims abstract description 14
- 239000000758 substrate Substances 0.000 claims abstract description 38
- 239000002390 adhesive tape Substances 0.000 claims abstract description 19
- OFIYHXOOOISSDN-UHFFFAOYSA-N tellanylidenegallium Chemical compound [Te]=[Ga] OFIYHXOOOISSDN-UHFFFAOYSA-N 0.000 claims abstract description 18
- 239000010410 layer Substances 0.000 claims description 83
- 239000010408 film Substances 0.000 claims description 24
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical compound [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 22
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 claims description 16
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 16
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 claims description 16
- 229910001020 Au alloy Inorganic materials 0.000 claims description 15
- 238000004140 cleaning Methods 0.000 claims description 12
- 239000013078 crystal Substances 0.000 claims description 12
- 229910001069 Ti alloy Inorganic materials 0.000 claims description 10
- 238000000137 annealing Methods 0.000 claims description 10
- 238000012546 transfer Methods 0.000 claims description 10
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 8
- 235000019441 ethanol Nutrition 0.000 claims description 8
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 claims description 8
- 238000000034 method Methods 0.000 claims description 8
- 229910052757 nitrogen Inorganic materials 0.000 claims description 8
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 8
- 238000000231 atomic layer deposition Methods 0.000 claims description 7
- 239000008367 deionised water Substances 0.000 claims description 7
- 229910021641 deionized water Inorganic materials 0.000 claims description 7
- 229910000449 hafnium oxide Inorganic materials 0.000 claims description 7
- 229910001252 Pd alloy Inorganic materials 0.000 claims description 6
- 238000005530 etching Methods 0.000 claims description 6
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 6
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 6
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 5
- 229910052733 gallium Inorganic materials 0.000 claims description 5
- 229910045601 alloy Inorganic materials 0.000 claims description 4
- 239000000956 alloy Substances 0.000 claims description 4
- 238000001035 drying Methods 0.000 claims description 4
- 238000009616 inductively coupled plasma Methods 0.000 claims description 4
- 239000000377 silicon dioxide Substances 0.000 claims description 4
- 239000002344 surface layer Substances 0.000 claims description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 2
- 229910052802 copper Inorganic materials 0.000 claims description 2
- 239000010949 copper Substances 0.000 claims description 2
- 229910003460 diamond Inorganic materials 0.000 claims description 2
- 239000010432 diamond Substances 0.000 claims description 2
- 229910052710 silicon Inorganic materials 0.000 claims description 2
- 239000010703 silicon Substances 0.000 claims description 2
- 230000017525 heat dissipation Effects 0.000 abstract description 6
- 230000000694 effects Effects 0.000 abstract description 5
- 238000000926 separation method Methods 0.000 abstract 1
- 239000000463 material Substances 0.000 description 12
- 230000000052 comparative effect Effects 0.000 description 10
- 238000001259 photo etching Methods 0.000 description 6
- 238000005566 electron beam evaporation Methods 0.000 description 4
- 230000003647 oxidation Effects 0.000 description 3
- 238000007254 oxidation reaction Methods 0.000 description 3
- 239000004411 aluminium Substances 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000002474 experimental method Methods 0.000 description 2
- 239000003292 glue Substances 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 238000012360 testing method Methods 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000011982 device technology Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000002353 field-effect transistor method Methods 0.000 description 1
- 229910052735 hafnium Inorganic materials 0.000 description 1
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 description 1
- 230000001939 inductive effect Effects 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02631—Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78645—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Thin Film Transistor (AREA)
Abstract
The present invention relates to a kind of high heat dispersion double grid gallium oxide field-effect thin film transistor (TFT)s and preparation method thereof, including substrate, bottom gate thin film, bottom gate dielectric layer, gallium oxide channel layer, top gate medium layer, top-gated electrode, source electrode, drain electrode.Wherein, gallium oxide channel layer is transferred on substrate using adhesive tape lift-off technology, very thin thickness, thermal resistance is smaller, good heat dissipation effect, and transistor is double-gate structure, enhance control ability of the gate electrode to carrier by double-gate structure, improve the pinch-off behavior of device, the thermal resistance of transistor substantially reduces, and heat dissipation performance is high.Improve the pinch-off behavior of device.
Description
Technical field
The present invention relates to a kind of high heat dispersion double grid gallium oxide field-effect thin film transistor (TFT) and preparation method thereof, belong to half
Conductor power device technology field.
Background technology
Gallium oxide is a kind of novel direct band gap semiconductor material with wide forbidden band, has that energy gap is big, breakdown electric field is high
The advantages that, the field-effect transistor based on gallium oxide material has many advantages, such as high voltage, low-loss, radiation hardness, in the big work(of high pressure
The fields such as the conversion of rate devices field, especially power supply, electric vehicle, photovoltaic system have wide application prospects.But gallium oxide material
The thermal conductivity of material is very low, and the FET device thermal resistance prepared on gallium oxide substrate is very big, causes device junction temperature very high,
Seriously affect the performance of transistor device.In addition regular oxidation gallium transistor is depletion type, needs prodigious negative voltage ability
Shutdown.
Chinese patent literature CN107742647A provides a kind of gallium oxide field-effect transistor.Gallium oxide field effect transistor
Pipe includes：Substrate, gallium oxide channel layer, source electrode, drain and gate, the substrate top surface are the gallium oxide channel layer, institute
The both sides for stating gallium oxide channel layer are respectively the source electrode and the drain electrode, and the middle part of the gallium oxide channel layer is the grid
Pole, the grid surround the gallium oxide channel layer entirely.The present invention is in the thickness by improving gallium oxide channel layer to improve electricity
When current density, by being to surround the gallium oxide channel layer entirely by gate design, grid-control will not be caused to be deteriorated, can obtained good
Grid-control；This method in the thickness by improving gallium oxide channel layer to improve current density, get over by the thickness of gallium oxide channel layer
Greatly, thermal resistance is bigger, and heat dissipation performance is bigger.
Invention content
In view of the deficiencies of the prior art, the present invention provides a kind of high heat dispersion double grid gallium oxide field-effect thin film transistor (TFT)
And preparation method thereof, transistor of the invention is double-gate structure, enhances control energy of the gate electrode to carrier by double-gate structure
Power improves the pinch-off behavior of device, and the thermal resistance of transistor substantially reduces, and heat dissipation performance is high.
The present invention is achieved through the following technical solutions：
A kind of high heat dispersion double grid gallium oxide field-effect thin film transistor (TFT), including substrate, gate electrode, source electrode and electric leakage
Pole, which is characterized in that bottom gate dielectric layer, gallium oxide channel layer are disposed on substrate from bottom to up, on gallium oxide channel layer
It is provided with source electrode and drain electrode, the gallium oxide channel layer upper surface between source electrode and drain electrode is covered with top gate medium layer.
Include bottom gate thin film and top-gated electrode according to currently preferred, described gate electrode, bottom gate thin film is located at substrate
Between bottom or substrate and bottom gate medium；Top-gated electrode is located on top gate medium layer.
According to currently preferred, the substrate is one kind in silicon carbide, diamond, silicon or copper.
According to currently preferred, the bottom gate thin film is Ti/Au/Ti three-layer alloys, Ti thickness 10-500nm, Au thickness
50-1000nm。
According to currently preferred, the thickness of the bottom gate dielectric layer is 10-100nm, and bottom gate dielectric layer is silica, oxygen
Change aluminium or hafnium oxide.
According to currently preferred, described gallium oxide channel layer using gallium oxide film as channel layer, gallium oxide film
Thickness is 50-500nm, is n-type doping gallium oxide, doping concentration 5 × 1016cm-3-5×1018cm-3
According to currently preferred, top gate medium layer thickness is 10-100nm, top gate medium layer be silica, aluminium oxide or
Person's hafnium oxide.
According to currently preferred, the top-gated electrode is Pd/Au alloys, Pd thickness 10-500nm, Au thickness 50-
1000nm。
According to currently preferred, the source electrode is Ti/Au alloys, Ti thickness 10-500nm, Au thickness 50-
1000nm。
According to currently preferred, the electric leakage extremely Ti/Au alloys, Ti thickness 10-500nm, Au thickness 50-
1000nm。
According to the present invention, a kind of preparation method of double grid gallium oxide field-effect thin film transistor (TFT), including steps are as follows：
(1) substrate cleaning step；
(2) bottom gate thin film layer is deposited in substrate bottom or top；
(3) sample surfaces that step (2) obtains deposit bottom gate dielectric layer using atomic layer deposition method；
(4) it tears and gallium oxide film and is transferred on step (3) sample on gallium oxide crystal；
(5) transfer is removed, is then cleaned；
(6) sample atoms after cleaning deposit top gate medium layer；
(7) the top gate medium layer at etching removal both ends forms source region and drain region,
(8) Ti/Au alloys are covered in source region and drain region upper surface, is respectively formed source electrode and drain electrode；
(9) the sample annealing that step (8) obtains；
(10) Pd/Au alloys are covered in top gate medium layer upper surface after annealing, form top-gated electrode.
According to currently preferred, in step (1), substrate cleaning step is：By substrate successively with acetone, ethyl alcohol, go from
Sub- water cleans 4-8 minutes, then nitrogen drying.
According to currently preferred, in step (4), gallium oxide film of tearing on gallium oxide crystal is to paste adhesive tape
On gallium oxide crystal, then torn fast, the surface layer film of gallium oxide crystal are sticked on adhesive tape, are aoxidized on adhesive tape
Gallium film thickness is 50-500nm.
According to currently preferred, in step (5), removal transfer is that sample is placed in 4- hexones,
It is heated to 75-85 DEG C, is impregnated 20 minutes, adhesive tape is removed.
According to currently preferred, the cleaning in step (5) is to clean sample with acetone, ethyl alcohol, deionized water successively
4-8 minutes, then nitrogen drying.
According to currently preferred, step (7) passes through photoengraving and inductively coupled plasma etching removes part top-gated and is situated between
Matter layer.
According to currently preferred, annealing temperature is 400-500 DEG C in step (9), and annealing time is 60 seconds.
Above-mentioned vapor deposition bottom gate thin film layer carries out in instrument is deposited, atomic layer deposition method, photoengraving and inductive couple plasma
Etching is pressed the prior art and is carried out.
Beneficial effects of the present invention
The present invention is low for gallium oxide material thermal conductivity, and heat dissipation performance is poor, the field-effect tube pinch off based on gallium oxide material
The problems such as voltage is high proposes a kind of gallium oxide thin film field effect transistor and preparation method thereof with double-gate structure, in height
Bottom gate thin film and bottom gate medium are prepared on thermal conductivity substrate, gallium oxide film is stripped down from monocrystalline using adhesive tape, are shifted
Onto substrate, top gate medium, source-drain electrode and gate electrode are then prepared, obtains the gallium oxide with top-gated and bottom gate double-gate structure
Thin film field effect transistor.First, the gallium oxide very thin thickness removed with adhesive tape, only 100nm or so, thermal resistance is significantly lower than biography
System gallium oxide field-effect tube device；In addition gallium oxide film is transferred in high heat conductivity substrate, can be effectively improved device
Heat dissipation performance；In addition top-gated and bottom gate double-gate structure are used, control ability of the gate electrode to carrier can be enhanced, improves device
The pinch-off behavior of part.
Description of the drawings
Fig. 1 is the double grid gallium oxide field-effect thin-film transistor structure schematic diagram of the embodiment of the present invention 1；
Fig. 2 is the double grid gallium oxide field-effect thin-film transistor structure schematic diagram of the embodiment of the present invention 2；
Fig. 3 is the transistor transfer characteristic curve figure of the embodiment of the present invention 1 and comparative example 1；
Fig. 4 is the transistor transfer characteristic curve figure of the embodiment of the present invention 1 and comparative example 2；
In figure, 1 is substrate；2 be bottom gate thin film；3 be bottom gate dielectric layer；4 be gallium oxide channel layer；5 be drain electrode, and 6 are
Top gate medium layer；7 be top-gated electrode；8 be source electrode.
Specific implementation mode
The present invention will be further described with reference to the accompanying drawings and examples, but not limited to this.
Embodiment 1
A kind of high heat dispersion double grid gallium oxide field film effect transistor, structure as shown in Figure 1, on substrate 1 from down toward
On set gradually bottom gate thin film 2, bottom gate dielectric layer 3 and gallium oxide channel layer 4,8 He of active electrode is set on gallium oxide channel layer 4
Drain electrode 5, the gallium oxide channel layer upper surface between source electrode 8 and drain electrode 5 are covered with top gate medium layer 6, top gate medium layer
On be provided with top-gated electrode 7.
Substrate is silicon carbide substrates, and bottom gate thin film is Ti/Au/Ti three-layer alloys, and thickness is 10/1000/10nm respectively.
The thickness of bottom gate dielectric layer is 10nm, and bottom gate dielectric layer is aluminium oxide.
For gallium oxide channel layer using gallium oxide film as channel layer, the thickness of gallium oxide film is 50nm, is aoxidized for n-type doping
Gallium, doping concentration 5 × 1016cm-3-5×1018cm-3
Top gate medium layer thickness is 10nm, and top gate medium layer is hafnium oxide, and top-gated electrode is Pd/Au alloys, Pd thickness
10nm, Au thickness 1000nm.
Source electrode is Ti/Au alloys, Ti thickness 10nm, Au thickness 1000nm.Electric leakage extremely Ti/Au alloys, Ti thickness
10nm, Au thickness 1000nm.
Preparation process is as follows：
(1), silicon carbide substrates are cleaned, steps are as follows：It is put into acetone to clean 5 minutes, places into ethyl alcohol and clean 5 points
Clock is cleaned 5 minutes with deionized water, is finally dried up with nitrogen later.
(2), bottom gate thin film is deposited in the substrate top surface after cleaning, and material Ti/Au/Ti, thickness is 10/1000/ respectively
10nm；
(3), in step (2) treated sample upper surface using atomic layer deposition method deposition of aluminium oxide as bottom gate medium
Layer, thickness 10nm；
(4), adhesive tape is attached on gallium oxide crystal, then torn fast, the surface layer film of gallium oxide crystal can glue
On adhesive tape, thickness 50nm；
(5), on the sample the adhesive tape described in step (4) to step (3)；
(6), the sample of step (5) is placed in 4- hexones, is heated to 80 DEG C, impregnated 20 minutes, removal
Adhesive tape；
(7), the sample described in step (6) is cleaned, steps are as follows：It is put into acetone to clean 5 minutes, places into ethyl alcohol
Cleaning 5 minutes, is cleaned 5 minutes with deionized water, is finally dried up with nitrogen later.
(8), the sample described in step (7) is put into atomic layer deposition apparatus, the hafnium oxide of 10nm is grown, as top-gated
Dielectric layer；
(9), the sample described in step (8) is removed into partial oxidation by photoetching technique and inductively coupled plasma etching
Hafnium is used for the preparation of source electrode and drain electrode；
(10), the sample described in step (9) is prepared into source electrode and drain electrode by photoetching, electron beam evaporation and stripping,
Material is Ti/Au, thickness 10/1000nm；
(11), the sample described in step (10) is put into vacuum annealing furnace, 400 degree of temperature, is annealed 60 seconds；
(12), the sample described in step (11) is prepared into top-gated electrode by photoetching, electron beam evaporation and lift-off technology,
Material is Pd/Au, thickness 10/1000nm.
Embodiment 2
A kind of high heat dispersion double grid gallium oxide field film effect transistor, structure such as Fig. 2 show that the lower surface of substrate 1 is set
It is equipped with bottom gate thin film 2, sets gradually bottom gate dielectric layer 3 and gallium oxide channel layer 4, gallium oxide channel layer 4 on substrate 1 from bottom to up
Upper setting active electrode 8 and drain electrode 5, the gallium oxide channel layer upper surface between source electrode 8 and drain electrode 5 are covered with top-gated Jie
Matter layer 6 is provided with top-gated electrode 7 on top gate medium layer.
Substrate is silicon carbide substrates, and bottom gate thin film is Ti/Au/Ti three-layer alloys, and thickness is 500/50/500nm respectively.
The thickness of bottom gate dielectric layer is 100nm, and bottom gate dielectric layer is hafnium oxide.
For gallium oxide channel layer using gallium oxide film as channel layer, the thickness of gallium oxide film is 500nm, is n-type doping oxygen
Change gallium, doping concentration 5 × 1016cm-3-5×1018cm-3
Top gate medium layer thickness is 100nm, and top gate medium layer is aluminium oxide, and top-gated electrode is Pd/Au alloys, Pd thickness
50nm, Au thickness 500nm.
Source electrode is Ti/Au alloys, Ti thickness 50nm, Au thickness 500nm.Electric leakage extremely Ti/Au alloys, Ti thickness
50nm, Au thickness 500nm.
Preparation process is as follows：
(1), silicon carbide substrates are cleaned, steps are as follows：It is put into acetone to clean 5 minutes, places into ethyl alcohol and clean 5 points
Clock is cleaned 5 minutes with deionized water, is finally dried up with nitrogen later.
(2), bottom gate thin film is deposited in the substrate top surface after cleaning, and material Ti/Au/Ti, thickness is 500/50/ respectively
500nm；
(3), in step (2) treated sample upper surface using atomic layer deposition method deposit hafnium oxides as bottom gate medium
Layer, thickness 100nm；
(4), adhesive tape is attached on gallium oxide crystal, then torn fast, the surface layer film of gallium oxide crystal can glue
On adhesive tape, thickness 500nm；
(5), on the sample the adhesive tape described in step (4) to step (3)；
(6), the sample of step (5) is placed in 4- hexones, is heated to 80 DEG C, impregnated 20 minutes, removal
Adhesive tape；
(7), the sample described in step (6) is cleaned, steps are as follows：It is put into acetone to clean 5 minutes, places into ethyl alcohol
Cleaning 5 minutes, is cleaned 5 minutes with deionized water, is finally dried up with nitrogen later.
(8), the sample described in step (7) is put into atomic layer deposition apparatus, the aluminium oxide of 100nm is grown, as top
Gate dielectric layer；
(9), the sample described in step (8) is removed into partial oxidation by photoetching technique and inductively coupled plasma etching
Aluminium is used for the preparation of source electrode and drain electrode；
(10), the sample described in step (9) is prepared into source electrode and drain electrode by photoetching, electron beam evaporation and stripping,
Material is Ti/Au, thickness 50/500nm；
(11), the sample described in step (10) is put into vacuum annealing furnace, 400 degree of temperature, is annealed 60 seconds；
(12), the sample described in step (11) is prepared into top-gated electrode by photoetching, electron beam evaporation and lift-off technology,
Material is Pd/Au, thickness 50/500nm.
Comparative example 1
A kind of gallium oxide field film effect transistor, structure with shown in embodiment 1, the difference is that：
Bottom gate dielectric layer is not arranged for the transistor.
Comparative example experiment 1
The transfer characteristic of testing example 1 and comparative example 1, the transfer characteristic curve measured are as shown in Figure 3；It can be with from figure
Find out that the threshold voltage of embodiment 1 and comparative example 1 is respectively -4V and -3V；Identical gate voltage (such as -3V), embodiment 1 and comparison
The source-drain current of example 1 is 1.6 × 10 respectively-11A and 1.6 × 10-9A；It is compared by Fig. 3, it can be clearly seen that the present invention has
The transistor of double-gate structure can be obviously improved control ability of the gate electrode to carrier, improve the pinch-off behavior of device.
Comparative example 2
A kind of gallium oxide field film effect transistor, structure with shown in embodiment 1, the difference is that：
Top gate medium layer and top-gated electrode are not arranged for the transistor.
Comparative example experiment 2
The transfer characteristic of testing example 1 and comparative example 2, the transfer characteristic curve measured are as shown in Figure 4；It can be with from figure
Find out that the threshold voltage of embodiment 1 and comparative example 2 is respectively -4V and -3.5V；Identical gate voltage (such as -3V), embodiment 1 and right
The source-drain current of ratio 1 is 1.6 × 10 respectively-11A and 2.7 × 10-10A；It is compared by Fig. 4, it can be clearly seen that the present invention has
The control ability for having the transistor of double-gate structure that can be obviously improved gate electrode to carrier, improves the pinch-off behavior of device.
Claims (10)
1. a kind of high heat dispersion double grid gallium oxide field-effect thin film transistor (TFT), including substrate, gate electrode, source electrode and electric leakage
Pole, which is characterized in that bottom gate dielectric layer, gallium oxide channel layer are disposed on substrate from bottom to up, on gallium oxide channel layer
It is provided with source electrode and drain electrode, the gallium oxide channel layer upper surface between source electrode and drain electrode is covered with top gate medium layer.
2. high heat dispersion double grid gallium oxide field-effect thin film transistor (TFT) according to claim 1, which is characterized in that described
Gate electrode include bottom gate thin film and top-gated electrode, bottom gate thin film is between substrate bottom or substrate and bottom gate medium；Top-gated
Electrode is located on top gate medium layer.
3. high heat dispersion double grid gallium oxide field-effect thin film transistor (TFT) according to claim 1, which is characterized in that described
Substrate is one kind in silicon carbide, diamond, silicon or copper；The bottom gate thin film is Ti/Au/Ti three-layer alloys, Ti thickness 10-
500nm, Au thickness 50-1000nm.
4. high heat dispersion double grid gallium oxide field-effect thin film transistor (TFT) according to claim 1, which is characterized in that described
The thickness of bottom gate dielectric layer is 10-100nm, and bottom gate dielectric layer is silica, aluminium oxide or hafnium oxide.
5. high heat dispersion double grid gallium oxide field-effect thin film transistor (TFT) according to claim 1, which is characterized in that described
Gallium oxide channel layer using gallium oxide film as channel layer, the thickness of gallium oxide film is 50-500nm, is aoxidized for n-type doping
Gallium, doping concentration 5 × 1016cm-3-5×1018cm-3。
6. high heat dispersion double grid gallium oxide field-effect thin film transistor (TFT) according to claim 1, which is characterized in that top-gated
Thickness of dielectric layers is 10-100nm, and top gate medium layer is silica, aluminium oxide or hafnium oxide；The top-gated electrode is Pd/Au
Alloy, Pd thickness 10-500nm, Au thickness 50-1000nm；The source electrode is Ti/Au alloys, and Ti thickness 10-500nm, Au are thick
Spend 50-1000nm；The electric leakage extremely Ti/Au alloys, Ti thickness 10-500nm, Au thickness 50-1000nm.
7. a kind of preparation method of double grid gallium oxide field-effect thin film transistor (TFT), including steps are as follows：
(1) substrate cleaning step；
(2) bottom gate thin film layer is deposited in substrate bottom or top；
(3) sample surfaces that step (2) obtains deposit bottom gate dielectric layer using atomic layer deposition method；
(4) it tears and gallium oxide film and is transferred on step (3) sample on gallium oxide crystal；
(5) transfer is removed, is then cleaned；
(6) sample atoms after cleaning deposit top gate medium layer；
(7) the top gate medium layer at etching removal both ends forms source region and drain region,
(8) Ti/Au alloys are covered in source region and drain region upper surface, is respectively formed source electrode and drain electrode；
(9) the sample annealing that step (8) obtains；
(10) Pd/Au alloys are covered in top gate medium layer upper surface after annealing, form top-gated electrode.
8. the preparation method of double grid gallium oxide field-effect thin film transistor (TFT) according to claim 7, which is characterized in that step
(1) in, substrate cleaning step is：Substrate is cleaned 4-8 minutes with acetone, ethyl alcohol, deionized water successively, then nitrogen drying；
In step (4), gallium oxide film of tearing on gallium oxide crystal is that adhesive tape is attached on gallium oxide crystal, is then quickly torn
Under, the surface layer film of gallium oxide crystal is sticked on adhesive tape, and gallium oxide film thickness is 50-500nm on adhesive tape.
9. the preparation method of double grid gallium oxide field-effect thin film transistor (TFT) according to claim 7, which is characterized in that step
(5) in, removal transfer is that sample is placed in 4- hexones, is heated to 75-85 DEG C, is impregnated 20 minutes, removal
Adhesive tape；Cleaning in step (5) is, sample is cleaned 4-8 minutes with acetone, ethyl alcohol, deionized water successively, then nitrogen
Drying.
10. the preparation method of double grid gallium oxide field-effect thin film transistor (TFT) according to claim 7, which is characterized in that step
Suddenly (7) remove part top gate medium layer by photoengraving and inductively coupled plasma etching；Annealing temperature is 400- in step (9)
500 DEG C, annealing time is 60 seconds.
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| CN109244158A (en) * | 2018-10-17 | 2019-01-18 | 山东大学 | A kind of gallium oxide field effect transistor day blind detector and its manufacture craft |
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| CN112885717A (en) * | 2021-01-15 | 2021-06-01 | 广州爱思威科技股份有限公司 | Metal electrode of semiconductor device, method for manufacturing the same, and use thereof |
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| CN109449219A (en) * | 2018-09-19 | 2019-03-08 | 北京镓族科技有限公司 | Based on β-Ga2O3The solar blind ultraviolet detector of monocrystalline grade thin slice |
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| CN112133755A (en) * | 2020-10-07 | 2020-12-25 | 西安电子科技大学 | Preparation method of high-performance gallium oxide field effect transistor of insulating substrate |
| CN112885717A (en) * | 2021-01-15 | 2021-06-01 | 广州爱思威科技股份有限公司 | Metal electrode of semiconductor device, method for manufacturing the same, and use thereof |
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