CN104576752A - Thin-film transistor - Google Patents
Thin-film transistor Download PDFInfo
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- CN104576752A CN104576752A CN201410741101.4A CN201410741101A CN104576752A CN 104576752 A CN104576752 A CN 104576752A CN 201410741101 A CN201410741101 A CN 201410741101A CN 104576752 A CN104576752 A CN 104576752A
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- Prior art keywords
- thin
- film transistor
- channel layer
- electrode
- grid
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- 239000010409 thin film Substances 0.000 title claims abstract description 93
- 239000000758 substrate Substances 0.000 claims description 30
- 230000004888 barrier function Effects 0.000 claims description 22
- 239000004065 semiconductor Substances 0.000 claims description 7
- 239000000463 material Substances 0.000 claims description 6
- 239000004020 conductor Substances 0.000 claims description 3
- 239000011810 insulating material Substances 0.000 claims description 2
- 230000001105 regulatory effect Effects 0.000 abstract description 14
- 238000009413 insulation Methods 0.000 abstract description 12
- 230000008901 benefit Effects 0.000 abstract description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 16
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 14
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 11
- 229910052710 silicon Inorganic materials 0.000 description 11
- 239000010703 silicon Substances 0.000 description 11
- OFIYHXOOOISSDN-UHFFFAOYSA-N tellanylidenegallium Chemical compound [Te]=[Ga] OFIYHXOOOISSDN-UHFFFAOYSA-N 0.000 description 9
- 239000011787 zinc oxide Substances 0.000 description 7
- 238000002360 preparation method Methods 0.000 description 6
- 238000000034 method Methods 0.000 description 5
- 230000008859 change Effects 0.000 description 3
- 230000005669 field effect Effects 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 238000000151 deposition Methods 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 238000001259 photo etching Methods 0.000 description 2
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 229910000238 buergerite Inorganic materials 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 239000002800 charge carrier Substances 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000002425 crystallisation Methods 0.000 description 1
- 230000008025 crystallization Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000005566 electron beam evaporation Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000000284 extract Substances 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 238000001755 magnetron sputter deposition Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 238000004549 pulsed laser deposition Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 150000003839 salts Chemical class 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
- 239000011701 zinc Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42384—Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Thin Film Transistor (AREA)
Abstract
The invention provides a thin-film transistor. The thin-film transistor comprises a channel layer, an insulation layer, a source, a drain, a grid and a regulating electrode, wherein the channel layer comprises a first surface and a second surface which are oppositely arranged, the source and the drain are positioned on the first surface of the channel layer, the regulating electrode is electrically connected with one surface of the first surface and the second surface of the channel layer, and the insulation layer is arranged on the other surface of the first surface and the second surface of the channel layer and positioned between the grid and the channel layer. The thin-film transistor has the advantages of adjustable threshold voltage of the thin-film transistor, simple structure and low cost.
Description
Technical field
The present invention relates to a kind of transistor, be specifically related to a kind of thin-film transistor.
Background technology
Thin-film transistor is a kind of field-effect transistor, and it can be divided into depletion type and enhancement mode according to electrically conducting manner.In order to adopt same thin-film transistor to form multiple device, need the thin-film transistor that a kind of threshold voltage is adjustable.By regulating the threshold voltage of thin-film transistor, thin-film transistor can be switched between depletion type and enhancement mode, thus the range of application of expansion thin-film transistor.
Fig. 1 is the cutaway view of a kind of double gate thin-film transistor of the prior art.As shown in Figure 1, double gate thin-film transistor 10 comprises bottom gate thin film 11, substrate 12, bottom gate insulating barrier 13, channel layer 14 from bottom to up successively, be positioned at the top gate insulation layer 15 on channel layer 14, drain electrode 16 and source electrode 18, and be positioned at the top gate electrode 17 on the gate insulation layer 15 of top.Wherein source electrode 18 and drain electrode 16 are positioned at the relative both sides of top gate insulation layer 15.
The Principles of Regulation of the threshold voltage of double gate thin-film transistor 10 are based on metal-insulator semiconductor (MIS) capacitor principle, namely need bottom gate insulating barrier 13 and top gate insulation layer 15 simultaneously.By applying to bottom gate thin film 11 and top gate electrode 17 CONCENTRATION DISTRIBUTION that voltage regulates charge carrier in channel layer 14, thus form conducting channel and change channel conduction.Therefore known bottom gate insulating barrier 13 must to make between channel layer 14 and bottom gate thin film 11 insulation and essential, and same top gate insulation layer 15 must make insulation between channel layer 14 and top gate electrode 17 and essential.
But, current double gate thin-film transistor 10 complex structure is along with the reduction gradually of characteristic size, also more and more higher to the requirement of photoetching process.
Summary of the invention
Therefore, the technical problem to be solved in the present invention is to provide the simple and thin-film transistor that threshold voltage is adjustable of a kind of structure.
To achieve these goals, An embodiment provides a kind of thin-film transistor, comprise: channel layer, insulating barrier, source electrode, drain electrode, grid and adjustment electrode, described channel layer has the first surface and second surface that are oppositely arranged, described source electrode and drain electrode are positioned on the first surface of described channel layer, a surface electrical in the first surface of described adjustment electrode and described channel layer and second surface is connected, described insulating barrier be arranged in the first surface of described channel layer and second surface another on the surface, and between described grid and described channel layer.
Preferably, described adjustment electrode is positioned on the first surface of described channel layer, and between described source electrode and drain electrode, described insulating barrier is between described grid and the second surface of described channel layer.
Preferably, described thin-film transistor also comprises substrate, and described substrate is between described insulating barrier and described grid.
Preferably, described thin-film transistor also comprises substrate, and described grid is between described insulating barrier and described substrate.
Preferably, described insulating barrier is positioned on the first surface of described channel layer, and between described source electrode and drain electrode, described grid is positioned on described insulating barrier, and described adjustment electrode is electrically connected with the second surface of described channel layer.
Preferably, described thin-film transistor also comprises nonisulated substrate, and described nonisulated substrate is between the second surface and described adjustment electrode of described channel layer.
Preferably, described thin-film transistor also comprises substrate, and described adjustment electrode is between described substrate and the second surface of described channel layer.
Preferably, described channel layer is made up of semi-conducting material, and described insulating barrier is made up of insulating material, and described source electrode, drain electrode, grid and adjustment electrode are made up of electric conducting material.
Preferably, the material of described channel layer is IGZO, and described IGZO is by In
2o
3, Ga
2o
3make according to mol ratio 1:1:1 with ZnO.
Preferably, the material of described channel layer is Mg
0.4zn
0.6o:F.
Thin-film transistor of the present invention only comprises a layer insulating, and structure is simple, cost is low.
Accompanying drawing explanation
Referring to accompanying drawing, embodiments of the present invention is further illustrated, wherein:
Fig. 1 is the cutaway view of a kind of double gate thin-film transistor of the prior art.
Fig. 2 is the profile of the thin-film transistor according to first embodiment of the invention.
Fig. 3 is the transfer curve of the thin-film transistor shown in Fig. 2.
Fig. 4 is the transfer characteristic curve of the thin-film transistor shown in Fig. 2.
Fig. 5 is the profile of the thin-film transistor according to second embodiment of the invention.
Fig. 6 is the transfer curve of the thin-film transistor shown in Fig. 5.
Fig. 7 is the transfer characteristic curve of the thin-film transistor shown in Fig. 5.
Fig. 8 is the profile of the thin-film transistor according to third embodiment of the invention.
Fig. 9 is the profile of the thin-film transistor according to four embodiment of the invention.
Figure 10 is the profile of the thin-film transistor according to fifth embodiment of the invention.
Embodiment
In order to make object of the present invention, technical scheme and advantage clearly understand, below in conjunction with accompanying drawing, by specific embodiment, the present invention is described in more detail.
Fig. 2 is the cutaway view of the thin-film transistor according to first embodiment of the invention.As shown in Figure 2, thin-film transistor 20 comprises grid 21, silicon substrate 22, alumina insulating layer 23, indium gallium zinc oxide (IGZO) channel layer 24 from bottom to up successively, and is positioned at source electrode 28 on IGZO channel layer 24, drain electrode 26 and regulates electrode 27.Electrode 27 is wherein regulated to be positioned at the centre of source electrode 28 and drain electrode 26.
IGZO channel layer 24 is by In
2o
3, Ga
2o
3with the n-type semiconductor that ZnO is formed according to mol ratio 1:1:1.In is added in ZnO
2o
3and Ga
2o
3, the crystallization of ZnO can be suppressed, thus improve electron mobility.In
3+5s track can be formed, be conducive to the high-speed transfer of electronics; Ga
3+with O
2-ion has very strong adhesion, can be controlled the content of Lacking oxygen by control Ga content, and finally realizes the regulation and control to carrier concentration.IGZO semi-conducting material has high on-off ratio and high mobility.
Fig. 3 is the transfer curve of the thin-film transistor shown in Fig. 2.Wherein source electrode 21 ground connection (voltage is 0), V
gaterepresent gate source voltage, the voltage regulating electrode 27 is 0.As shown in Figure 3, the transfer curve of thin-film transistor 20 is consistent with the transfer curve of general field-effect transistor, has linear zone and saturation region equally.
Fig. 4 is the transfer characteristic curve of the thin-film transistor shown in Fig. 2.Wherein V
mrepresent the magnitude of voltage regulating electrode 27.As shown in Figure 4, V is worked as
mduring > 0, its transfer characteristic curve is to right translation.Thin-film transistor 20 is in normally off, and namely the electrically conducting manner of thin-film transistor 20 is enhancement mode.Along with V
mincrease, its threshold voltage also increases gradually.Work as V
mduring < 0, its transfer characteristic curve is to left.Thin-film transistor 20 is in normally open, and namely the electrically conducting manner of thin-film transistor 20 is depletion type.Along with V
mreduce, its threshold voltage also reduces gradually.According to above-mentioned conclusion, by means of only changing the magnitude of voltage V regulating electrode 27
mthe i.e. threshold voltage of adjustable thin-film transistor 20.
The operation principle of thin-film transistor 20 is obviously different from the operation principle of double gate thin-film transistor 10.Thin-film transistor 20 extracts electronics based on injecting electric sub or slave IGZO channel layer 24 to IGZO channel layer 24, thus realize regulating electron concentration in IGZO channel layer 24.When regulating the magnitude of voltage V of electrode 27
mwhen being greater than 0, the electronics in IGZO channel layer 24 is extracted to and regulates in electrode 27.Grid 21 applies positive voltage, thus (surface near alumina insulating layer 23) forms conducting channel in IGZO channel layer 24.When regulating the magnitude of voltage V of electrode 27
mwhen being less than 0, regulate electrode 27 to inject electronics in IGZO channel layer 24, and (surface near alumina insulating layer 23) form conducting channel in IGZO channel layer 24.
Below by the preparation method of summary thin-film transistor 20.First provide clean silicon substrate 22, wherein silicon substrate 22 has two relative surfaces; A surface of silicon substrate 22 grows alumina insulating layer 23 and IGZO channel layer 24 successively; IGZO channel layer 24 makes source electrode 28, drain electrode 26 simultaneously and regulates electrode 27; Finally make grid 21 on the surface at another of silicon substrate 22.Film growth techniques in the present embodiment includes but not limited to ald, magnetron sputtering, electron beam evaporation, pulsed laser deposition, metal organic chemical vapor deposition or molecular beam epitaxial process.
Source electrode 28 in thin-film transistor 20 of the present invention, drain electrode 26 and adjustment electrode 27 can be made simultaneously, i.e. depositing metal layers on IGZO channel layer 24 forms source electrode 28, drain electrode 26 by the technique such as photoetching and etching simultaneously and regulates electrode 27.Do not have the top gate insulation layer 15 shown in Fig. 1 between the adjustment electrode 27 of thin-film transistor 20 and IGZO channel layer 24, device architecture is simple.Thus without the need to high temperature deposition top gate insulation layer on IGZO channel layer 24, do not need to push up gate insulation layer and source electrode and alignment process between draining yet.
Fig. 5 is the cutaway view of the thin-film transistor of second embodiment of the invention.As shown in Figure 5, thin-film transistor 30 is substantially identical with thin-film transistor 20, and difference is, adopts Mg
0.5zn
0.5o insulating barrier 33 replaces the alumina insulating layer 23 in Fig. 2, and adopts Mg
0.4zn
0.6o:F channel layer 34 substituted for the IGZO channel layer 24 in Fig. 2.
Mg
xzn
1-xo is the adjustable material of a kind of band gap of being combined by buergerite ZnO and salt mine MgO.By changing the proportioning of Zn and Mg, Mg can be made
xzn
1-xthe band gap of O regulates between 3.37eV to 7.8eV, thus is semiconductor or insulator.
Fig. 6 is the transfer curve of the thin-film transistor shown in Fig. 5.Wherein source electrode 21 ground connection (voltage is 0), V
grepresent gate source voltage, the voltage regulating electrode 27 is 0.As shown in Figure 6, the transfer curve of thin-film transistor 30 is consistent with the transfer curve of general field-effect transistor, has linear zone and saturation region equally.
Fig. 7 is the transfer characteristic curve of the thin-film transistor shown in Fig. 5.Wherein V
mrepresent the magnitude of voltage regulating electrode 27.As shown in Figure 7, V is worked as
mduring > 0, its transfer characteristic curve is to right translation.Thin-film transistor 30 is in normally off, and namely the electrically conducting manner of thin-film transistor 30 is enhancement mode.Along with V
mincrease, its threshold voltage also increases gradually.Work as V
mduring < 0, its transfer characteristic curve is to left.Thin-film transistor 30 is in normally open, and namely the electrically conducting manner of thin-film transistor 30 is depletion type.Along with V
mreduce, its threshold voltage also reduces gradually.According to above-mentioned conclusion, by changing the magnitude of voltage V regulating electrode 27
mthe i.e. threshold voltage of adjustable thin-film transistor 30.
Thin-film transistor 30 is identical with preparation method with the operation principle of thin-film transistor 20, does not repeat them here.
Fig. 8 is the profile of the thin-film transistor according to third embodiment of the invention.As shown in Figure 8, thin-film transistor 40 is substantially identical with thin-film transistor 20, and difference is, grid 41 is between alumina insulating layer 43 and substrate 22, and alumina insulating layer 43 covers on grid 41, the IGZO channel layer 24 on grid 41 and alumina insulating layer 43 is insulated.Its operation principle is identical with thin-film transistor 20, does not repeat them here.It has the transfer curve similar to thin-film transistor 20 and transfer characteristic curve.
Below by the preparation method of simple declaration thin-film transistor 40.Clean silicon substrate 22 makes grid 41, growth alumina insulating layer 43 and IGZO channel layer 24 successively, and on IGZO channel layer 24, makes source electrode 28, drain electrode 26 simultaneously and regulate electrode 27.In preparation process, guarantee to insulate between grid 41 and IGZO channel layer 24.
Fig. 9 is the profile of the thin-film transistor according to four embodiment of the invention.As shown in Figure 9, thin-film transistor 50 comprises adjustment electrode 27, silicon substrate 22 and IGZO channel layer 24 from bottom to up successively, is positioned at the source electrode 28 on IGZO channel layer 24, drain electrode 26 and alumina insulating layer 53, and is positioned at the grid 21 on alumina insulating layer 53.Wherein alumina insulating layer 53 is positioned in the middle of source electrode 28 and drain electrode 26.Its operation principle is identical with thin-film transistor 20, does not repeat them here.It has the transfer curve similar to thin-film transistor 20 and transfer characteristic curve.
Below by the preparation method of simple declaration thin-film transistor 50.At a surface-borne IGZO channel layer 24 of silicon substrate 22, IGZO channel layer 24 makes source electrode 28, drain electrode 26 and alumina insulating layer 53, alumina insulating layer 53 makes grid 21, finally makes on the surface at another of silicon substrate 22 and regulate electrode 27.
Figure 10 is the profile of the thin-film transistor according to fifth embodiment of the invention.As shown in Figure 10, thin-film transistor 60 is substantially identical with thin-film transistor 50, and difference is, regulates electrode 67 to be positioned in the middle of silicon substrate 22 and IGZO channel layer 24.Its operation principle is identical with thin-film transistor 20, does not repeat them here.It has the transfer curve similar to thin-film transistor 20 and transfer characteristic curve.
Below by the preparation method of simple declaration thin-film transistor 60.Laydown adjustment electrode 67, IGZO channel layer 24 successively on silicon substrate 22, IGZO channel layer 24 deposits source electrode 28, drain electrode 26 and alumina insulating layer 53, alumina insulating layer 53 makes grid 21.
Structure and the operation principle of membrane according to the invention transistor are known, and the adjustment electrode in thin-film transistor of the present invention is electrical contact with channel layer or is electrically connected, and insulate between grid in thin-film transistor and channel layer.Electrode is such as regulated directly to contact with channel layer or to be electrically connected with channel layer by uninsulated substrate.
Those skilled in the art will appreciate that the material of the channel layer of thin-film transistor of the present invention is not limited to IGZO and Mg
0.4zn
0.6o:F can also be other semi-conducting material, such as ZnO, GaN or Si.The insulating barrier of thin-film transistor of the present invention is not limited to Al
2o
3and Mg
0.5zn
0.5o can also be other insulating barriers, such as SiN
x, MgO, BeO, Ta
2o
5, HfO
2, ZrO
2or SiO
2.
Source electrode in thin-film transistor of the present invention, adjustment electrode, drain and gate can be made up of arbitrary electric conducting material.
Although the present invention is described by preferred embodiment, but the present invention is not limited to embodiment as described herein, also comprises done various change and change without departing from the present invention.
Claims (10)
1. a thin-film transistor, it is characterized in that, comprise channel layer, insulating barrier, source electrode, drain electrode, grid and adjustment electrode, described channel layer has the first surface and second surface that are oppositely arranged, described source electrode and drain electrode are positioned on the first surface of described channel layer, a surface electrical in the first surface of described adjustment electrode and described channel layer and second surface is connected, described insulating barrier be arranged in the first surface of described channel layer and second surface another on the surface, and between described grid and described channel layer.
2. thin-film transistor according to claim 1, is characterized in that, described adjustment electrode is positioned on the first surface of described channel layer, and between described source electrode and drain electrode, described insulating barrier is between described grid and the second surface of described channel layer.
3. thin-film transistor according to claim 2, is characterized in that, described thin-film transistor also comprises substrate, and described substrate is between described insulating barrier and described grid.
4. thin-film transistor according to claim 2, is characterized in that, described thin-film transistor also comprises substrate, and described grid is between described insulating barrier and described substrate.
5. thin-film transistor according to claim 1, it is characterized in that, described insulating barrier is positioned on the first surface of described channel layer, and between described source electrode and drain electrode, described grid is positioned on described insulating barrier, and described adjustment electrode is electrically connected with the second surface of described channel layer.
6. thin-film transistor according to claim 5, is characterized in that, described thin-film transistor also comprises nonisulated substrate, and described nonisulated substrate is between the second surface and described adjustment electrode of described channel layer.
7. thin-film transistor according to claim 5, is characterized in that, described thin-film transistor also comprises substrate, and described adjustment electrode is between described substrate and the second surface of described channel layer.
8. thin-film transistor according to any one of claim 1 to 7, is characterized in that, described channel layer is made up of semi-conducting material, and described insulating barrier is made up of insulating material, and described source electrode, drain electrode, grid and adjustment electrode are made up of electric conducting material.
9. thin-film transistor according to claim 8, is characterized in that, the material of described channel layer is IGZO, and described IGZO is by In
2o
3, Ga
2o
3make according to mol ratio 1:1:1 with ZnO.
10. thin-film transistor according to claim 8, is characterized in that, the material of described channel layer is Mg
0.4zn
0.6o:F.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410741101.4A CN104576752A (en) | 2014-12-05 | 2014-12-05 | Thin-film transistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410741101.4A CN104576752A (en) | 2014-12-05 | 2014-12-05 | Thin-film transistor |
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| Publication Number | Publication Date |
|---|---|
| CN104576752A true CN104576752A (en) | 2015-04-29 |
Family
ID=53092390
Family Applications (1)
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|---|---|---|---|
| CN201410741101.4A Pending CN104576752A (en) | 2014-12-05 | 2014-12-05 | Thin-film transistor |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108550624A (en) * | 2018-04-10 | 2018-09-18 | 山东大学 | A kind of high heat dispersion double grid gallium oxide field-effect thin film transistor (TFT) and preparation method thereof |
| CN109560141A (en) * | 2018-12-13 | 2019-04-02 | 合肥鑫晟光电科技有限公司 | Thin film transistor (TFT), light emitting device and its manufacturing method |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0299185A2 (en) * | 1987-07-15 | 1989-01-18 | International Business Machines Corporation | Thin film field effect transistor |
| US20140027702A1 (en) * | 2011-07-13 | 2014-01-30 | Rutgers, The State University Of New Jersey | Multifunctional zinc oxide nano-structure-based circuit building blocks for re-configurable electronics and optoelectronics |
| CN204289466U (en) * | 2014-12-05 | 2015-04-22 | 中国科学院物理研究所 | Thin-film transistor |
-
2014
- 2014-12-05 CN CN201410741101.4A patent/CN104576752A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0299185A2 (en) * | 1987-07-15 | 1989-01-18 | International Business Machines Corporation | Thin film field effect transistor |
| US20140027702A1 (en) * | 2011-07-13 | 2014-01-30 | Rutgers, The State University Of New Jersey | Multifunctional zinc oxide nano-structure-based circuit building blocks for re-configurable electronics and optoelectronics |
| CN204289466U (en) * | 2014-12-05 | 2015-04-22 | 中国科学院物理研究所 | Thin-film transistor |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108550624A (en) * | 2018-04-10 | 2018-09-18 | 山东大学 | A kind of high heat dispersion double grid gallium oxide field-effect thin film transistor (TFT) and preparation method thereof |
| CN109560141A (en) * | 2018-12-13 | 2019-04-02 | 合肥鑫晟光电科技有限公司 | Thin film transistor (TFT), light emitting device and its manufacturing method |
| CN109560141B (en) * | 2018-12-13 | 2020-09-25 | 合肥鑫晟光电科技有限公司 | Thin film transistor, light emitting device and method of manufacturing the same |
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Application publication date: 20150429 |