CN103258850A - Grapheme nano-ribbon field effect transistor and preparation method thereof - Google Patents
Grapheme nano-ribbon field effect transistor and preparation method thereof Download PDFInfo
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- CN103258850A CN103258850A CN2012100329096A CN201210032909A CN103258850A CN 103258850 A CN103258850 A CN 103258850A CN 2012100329096 A CN2012100329096 A CN 2012100329096A CN 201210032909 A CN201210032909 A CN 201210032909A CN 103258850 A CN103258850 A CN 103258850A
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Abstract
The invention provides a grapheme nano-ribbon field effect transistor and a preparation method of the grapheme nano-ribbon field effect transistor. According to the grapheme nano-ribbon field effect transistor and the preparation method, grapheme nano-ribbons are used as materials of a conducting channel so as to form a certain forbidden ribbon width, HfO2 is used as medium materials of a top gate and a bottom gate, and Au or Au/Ti is used as metal contact. A switching current rate of a device manufactured through the method is as high as 107, and a migration rate of channel electrons reaches 300cm2/Vs.
Description
Technical field
The present invention relates to the field-effect transistor technical field, particularly a kind of graphene nanobelt field-effect transistor and preparation method thereof.
Background technology
Graphene has high mobility as a kind of two-dimensional material under its intrinsic state, but in actual applications, the use of two-dimensional material Graphene but exists fatal defective: (1) owing to ionized impurity scattering and surphon scattering, the advantage of its high mobility has not existed to such an extent as to the channel carrier mobility of graphene field effect device sharply descends after making actual fieldtron; (2) more seriously, the Graphene of intrinsic does not have the forbidden band, needs to form the required electric field that applies in forbidden band or stress the mobility of raceway groove is descended.
Summary of the invention
At the problems referred to above, the object of the present invention is to provide a kind of graphene nanobelt field-effect transistor and preparation method thereof, to solve the problems of the prior art.
To achieve these goals, technical scheme of the present invention is as follows:
A kind of graphene nanobelt field-effect transistor is characterized in that, comprises substrate, channel layer, HfO
2The bottom gate dielectric layer of material, HfO
2The top gate medium layer of material, source electrode, drain electrode and top gate electrode, the channel layer of described channel layer for adopting graphene nanobelt to make, described top gate medium layer and bottom gate dielectric layer lay respectively at the above and below of channel layer, substrate is positioned at the below of bottom gate dielectric layer, source electrode and drain electrode lay respectively at the two ends of channel layer, and the top gate electrode is positioned on the top gate medium layer.
In a preferred embodiment of the invention, the width of described channel layer is less than 10nm.
In a preferred embodiment of the invention, the material of formation channel layer is individual layer or double-layer graphite alkene nanometer band.
In a preferred embodiment of the invention, the thickness of described bottom gate dielectric layer and top gate medium layer is 30nm.
A kind of preparation method of graphene nanobelt field-effect transistor is characterized in that, may further comprise the steps:
(1) adopt the atomic layer deposition method to make one deck HfO at substrate
2Layer is as the bottom gate dielectric layer;
(2) preparation graphene nanobelt:
A, adopt chemical graft process to produce extendible graphite in 350 μ m level graphite alkene;
B, fast with extendible graphite heating to 800 ℃-1200 ℃, Graphene is peeled off into a pile number of plies graphene film seldom;
C, utilize the ultrasonic and described graphene film of functionalization of PmPV liquid phase can be created in the graphene nanobelt of stable suspersion among the DCE;
(3) substrate that will have a bottom gate dielectric layer was immersed in the PmPV/DCE solution of graphene nanobelt 15-25 minute, with the isopropyl alcohol flushing, dried up with argon gas more then;
(4) and then with it in air, heat, and then anneal in the vacuum, further clean its surface;
(5) graphene nanobelt on the detection substrate, and record its position, obtain the channel layer of graphene nanobelt material;
(6) again with electron beam lithography in the source, the drain region makes first group of Au or Au/Ti contact, obtains source, drain electrode;
(7) adopt the atomic layer deposition method to make one deck HfO at channel layer
2Layer is as top gate medium;
(8) adopt electron beam lithography at the top gate medium layer, deposit forms the top gate electrode.
In the present invention, the used intercalator of described chemical graft process is sulfuric acid and nitric acid.
In the present invention, carrying out step (3) before, the bottom gate dielectric layer of resulting substrate is done metal marker in step (1) earlier.
The present invention adopt graphene nanobelt as the conducting channel material to form certain energy gap; The present invention utilizes hafnium oxide (HfO
2) as top grid and bottom gate dielectric material, utilize Au or Au/Ti as Metal Contact.The switch current ratio of adopting said method made device is up to 10
7, the mobility of channel electrons reaches 300cm
2/ Vs.
Characteristics of the present invention can be consulted the detailed description of the graphic and following better execution mode of this case and be obtained to be well understood to.
Description of drawings
Fig. 1 is the schematic diagram of graphene nanobelt field-effect transistor of the present invention.
Fig. 2 is the top grid transfer characteristic schematic diagram of graphene nanobelt field-effect transistor sample device.
Fig. 3 is the output characteristic schematic diagram of graphene nanobelt field-effect transistor sample device.
Embodiment
For technological means, creation characteristic that the present invention is realized, reach purpose and effect is easy to understand, further set forth the present invention below in conjunction with specific embodiment.
As shown in Figure 1, a kind of graphene nanobelt field-effect transistor, comprise substrate 110, channel layer 130, bottom gate dielectric layer 120, top gate medium layer 140, source electrode 150, drain electrode 160 and top gate electrode 170, top gate medium layer 140 and bottom gate dielectric layer 120 lay respectively at the above and below of channel layer 130, substrate 110 is positioned at the below of bottom gate dielectric layer 120, source electrode 150 and drain electrode 160 lay respectively at the two ends of channel layer, and top gate electrode 170 is positioned on the top gate medium layer 140.
Wherein, the channel layer of channel layer for adopting graphene nanobelt to make, the width of channel layer is less than 10nm.The material that constitutes the top gate electrode is Cr/Au or Ti/Au.The thickness of bottom gate dielectric layer and top gate medium layer is 30nm.The material of formation source electrode, drain electrode is Au or Au/Ti.
Bottom gate dielectric layer 120, top gate medium layer 140 all are to adopt HfO
2(hafnium oxide) is as gate medium.Logic for main flow is used, and the width of graphene nanobelt (GNR) can be limited in below the 10nm, makes Graphene at room temperature have enough big forbidden band to realize high switch current ratio.Owing to the edge of the graphene nanobelt that produces with ion etching is rough, so adopt the method for liquid phase production to prepare graphene nanobelt (GNR) in this patent, ultrasonic in the process of preparation is that stable deflocculated graphite alkene sheet becomes the more main cause of small pieces.In ultrasonic procedure, the phonochemistry effect has caused Graphene to become with hot bubble being different structures.
At SiO
2On the substrate, the carrier mobility in the Graphene mainly is subjected to the restriction of interfacial state, impurity, surperficial dangling bonds and surface optical phonon.Simultaneously, these interfacial states, impurity and dangling bonds can cause graphene film non-uniform Distribution and the doping effect of two-dimensional electron gas to occur near the Dirac point, thereby destroy near the electric neutrality the Dirac point.And studies show that for thin nanostructure, ionized impurity scattering can use high K medium to suppress around it, weakening of impurity scattering is that application owing to high K medium makes Coulomb scattering be subjected to shielding caused.
The preparation method of this graphene nanobelt field-effect transistor may further comprise the steps:
(1) earlier with the SiO that forms naturally on the low-resistance silicon substrate
2Layer erodes, and then utilizes the atomic layer deposition method to make the thick HfO of 30nm
2Layer is as the bottom gate dielectric layer.Adopt the atomic layer deposition method to make one deck HfO at substrate
2Layer is as the bottom gate dielectric layer; Concrete grammar is: with presetting in the scope that container is heated to 75～90 ℃ of metal Hf, this moment, its vapour pressure was about 0.05 holder, with H
2The container that presets of O keeps at room temperature, and its vapour pressure is 20T.Deposit HfO
2The time, each circulation comprises 1 metal Hf steam pulse and 2 H
2The pulse of O steam, their duration all is 1s.Then be the Hf steam rinsing of 5s and the H of 10s
2The rinsing of O steam.The growth rate of each circulation is about 0.19nm, and reaction pressure remains on 90mTorr, with highly purified nitrogen as carrier gas and washing gas.
(2) preparation graphene nanobelt:
A, adopt chemical graft process to produce extendible graphite in 350 μ m level graphite alkene, the used intercalator of chemical graft process is sulfuric acid and nitric acid; The oxidation of carbon atom most possibly occurs in edge, step and fault location.
B, fast with extendible graphite heating to 1000 ℃, this can make the strong escaping gas of generation in the intercalator, and Graphene is peeled off into a pile number of plies graphene film seldom;
C, utilize the ultrasonic and functionalization graphene sheet of PmPV (M-styrene support-CO-2,5-dioctoxy-P-styrene support) liquid phase can be created in the graphene nanobelt of stable suspersion among the DCE (1,2-dichloroethanes);
(3) elder generation's bottom gate dielectric layer of resulting substrate in step (1) is done metal marker.
(4) substrate that will have a bottom gate dielectric layer was immersed in the PmPV/DCE solution of graphene nanobelt about 20 minutes, with the isopropyl alcohol flushing, dried up with argon gas more then;
(5) and then with it under 350 ℃ condition, in air, heated about 10 minutes, and then under 600 ℃ of conditions, annealed about 10 minutes in a vacuum, further clean its surface;
(6) detect graphene nanobelt around the metal marker on the substrate with the Tapping pattern of atomic force microscope (AFM), and record its position, obtain the channel layer of graphene nanobelt material;
(7) after finding individual layer or double-layer graphite alkene nanometer band film, the light photoetching of applying electronic bundle and bilayer technology have been made first winding and have been touched, concrete grammar is: at first be coated with one deck methyl methacrylate (MMA) at sample, and then cured under 180 ℃ 5 minutes, and then be coated with last layer PMMA (polymethyl methacrylate), expose with electron-beam lithography system then, then at methylisobutylketone (MIBK): isopropyl alcohol (IPA) is to develop three minutes in 1: 3 the solution, steam the thick Au of last 50nm or Au/Ti then as contacting metal, then the flush away photoresist; Obtain source, drain electrode;
(8) if use Au as contacting metal, in order to reduce the contact resistance of Au and graphene nanobelt, in being 200 ℃ vacuum pipe furnace, temperature contacting metal was annealed 2 hours the argon gas of feeding 100sccm and the hydrogen of 10sccm during annealing earlier.
(9) adopt the atomic layer deposition method to make the thick HfO of one deck 30nm at channel layer
2Layer is as top gate medium;
(10) adopt electron beam lithography at the top gate medium layer, deposit Cr/Au or Ti/Au are as the top gate electrode.
After the preparation of graphene nanobelt field-effect transistor is finished, utilize the 4200-SCS characteristic of semiconductor analytical system of Keithley company that its DC I-V characteristic is characterized, Fig. 2, top grid transfer characteristic and the output characteristic that is respectively the sample device shown in Figure 3.According to DC I-V characteristic actual measured results and device architecture parameter, the device mobility that finally calculates is
More than show and described basic principle of the present invention, principal character and advantage of the present invention.The technical staff of the industry should understand; the present invention is not restricted to the described embodiments; what describe in above-described embodiment and the specification is principle of the present invention; the present invention also has various changes and modifications without departing from the spirit and scope of the present invention, and these changes and improvements all fall in the claimed scope of the present invention.The protection range that the present invention requires is defined by appending claims and equivalent thereof.
Claims (7)
1. a graphene nanobelt field-effect transistor is characterized in that, comprises substrate, channel layer, HfO
2The bottom gate dielectric layer of material, HfO
2The top gate medium layer of material, source electrode, drain electrode and top gate electrode, the channel layer of described channel layer for adopting graphene nanobelt to make, described top gate medium layer and bottom gate dielectric layer lay respectively at the above and below of channel layer, substrate is positioned at the below of bottom gate dielectric layer, source electrode and drain electrode lay respectively at the two ends of channel layer, and the top gate electrode is positioned on the top gate medium layer.
2. graphene nanobelt field-effect transistor according to claim 1 is characterized in that, the width of described channel layer is less than 10nm.
3. graphene nanobelt field-effect transistor according to claim 1 is characterized in that, the material that constitutes channel layer is individual layer or double-layer graphite alkene nanometer band.
4. graphene nanobelt field-effect transistor according to claim 1 is characterized in that, the thickness of described bottom gate dielectric layer and top gate medium layer is 30nm.
5. the preparation method of a graphene nanobelt field-effect transistor is characterized in that, may further comprise the steps:
(1) adopt the atomic layer deposition method to make one deck HfO at substrate
2Layer is as the bottom gate dielectric layer;
(2) preparation graphene nanobelt:
A, adopt chemical graft process to produce extendible graphite in 350 μ m level graphite alkene;
B, fast with extendible graphite heating to 800 ℃-1200 ℃, Graphene is peeled off into a pile number of plies graphene film seldom;
C, utilize the ultrasonic and described graphene film of functionalization of PmPV liquid phase can be created in the graphene nanobelt of stable suspersion among the DCE;
(3) substrate that will have a bottom gate dielectric layer was immersed in the PmPV/DCE solution of graphene nanobelt 15-25 minute, with the isopropyl alcohol flushing, dried up with argon gas more then;
(4) and then with it in air, heat, and then anneal in the vacuum, further clean its surface;
(5) graphene nanobelt on the detection substrate, and record its position, obtain the channel layer of graphene nanobelt material;
(6) again with electron beam lithography in the source, the drain region makes first group of Au or Au/Ti contact, obtains source, drain electrode;
(7) adopt the atomic layer deposition method to make one deck HfO at channel layer
2Layer is as top gate medium;
(8) adopt electron beam lithography at the top gate medium layer, deposit forms the top gate electrode.
6. the preparation method of graphene nanobelt field-effect transistor according to claim 5 is characterized in that, the used intercalator of described chemical graft process is sulfuric acid and nitric acid.
7. the preparation method of graphene nanobelt field-effect transistor according to claim 5 is characterized in that, is carrying out step (3) before, and the bottom gate dielectric layer of resulting substrate is done metal marker in step (1) earlier.
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| CN105789039A (en) * | 2016-04-26 | 2016-07-20 | 中国科学院微电子研究所 | Method for reducing ohmic contact of top gate graphene field effect transistor |
| CN105914148A (en) * | 2016-04-27 | 2016-08-31 | 中国科学院微电子研究所 | Preparation method of graphene field effect transistor and formed graphene field effect transistor |
| CN106952949A (en) * | 2016-01-07 | 2017-07-14 | 中芯国际集成电路制造(上海)有限公司 | graphene field effect transistor and forming method thereof |
| CN107275218A (en) * | 2017-05-27 | 2017-10-20 | 中国科学院微电子研究所 | Two-dimensional material device manufacturing method capable of avoiding photoresist contamination |
| CN107346780A (en) * | 2016-05-05 | 2017-11-14 | 上海新昇半导体科技有限公司 | Microelectronic structure and forming method thereof |
| CN108258054A (en) * | 2016-12-28 | 2018-07-06 | 中芯国际集成电路制造(上海)有限公司 | Graphene device and its manufacturing method |
| CN109300989A (en) * | 2018-09-18 | 2019-02-01 | 山东大学 | A kind of indium selenide transistor and its manufacturing method |
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| CN107275218A (en) * | 2017-05-27 | 2017-10-20 | 中国科学院微电子研究所 | Two-dimensional material device manufacturing method capable of avoiding photoresist contamination |
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| CN110998859A (en) * | 2017-07-06 | 2020-04-10 | 特励达科学与成像有限责任公司 | FET with buried gate structure |
| CN110998859B (en) * | 2017-07-06 | 2024-02-09 | 特励达科学与成像有限责任公司 | FET with buried gate structure |
| CN109300989A (en) * | 2018-09-18 | 2019-02-01 | 山东大学 | A kind of indium selenide transistor and its manufacturing method |
| CN111463289A (en) * | 2020-04-13 | 2020-07-28 | 国家纳米科学中心 | Field effect transistor and preparation method and application thereof |
| CN111463289B (en) * | 2020-04-13 | 2023-09-29 | 国家纳米科学中心 | Field effect transistor and preparation method and application thereof |
| CN114038756A (en) * | 2021-11-08 | 2022-02-11 | 上海交通大学 | Preparation method of field effect transistor based on narrow graphene nanoribbon |
| CN114038756B (en) * | 2021-11-08 | 2023-04-11 | 上海交通大学 | Preparation method of field effect transistor based on narrow graphene nanoribbon |
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