CN103646855A - Manufacturing method of graphene device - Google Patents
Manufacturing method of graphene device Download PDFInfo
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- CN103646855A CN103646855A CN201310713413.XA CN201310713413A CN103646855A CN 103646855 A CN103646855 A CN 103646855A CN 201310713413 A CN201310713413 A CN 201310713413A CN 103646855 A CN103646855 A CN 103646855A
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- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 title claims abstract description 125
- 229910021389 graphene Inorganic materials 0.000 title claims abstract description 125
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 30
- 239000000758 substrate Substances 0.000 claims abstract description 100
- 229920003229 poly(methyl methacrylate) Polymers 0.000 claims abstract description 73
- 239000004926 polymethyl methacrylate Substances 0.000 claims abstract description 73
- 239000004642 Polyimide Substances 0.000 claims abstract description 10
- 229920001721 polyimide Polymers 0.000 claims abstract description 10
- 239000008367 deionised water Substances 0.000 claims abstract description 5
- 229910021641 deionized water Inorganic materials 0.000 claims abstract description 5
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims abstract description 5
- 238000000034 method Methods 0.000 claims description 83
- 239000002184 metal Substances 0.000 claims description 63
- 229910052751 metal Inorganic materials 0.000 claims description 63
- 230000008569 process Effects 0.000 claims description 24
- 238000005516 engineering process Methods 0.000 claims description 21
- 238000001039 wet etching Methods 0.000 claims description 20
- 238000001259 photo etching Methods 0.000 claims description 18
- 230000015572 biosynthetic process Effects 0.000 claims description 15
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical group [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 11
- 238000006243 chemical reaction Methods 0.000 claims description 11
- 229910052710 silicon Inorganic materials 0.000 claims description 11
- 239000010703 silicon Substances 0.000 claims description 11
- 238000000151 deposition Methods 0.000 claims description 9
- 238000005530 etching Methods 0.000 claims description 8
- 238000005566 electron beam evaporation Methods 0.000 claims description 7
- 239000011259 mixed solution Substances 0.000 claims description 4
- 239000000243 solution Substances 0.000 claims description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 3
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 3
- 229910052802 copper Inorganic materials 0.000 claims description 3
- 239000010949 copper Substances 0.000 claims description 3
- 239000003989 dielectric material Substances 0.000 claims description 3
- 229940044631 ferric chloride hexahydrate Drugs 0.000 claims description 3
- 239000011521 glass Substances 0.000 claims description 3
- NQXWGWZJXJUMQB-UHFFFAOYSA-K iron trichloride hexahydrate Chemical compound O.O.O.O.O.O.[Cl-].Cl[Fe+]Cl NQXWGWZJXJUMQB-UHFFFAOYSA-K 0.000 claims description 3
- 229920003023 plastic Polymers 0.000 claims description 3
- 239000004033 plastic Substances 0.000 claims description 3
- 229910052594 sapphire Inorganic materials 0.000 claims description 3
- 239000010980 sapphire Substances 0.000 claims description 3
- 239000004372 Polyvinyl alcohol Substances 0.000 abstract description 41
- 229920002451 polyvinyl alcohol Polymers 0.000 abstract description 41
- 229920002120 photoresistant polymer Polymers 0.000 description 9
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 6
- 230000005669 field effect Effects 0.000 description 6
- 238000000231 atomic layer deposition Methods 0.000 description 4
- 239000000463 material Substances 0.000 description 4
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- 125000004429 atom Chemical group 0.000 description 2
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- 238000005229 chemical vapour deposition Methods 0.000 description 2
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- 238000012986 modification Methods 0.000 description 2
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- 239000003960 organic solvent Substances 0.000 description 2
- 238000009832 plasma treatment Methods 0.000 description 2
- 238000004528 spin coating Methods 0.000 description 2
- 229910000838 Al alloy Inorganic materials 0.000 description 1
- XTXRWKRVRITETP-UHFFFAOYSA-N Vinyl acetate Chemical compound CC(=O)OC=C XTXRWKRVRITETP-UHFFFAOYSA-N 0.000 description 1
- 230000001133 acceleration Effects 0.000 description 1
- 238000006136 alcoholysis reaction Methods 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 229910052593 corundum Inorganic materials 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 229910002804 graphite Inorganic materials 0.000 description 1
- 239000010439 graphite Substances 0.000 description 1
- -1 graphite alkene Chemical class 0.000 description 1
- 239000007770 graphite material Substances 0.000 description 1
- 238000003384 imaging method Methods 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 239000002127 nanobelt Substances 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
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- 238000002834 transmittance Methods 0.000 description 1
- 229920003169 water-soluble polymer Polymers 0.000 description 1
- 229910001845 yogo sapphire Inorganic materials 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/7806—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices involving the separation of the active layers from a substrate
- H01L21/7813—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices involving the separation of the active layers from a substrate leaving a reusable substrate, e.g. epitaxial lift off
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
- H01L21/2003—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
- H01L21/2007—Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
Abstract
The invention provides a manufacturing method of a graphene device. The manufacturing method of the graphene device at least comprises providing a first substrate; forming a PVA (polyvinyl alcohol) layer; forming a PMMA (polymethyl methacrylate) layer on the PVA layer; forming the graphene device on the PMMA layer; putting the first substrate, the PVA layer, the PMMA layer and the graphene device into deionized water to dissolve the PVA layer and to separate the PMMA layer and the graphene device from the first substrate; transferring the PMMA layer and the graphene device to a second substrate. According to the manufacturing method of the graphene device, PMMA serves as the support layer and meanwhile PVA serves as the sacrificial layer; by removing the PVA, the graphene device formed on the PMMA layer and the PMMA layer can be separated from the first substrate simultaneously and then adhered to the second substrate (a polyimide substrate in the embodiment), therefore, the graphene device can be formed on the second substrate. The manufacturing method of the graphene device can widen the application range of the graphene device.
Description
Technical field
The present invention relates to a kind of semiconductor technology, particularly relate to a kind of manufacture method of graphene device.
Background technology
Graphene is to peel off out from graphite material, the two dimensional crystal being formed by carbon atom, the thickness that only has one deck carbon atom, it is the thinnest also the hardest so far material, its unique structure makes it demonstrate a series of peculiar physical characteristics, as high conductivity, thermal conductivity, light transmittance, high mobility and mechanical strength etc.That Graphene has is transparent, soft, band structure a series of important photoelectric characteristics such as adjustable, electron mobility is high continuously, electronic device based on Graphene has important application prospect in nano electron device of future generation field, as light-emitting diode, solar cell and nano generator etc.These superior physical properties are indicating that Graphene can be used as splendid semi-conducting material and in conjunction with different substrates, is widely used in electronics, the fields such as transducer and the energy.
Along with research do not enter the continuous propelling with technology, the function that the Graphene of take is basic device will further be promoted, and by the important member who becomes in following nano-device.Yet the graphene field effect transistor Study on Preparation existing at present, owing to wanting integrated low temperature process technique, high-k dielectrics preparation technologies etc. adopt semiconductor silicon as substrate mostly, yet as organic or inorganic substrate, in rigidity and flexible substrate, large-scale integrated has high-performance nano device and remains and have challenge at substrate arbitrarily.
Summary of the invention
The shortcoming of prior art in view of the above, the object of the present invention is to provide a kind of manufacture method of graphene device, be used for solving prior art graphene field effect transistor preparation technology and mostly adopt semiconductor silicon as substrate, the problem that the application of graphene device is restricted.
For achieving the above object and other relevant objects, the invention provides a kind of manufacture method of graphene device, the manufacture method of described graphene device at least comprises:
The first substrate is provided;
On described the first substrate, form PVA layer;
On described PVA layer, form PMMA layer;
On described PMMA layer, form graphene device;
Described the first substrate, described PVA layer, described PMMA layer and described graphene device are put into deionized water, to dissolve described PVA layer, described PMMA layer and described graphene device and described the first substrate are departed from;
Described PMMA layer and described graphene device are shifted on the second substrate.
Preferably, the step that forms graphene device on described PMMA layer comprises:
On described PMMA layer, form graphene layer;
Utilize depositing operation to form the first metal layer on described graphene layer;
Utilize photoetching process and wet-etching technology described the first metal layer to be formed to source electrode and the drain electrode of described graphene device;
In described graphene layer, described source electrode and described drain electrode, form gate dielectric layer;
Utilize depositing operation on described gate dielectric layer, to form the second metal level;
Utilize photoetching process and wet-etching technology that described the second metal level is formed to metal roof gate electrode, described metal roof gate electrode is on the gate dielectric layer between described source electrode and described drain electrode;
Utilize photoetching process and wet-etching technology to remove the described gate dielectric layer of described source electrode and described drain electrode top, to expose described source electrode and described drain electrode.
Preferably, the method for described formation graphene layer is mechanical stripping method.
Preferably, described the first metal layer is Au, and thickness is 50nm～100nm, and formation technique is electron beam evaporation.
Preferably, at described photoetching process and the wet-etching technology of utilizing, described the first metal layer is formed in the source electrode of described graphene device and the step of drain electrode, utilize the first metal layer described in the mixed solution etching of K2 and I2.
Preferably, described gate dielectric layer is high K dielectric material, and thickness is 10nm～30nm.
Preferably, described gate dielectric layer is Al2O3, and formation technique is ald, and while carrying out described ald, it is 150 ℃ that reaction temperature is set.
Preferably, described the second metal level is copper, and thickness is electron beam evaporation for forming technique.
Preferably, described photoetching process and the wet-etching technology of utilizing forms described the second metal level in the step of metal roof gate electrode, utilizes the second metal level described in described ferric chloride hexahydrate solution etching.
Preferably, described the first substrate is silicon substrate.
Preferably, described the second substrate is organic substrate, Sapphire Substrate, glass substrate, GaN substrate, AlN substrate, plastic or metal substrate.
Preferably, described the second substrate is polyimide substrate.
Preferably, after described PMMA layer and described graphene device are shifted on the second substrate, also comprise and carry out at 70 ℃, toasting the step of 10min by described in described PMMA layer, described graphene device, the second substrate.
Preferably, the thickness of described PVA layer is 80nm～120nm.
Preferably, the thickness of described PMMA layer is 180nm～250nm.
As mentioned above, the manufacture method of graphene device of the present invention, has following beneficial effect:
The present invention adopts PMMA to do supporting layer, described graphene device is formed on to PMMA layer, utilize PVA as sacrifice layer simultaneously, described PMMA layer is cohered on the first substrate (being silicon substrate in the present embodiment), then, again by removing PVA, the graphene device that makes to be formed on PMMA layer together departs from the first substrate together with described PMMA layer, then, again described PMMA layer and the second substrate (being polyimide substrate in the present embodiment) that carries graphene device cohered, thereby realize, graphene device is formed on the second substrate.Can break through like this graphene device and can only make the limitation on silicon substrate at present, expand the range of application of graphene device.
In addition, in the technique of described formation graphene device, all adopt low temperature process to form dielectric layer, adopt photoetching and wet etching to form all parts in graphene device, avoid adopting the techniques such as high-temperature technology, plasma process, acetone, thereby avoid the impact on PVA layer and PMMA layer in technique, thereby guarantee the described graphene device of complete formation, and guarantee by complete transferring on the second substrate.
Accompanying drawing explanation
Fig. 1 to Figure 10 is shown as the schematic diagram of the manufacture method of graphene device of the present invention.
Element numbers explanation
Embodiment
The present invention will provide a kind of manufacture craft of transferable graphene device, at least comprises: on described the first substrate, form PVA layer; On described PVA layer, form PMMA layer, on described PMMA layer, prepare graphene device, dissolving PVA layer subsequently, graphene device is transferred in polyimide substrate together with PMMA layer, realization forms graphene device in flexible polymer substrate, and the devices switch specific energy in flexible polymer substrate reaches 10
-6, it still can normally worked through device after bending repeatedly.
The present invention is also applicable to prepared graphene device to be transferred on other substrate in addition, realizes graphene electronic device functional promotion and application widely thereof.
Below, by specific instantiation explanation embodiments of the present invention, those skilled in the art can understand other advantages of the present invention and effect easily by the disclosed content of this specification.The present invention can also be implemented or be applied by other different embodiment, and the every details in this specification also can be based on different viewpoints and application, carries out various modifications or change not deviating under spirit of the present invention.
Refer to shown in Fig. 1 to Figure 10.It should be noted that, the diagram providing in the present embodiment only illustrates basic conception of the present invention in a schematic way, satisfy and only show with assembly relevant in the present invention in graphic but not component count, shape and size drafting while implementing according to reality, during its actual enforcement, kenel, quantity and the ratio of each assembly can be a kind of random change, and its assembly layout kenel also may be more complicated.
Concrete, shown in figure 1, the manufacture craft of the described graphene device that the present embodiment provides, at least comprises:
First, shown in Fig. 1, execution step S10: the first substrate 100 is provided;
In the present embodiment, described the first substrate 100 is silicon substrate.
Next, execution step S20: form PVA(Polyvinyl Alcohol, polyvinyl alcohol on described the first substrate) layer 210;
PVA is a kind of high molecular weight water soluble polymer, by vinyl acetate, through polymerization alcoholysis, is made, and its unique properties, has the preferably advantageous property such as cementability, pliability, flatness, solvent resistance.
In the present embodiment, utilize PVA to do sacrifice layer, so that the device of the first substrate 100 and subsequent technique formation is bonding, then, more dissolved, thereby realize, the device forming can be shifted.
Yet, PVA at high temperature can with Ar, H
2reaction and meeting and O
2the reactions such as plasma reaction, so in subsequent technique, avoid technological temperature higher, and avoid Ar/H
2annealing, O
2plasma treatment.
Concrete, in the present embodiment, adopt the mode of spin coating to form PVA layer 210 on described the first substrate 100, the thickness of described PVA layer 210 is 100nm left and right, is specially 80nm～120nm.
Next, execution step S30: form PMMA(Polymethylmethacrylate, polymethyl methacrylate on described PVA layer 210) layer 220;
PMMA have light weight, mechanical strength higher, be easy to moulding, be easy to be dissolved in the advantages such as organic solvent, and can form good film and good dielectric property, can be used as the dielectric layer of organic field-effect tube.Thereby, in the present embodiment, adopt PMMA layer as supporting layer, in subsequent technique, graphene device is formed on described PMMA layer 220.
Yet, PMMA at high temperature can with Ar, H
2reaction and meeting and O
2the reactions such as plasma reaction, so in subsequent technique, avoid technological temperature higher, and avoid Ar/H
2annealing, O
2plasma treatment, and avoid electron beam exposure technique.
Concrete, in the present embodiment, adopt the mode of spin coating to form PMMA layer 220 on described PVA layer 210, the thickness of described PMMA layer 220 is 200nm left and right, is specially 180nm～220nm.
Next, in conjunction with reference to figure 3 to Fig. 8, execution step S40: on described PMMA layer 220, form graphene device;
Described graphene device can be zero band gap, top grid graphene field effect pipe, double-layer graphite alkene transistor, bipolar superconduction Graphene transistor or graphene nanobelt field effect transistor etc.
Wherein, in the present embodiment, described graphene device is top grid graphene field effect pipe, and the technique that this step forms described graphene device comprises:
As shown in Figure 3, on described PMMA layer 220, form graphene layer 300;
In the present embodiment, adopt mechanical stripping method to form described graphene layer 300.So far, mechanical stripping method is the method that the most simply forms Graphene, to laboratory condition, requires minimum.And the temperature of mechanical stripping method is lower, smaller on the impact of PVA layer 210 and PMMA layer 220.
And in other embodiments, all right SiC epitaxial growth method of the technique of described formation graphene layer 300, CVD (Chemical Vapor Deposition) method or other method.
Then, as shown in Figure 4, utilize depositing operation to form the first metal layer 400 on described graphene layer 300;
In the present embodiment, described the first metal layer 400 is Au, and described depositing operation is electron beam evaporation.
Wherein, electron beam evaporation is a kind of clean deposit metal films technique.General electronics forming energy through focusing, deflection and acceleration after of being launched by heated filament is about the electron beam of 10keV, and described beam bombardment is placed on the metal targets in the container of cooling jacket and makes it to evaporate.The metallic atom evaporating can be to be deposited near the substrate (as silicon chip) being placed in metal targets upper, thereby on substrate, obtained the certain thickness coat of metal.
In this process, substrate temperature around can be too not high, little on the impact of described PVA layer 210 and described PMMA layer 220.
Then, as shown in Figure 5, utilize photoetching process and wet-etching technology described the first metal layer 400 to be formed to source electrode 410 and the drain electrode 420 of described graphene device;
Concrete, in this step, comprising: on described the first metal layer 400, form photoresist layer (not shown); Again the photoresist layer on described the first metal layer 400 is exposed and developed, to form the pattern in source region and the drain region of described graphene device on described photoresist layer; The described photoresist layer with source region and drain region pattern of take is again mask, utilizes K
2and I
2mixed solution described the first metal layer is carried out to wet etching, described the first metal layer 400 is formed to source electrode 410 and the drain electrode 420 of described graphene device.In addition, this step also comprises the residual photoresist of removing on described the first metal layer 400.
In this step, the technique that described the first metal layer 400 is formed to described source electrode 410 and drain electrode 420 is photoetching process and wet etching, in photoetching process, the organic solvent that does not have acetone or other energy dissolving PVA and PMMA layer in photoresist and developer solution adopts K in the process of described etching first metal layer
2and I
2mixed solution carry out wet etching, avoid adopting the dry plasma etch of general etching metal, thereby avoided electron beam exposure technique and the impact of plasma on PVA and PMMA layer.
Then, as shown in Figure 6, in described graphene layer 300, described source electrode 410 and described drain electrode 420, form gate dielectric layer 500;
Described gate dielectric layer 500 is high K medium layer.Material can be Al
2o
3, HfO
2deng.In the present embodiment, described gate dielectric layer 500 is Al
2o
3, generation type is ald, wherein, described ald (Atomic layer deposition, be called for short ALD) be a kind of can be by material with the form of the monoatomic layer method that is plated in substrate surface in layer.In atomic layer deposition process, the chemical reaction of new one deck atomic film is to be directly associated with one deck before, and this mode makes every secondary response only deposit one deck atom.For traditional depositing operation, the ALD that monoatomic layer successively deposits has obvious advantage at the aspects such as uniformity, step coverage rate and THICKNESS CONTROL of rete.
In addition, in the present embodiment, when carrying out described ald, reaction temperature is 150 ℃.Such reaction temperature can not exerting an influence to PVA and PMMA.
Then, as shown in Figure 7, utilize depositing operation to form the second metal level on described gate dielectric layer 500, utilize photoetching process and wet-etching technology that described the second metal level is formed to metal roof gate electrode 600.
Described the second metal level is copper, and the depositing operation of described formation the second metal level is electron beam evaporation.In the step of similar formation the first metal layer, in forming the second metal level, substrate temperature around can be too not high, little on the impact of described PVA layer 210 and described PMMA layer 220.
Wherein, the technique of utilizing photoetching process and wet-etching technology that described the second metal level is formed to metal roof gate electrode 600 comprises: on described the second metal level, form photoresist, and then the photoresist on described the second metal level is carried out to exposure imaging, to form the figure of described metal roof gate electrode, the top of the figure of described metal roof gate electrode between described source electrode 410 and described drain electrode 420.The described photoresist with the figure of metal roof gate electrode of take is again mask, described the second metal level is carried out to etching, to form described metal roof gate electrode 600, described metal roof gate electrode 600 is on the gate dielectric layer 500 between described source electrode 410 and described drain electrode 420.The technique of described etching the second metal level is for utilizing described ferric chloride hexahydrate solution to carry out wet etching.
The step of the described source electrode 410 of similar formation and described drain electrode 420, this step forms the technique of metal roof gate electrode 600 can avoid the impact on PVA and PMMA layer.
Then, as shown in Figure 8, utilize photoetching process and wet-etching technology to remove the described gate dielectric layer 500 of described source electrode 410 and described drain electrode 420 tops, to expose described source electrode 410 and described drain electrode 420, so far, formed the described graphene device in the present embodiment.
Next, execution step S50: as shown in Figure 9, described the first substrate, described PVA layer, described PMMA layer and described graphene device are put into deionized water 10, to dissolve described PVA layer, described PMMA layer and described graphene device and described the first substrate are departed from;
Wherein, described PVA layer is dissolved in deionized water 10, and described PMMA layer carries described graphene device and wafts and keep afloat up.
Next, execution step S60: as shown in figure 10, described PMMA layer and described graphene device are shifted on the second substrate 101.
In the present embodiment, described the second substrate 101 is polyimide substrate.Polyimides is a kind of polymeric material with excellent combination property and operational characteristic.It has the hardness that can compare with aluminium alloy, well intensity, pliability, and chemistry and irradiation stability.In this step, described PMMA layer and described graphene device are transferred in polyimide substrate, the electronic product with described graphene device can have light, thin and can be curling etc. character.
In addition, in this step, described PMMA layer and described graphene device are being shifted to the second substrate 101(polyimide substrate) upper after, also comprise and carry out at 70 ℃, toasting the step of 10min described in described PMMA layer, described graphene device, the second substrate 101, to strengthen the adhesion between the second substrate 101 and PMMA.
In other embodiments, described the second substrate 101 is organic substrate, Sapphire Substrate, glass substrate, GaN substrate, AlN substrate, plastic or metal substrate.Described PMMA layer and described graphene device are transferred on different substrates, and described graphene device can have different application.Like this, by the way, by described graphene device, from first substrate 100(the present embodiment, be silicon substrate) transfer on the second substrate 101, the application of graphene device is expanded greatly.
In sum, the present invention adopts PMMA to do supporting layer, described graphene device is formed on to PMMA layer, utilize PVA as sacrifice layer simultaneously, described PMMA layer is cohered on the first substrate (being silicon substrate in the present embodiment), then, again by removing PVA, the graphene device that makes to be formed on PMMA layer together departs from the first substrate together with described PMMA layer, then, again described PMMA layer and the second substrate (being polyimide substrate in the present embodiment) that carries graphene device cohered, thereby realize, graphene device is formed on the second substrate.Can break through like this graphene device and can only make the limitation on silicon substrate at present, expand the range of application of graphene device.
In addition, in the technique of described formation graphene device, all adopt low temperature process to form dielectric layer, adopt photoetching and wet etching to form all parts in graphene device, avoid adopting the techniques such as high-temperature technology, plasma process, acetone, thereby avoid the impact on PVA layer and PMMA layer in technique, thereby guarantee the described graphene device of complete formation, and guarantee by complete transferring on the second substrate.
So the present invention has effectively overcome various shortcoming of the prior art and tool high industrial utilization.
Above-described embodiment is illustrative principle of the present invention and effect thereof only, but not for limiting the present invention.Any person skilled in the art scholar all can, under spirit of the present invention and category, modify or change above-described embodiment.Therefore, such as in affiliated technical field, have and conventionally know that the knowledgeable, not departing from all equivalence modifications that complete under disclosed spirit and technological thought or changing, must be contained by claim of the present invention.
Claims (15)
1. a manufacture method for graphene device, is characterized in that, the manufacture method of described graphene device at least comprises:
The first substrate is provided;
On described the first substrate, form PVA layer;
On described PVA layer, form PMMA layer;
On described PMMA layer, form graphene device;
Described the first substrate, described PVA layer, described PMMA layer and described graphene device are put into deionized water, to dissolve described PVA layer, described PMMA layer and described graphene device and described the first substrate are departed from;
Described PMMA layer and described graphene device are shifted on the second substrate.
2. the manufacture method of graphene device according to claim 1, is characterized in that: the step that forms graphene device on described PMMA layer comprises:
On described PMMA layer, form graphene layer;
Utilize depositing operation to form the first metal layer on described graphene layer;
Utilize photoetching process and wet-etching technology described the first metal layer to be formed to source electrode and the drain electrode of described graphene device;
In described graphene layer, described source electrode and described drain electrode, form gate dielectric layer;
Utilize depositing operation on described gate dielectric layer, to form the second metal level;
Utilize photoetching process and wet-etching technology that described the second metal level is formed to metal roof gate electrode, described metal roof gate electrode is on the gate dielectric layer between described source electrode and described drain electrode;
Utilize photoetching process and wet-etching technology to remove the described gate dielectric layer of described source electrode and described drain electrode top, to expose described source electrode and described drain electrode.
3. the manufacture method of graphene device according to claim 2, is characterized in that: the method for described formation graphene layer is mechanical stripping method.
4. the manufacture method of graphene device according to claim 1, is characterized in that: described the first metal layer is Au, and thickness is 50nm～100nm, and formation technique is electron beam evaporation.
5. the manufacture method of graphene device according to claim 4, is characterized in that: at described photoetching process and the wet-etching technology of utilizing, described the first metal layer is formed in the source electrode of described graphene device and the step of drain electrode, utilize K
2and I
2mixed solution etching described in the first metal layer.
6. the manufacture method of graphene device according to claim 2, is characterized in that: described gate dielectric layer is high K dielectric material, and thickness is 10nm～30nm.
7. the manufacture method of graphene device according to claim 2, is characterized in that: described gate dielectric layer is Al
2o
3, formation technique is ald, while carrying out described ald, it is 150 ℃ that reaction temperature is set.
8. the manufacture method of graphene device according to claim 2, is characterized in that: described the second metal level is copper, and thickness is electron beam evaporation for forming technique.
9. the manufacture method of graphene device according to claim 8, it is characterized in that: described photoetching process and the wet-etching technology of utilizing forms described the second metal level in the step of metal roof gate electrode, utilize the second metal level described in described ferric chloride hexahydrate solution etching.
10. the manufacture method of graphene device according to claim 1, is characterized in that: described the first substrate is silicon substrate.
The manufacture method of 11. graphene devices according to claim 1, is characterized in that: described the second substrate is organic substrate, Sapphire Substrate, glass substrate, GaN substrate, AlN substrate, plastic or metal substrate.
The manufacture method of 12. graphene devices according to claim 1, is characterized in that: described the second substrate is polyimide substrate.
The manufacture method of 13. graphene devices according to claim 1, it is characterized in that: after described PMMA layer and described graphene device are shifted on the second substrate, also comprise and carry out at 70 ℃, toasting the step of 10min by described in described PMMA layer, described graphene device, the second substrate.
The manufacture method of 14. graphene devices according to claim 1, is characterized in that: the thickness of described PVA layer is 80nm～120nm.
The manufacture method of 15. graphene devices according to claim 1, is characterized in that: the thickness of described PMMA layer is 180nm～250nm.
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