CN108511513A - A kind of AlGaN with vertical structure GaN power devices and preparation method thereof - Google Patents
A kind of AlGaN with vertical structure GaN power devices and preparation method thereof Download PDFInfo
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- CN108511513A CN108511513A CN201810133689.3A CN201810133689A CN108511513A CN 108511513 A CN108511513 A CN 108511513A CN 201810133689 A CN201810133689 A CN 201810133689A CN 108511513 A CN108511513 A CN 108511513A
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- 229910002704 AlGaN Inorganic materials 0.000 title claims abstract description 61
- 238000002360 preparation method Methods 0.000 title claims abstract description 14
- 238000002161 passivation Methods 0.000 claims abstract description 29
- 229910004205 SiNX Inorganic materials 0.000 claims abstract description 14
- 239000002184 metal Substances 0.000 claims description 19
- 229910052751 metal Inorganic materials 0.000 claims description 19
- 238000005530 etching Methods 0.000 claims description 11
- 229910052594 sapphire Inorganic materials 0.000 claims description 10
- 239000010980 sapphire Substances 0.000 claims description 10
- 239000002019 doping agent Substances 0.000 claims description 9
- 239000000758 substrate Substances 0.000 claims description 9
- 238000011049 filling Methods 0.000 claims description 6
- 238000007740 vapor deposition Methods 0.000 claims description 5
- 239000000956 alloy Substances 0.000 claims description 3
- 229910045601 alloy Inorganic materials 0.000 claims description 3
- 239000002131 composite material Substances 0.000 claims description 3
- 238000010276 construction Methods 0.000 claims description 3
- 230000008021 deposition Effects 0.000 claims description 3
- 150000002739 metals Chemical class 0.000 claims description 2
- 230000005533 two-dimensional electron gas Effects 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 4
- 239000010931 gold Substances 0.000 description 3
- 230000017525 heat dissipation Effects 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 238000005253 cladding Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- VZPPHXVFMVZRTE-UHFFFAOYSA-N [Kr]F Chemical compound [Kr]F VZPPHXVFMVZRTE-UHFFFAOYSA-N 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 230000035800 maturation Effects 0.000 description 1
- 210000003739 neck Anatomy 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 230000006641 stabilisation Effects 0.000 description 1
- 238000011105 stabilization Methods 0.000 description 1
- 238000010025 steaming Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
- H01L29/7788—Vertical transistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1025—Channel region of field-effect devices
- H01L29/1029—Channel region of field-effect devices of field-effect transistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/401—Multistep manufacturing processes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
- H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
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Abstract
The present invention relates to a kind of AlGaN/GaN power devices and preparation method thereof with vertical structure, including the drain electrode, the n that from bottom to top set gradually+GaN layer and n GaN U-channels are equipped with a upper surface and n GaN U-channel upper surface flush in the n GaN U-channels, and depth is less than the AlGaN u shape grooves of n GaN U-channel depth, and table is equipped with layer of sin in the AlGaN u shape groovesxU shape grid；In the SiNxThe p GaN of a upper surface and n GaN U-channel upper surface flush are filled in u shapes grid；It is equipped with covering p GaN, SiN at the middle part of the upper surfaces the p GaNxThe dielectric passivation layer of u shapes grid and part AlGaN u shape grooves, the upper surface of the dielectric passivation layer is additionally provided with the source electrode of overwrite media passivation layer and n GaN U-channels, and the gate electrode being connected with p GaN is arranged in the both sides of source electrode.The advantage of the invention is that：The present invention substantially improves performance of the device in high frequency and high power occasion, and then can greatly improve device reliability and ensure that device operating voltages are stablized.
Description
Technical field
The invention belongs to semiconductor device processing technology field, more particularly to a kind of AlGaN/GaN with vertical structure
Power device and preparation method thereof.
Background technology
Currently, AlGaN/GaN hetero-junctions HEMT device is since its electron saturation velocities is high, disruptive field intensity is high, cutoff frequency
High, the features such as saturation current is high, it is very suitable for the workplace of high-frequency high-power, but be faced with two problems：Heat dissipation performance is not
Good and saturated electrons rate-constrained.The substrate of current most widely used growth GaN material is Sapphire Substrate, has cost
The advantages that low, technology maturation, stability is good, high mechanical strength.But due to the heat of Sapphire Substrate and GaN base material be adapted to compared with
Big and thermal conductivity is very low, limits application of the device in high-power high-frequency rate occasion.The GaN base LED necks grown on sapphire
Domain has had ripe be transferred to LED using laser lift-off technique to be conducive to enhance the heat-sinking capability of great power LED
Technology on the metal substrate of heat dissipation, the 248nm superlasers sent out using krypton fluoride laser are by Sapphire Substrate and extension
After layer separation, epitaxial layer is bonded on the good metal substrate of heat dissipation performance.
At this stage, the AlGaN/GaN hetero-junctions HEMT of prevalence is mostly planar structure, source electrode, drain electrode, the grid of device in the market
Pole is all in the top surface of device, and when operating ambient temperature rises, operating voltage increases, the reliability of device can be decreased obviously, this
Outside, planar structure AlGaN/GaN hetero-junctions HEMT is also unfavorable for integrated with other elements.
Therefore, research and develop it is a kind of can greatly improve device reliability and ensure device operating voltages stablize have vertical junction
AlGaN/GaN power devices of structure and preparation method thereof are necessary.
Invention content
Device reliability can be greatly improved the technical problem to be solved in the present invention is to provide one kind and ensures device work
The AlGaN/GaN power devices and preparation method thereof with vertical structure of voltage stabilization.
In order to solve the above technical problems, the technical scheme is that：A kind of AlGaN/GaN power with vertical structure
Device, innovative point are：Including drain electrode, the n from bottom to top set gradually+GaN layer and n-GaN U-channels, in institute
It states and is equipped with a upper surface and n-GaN U-channel upper surface flush in n-GaN U-channels, and depth is less than n-GaN U-shaped ditches
The AlGaN u shape grooves of groove depth, and table is equipped with layer of sin in the AlGaN u shape groovesxU shape grid；In the SiNx u
The p-GaN of a upper surface and n-GaN U-channel upper surface flush is filled in shape grid；Middle part in the upper surfaces p-GaN
Equipped with covering p-GaN, SiNxThe dielectric passivation layer of u shapes grid and part AlGaN u shape grooves, the dielectric passivation layer it is upper
Surface is additionally provided with the source electrode of overwrite media passivation layer and n-GaN U-channels, and is symmetrically set in the both sides of source electrode
There is the gate electrode being connected with p-GaN.
Further, the source electrode is being parallel to SiNxArea coverage is slightly less than dielectric passivation on the direction of u shape grid
Layer.
Further, the thickness of the drain electrode is 20nm~500nm, the n+The thickness of GaN layer is 500nm~3
μm, the depth of the n-GaN U-channels is 2 μm~5 μm, and the width between the notch of n-GaN U-channels is 2 μm~3 μm,
The depth of the AlGaN u shape grooves is 1.5 μm~4 μm, and the width between the notch of AlGaN u shape grooves is 1 μm~2 μm,
The SiNxThe thickness of u shape grid is 10nm~50nm, and the thickness of the dielectric passivation layer is 50nm~500nm, the source electrode electricity
The length of pole is 100nm~500nm, and thickness is 20nm~500nm, and the length of side of the gate electrode is 500nm~2 μm.
A kind of preparation method of the above-mentioned AlGaN/GaN power devices with vertical structure, innovative point are：The system
Preparation Method includes the following steps：
(1) on a sapphire substrate, using Si as dopant, doping concentration is 1 × 1018cm-3~5 × 1019cm-3, grow
n+GaN layer；
(2) in n+In GaN layer, using Si as dopant, doping concentration is 1 × 1017cm-3~5 × 1018cm-3, grow n-
GaN layer；
(3) longitudinal etching on n-GaN layers, is etched to n+GaN layer ultimately forms a n- at n-GaN layers of interface
GaN U-channels；
(4) AlGaN is grown in the n-GaN U-channels etched, until filling and leading up n-GaN U-channels；
(5) longitudinal etching, etching depth width are all slightly less than GaN grooves again on AlGaN, form AlGaN u shape ditches
Slot；
(6) high quality SiN is grown in AlGaN u shape groovesxThin layer forms SiN as gate mediumxU shape grid；
(7) in SiNxP-GaN is grown in u shape grid, until fill up u shape grooves, dopant Mg, doping concentration is 5 ×
1016cm-3~5 × 1018cm-3；
(8) in one layer of dielectric passivation layer of device surface homoepitaxial；
(9) constituency etching is carried out to dielectric passivation layer, Al-GaN layers of exposing and n-GaN layers of interface is etched in transverse direction,
It is etched to centre on longitudinal direction and leaves sufficient length making source electrode；
(10) one layer of metal is deposited in the way of vapor deposition etc. in device surface, longitudinal quarter is carried out to the first layer metal of deposition
Erosion, until middle section exposed portion dielectric passivation layer, exposes the strip source electrode for being developed across AlGaN u shape grooves, and
Respectively expose a reguline metal as gate electrode in AlGaN u shape grooves both ends；
(11) it is gone out by the way of laser lift-off the sapphire of bottom, and in the n of exposing+GaN layer lower surface is using steaming
The modes such as plating deposit one layer of metal as drain electrode.
Further, metal in the step (10) and step (11) select a certain kind in Ti/Al/Ni/Au or
The alloy or metallic multilayer composite construction of various metals.
The advantage of the invention is that：The present invention has the AlGaN/GaN power devices and preparation method thereof of vertical structure, this
The n-GaN that invention is arranged by vertical direction and the interfaces AlGaN so that two-dimensional electron gas can be moved in the vertical direction and be formed
Raceway groove enhances the rate travel of two-dimensional electron gas；The control to two-dimensional electron gas is improved by the grid of u shape groove structures simultaneously
Ability；And the p-GaN filled in u shape trench gates can so that HEMT ends in the case of non-grid positive bias, form application
The wider enhanced HEMT of range；In addition, passing through the gate electrode and other region passivation layers that are spatially separated and both ends are drawn
Cladding, the problem for causing cut-in voltage unstable can be polluted to avoid grid caused by other technological processes.
Description of the drawings
The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.
Fig. 1 is the side view for the AlGaN/GaN power devices that the present invention has vertical structure.
Fig. 2 is the top view for the AlGaN/GaN power devices that the present invention has vertical structure.
Fig. 3-Figure 15 is the preparation flow figure for the AlGaN/GaN power devices that the present invention has vertical structure.
Specific implementation mode
The following examples can make professional and technical personnel that the present invention be more fully understood, but therefore not send out this
It is bright to be limited among the embodiment described range.
Embodiment
The present embodiment has the AlGaN/GaN power devices of vertical structure, as illustrated in fig. 1 and 2, including from bottom to top successively
Drain electrode 1, the n of setting+GaN layer 2 and n-GaN U-channels 3 are equipped with a upper surface and n- in n-GaN U-channels 3
3 upper surface flush of GaN U-channels, and depth is less than the AlGaN u shapes groove 4 of 3 depth of n-GaN U-channels, and AlGaN u
Table is equipped with layer of sin in shape groove 4xU shapes grid 5；In SiNxFilled with a upper surface and n-GaN U-channels 3 in u shapes grid 5
The p-GaN 6 of upper surface flush；It is equipped with covering p-GaN 6, SiN at the middle part of 6 upper surfaces p-GaNxU shapes grid 5 and part
The dielectric passivation layer 8 of AlGaN u shapes groove 4, the upper surface of dielectric passivation layer 8 are additionally provided with overwrite media passivation layer 8 and n-GaN
The source electrode 9 of U-channel 3, and the gate electrode 7 being connected with p-GaN 6 is arranged in the both sides of source electrode 9.
In the present embodiment, source electrode 9 is being parallel to SiNxArea coverage is slightly less than dielectric passivation on the direction of u shapes grid 5
Layer 8；The thickness of drain electrode 1 is 20nm~500nm, n+The thickness of GaN layer 2 is 500nm~3 μm, n-GaN U-channels 3
Depth is 2 μm~5 μm, and the width between the notch of n-GaN U-channels 3 is 2 μm~3 μm, the depth of AlGaN u shapes groove 4
It it is 1.5 μm~4 μm, the width between the notch of AlGaN u shapes groove 4 is 1 μm~2 μm, SiNxThe thickness of u shapes grid 5 is 10nm
The thickness of~50nm, dielectric passivation layer 8 are 50nm~500nm, and the length of source electrode 9 is 100nm~500nm, and thickness is
The length of side of 20nm~500nm, gate electrode 7 are 500nm~2 μm.
The present embodiment have vertical structure AlGaN/GaN power devices through the following steps that, be prepared：
(1) as shown in figure 3, in Sapphire Substrate 10, using Si as dopant, doping concentration is 1 × 1018cm-3~5 ×
1019cm-3, grow the n that a layer thickness is 500nm~3 μm+GaN layer 2；
(2) as shown in figure 4, in n+In GaN layer 2, using Si as dopant, doping concentration is 1 × 1017cm-3~5 ×
1018cm-3, grow the n-GaN layers that a layer thickness is 2 μm~5 μm；
(3) as shown in figure 5, longitudinal on n-GaN layers etch, it is etched to n+At GaN layer and n-GaN layers of interface, finally
It is 2 μm~5 μm to form a depth, and width is the n-GaN U-channels 3 of 2 μm~3 μm u between notch；
(4) as shown in fig. 6, growing AlGaN in the n-GaN U-channels 3 etched, until filling and leading up n-GaN U-shaped ditches
Slot 3；
(5) as shown in fig. 7, longitudinal again on AlGaN etch, it is 1.5 μm~4 μm to etch depth, wide between notch
The AlGaN u shapes groove 4 that degree is 1 μm~2 μm；
(6) as shown in figure 8, growing high quality SiN in AlGaN u shapes groove 4xThin layer forms thickness as gate medium
For the SiN of 10nm~50nmxU shapes grid 5；
(7) as shown in figure 9, in SiNxP-GaN 6 is grown in u shapes grid 5, until filling up u shape grooves, dopant Mg mixes
Miscellaneous a concentration of 5 × 1016cm-3~5 × 1018cm-3；
(8) as shown in Figure 10, in the matter passivation layer that device surface homoepitaxial a layer thickness is Jie 50nm~500nm；
(9) as shown in figure 11, constituency etching is carried out to dielectric passivation layer, Al-GaN layers and n- of exposing is etched in transverse direction
GaN layer interface, centre is etched on longitudinal direction leaves sufficient length and make source electrode；
(10) as shown in figure 12, the gold that a layer thickness is 20nm~500nm is deposited in the way of vapor deposition etc. in device surface
Belong to, as shown in figure 13, longitudinal etching is carried out to the first layer metal of deposition, until middle section exposed portion dielectric passivation layer,
Expose the strip source electrode for being developed across that the length of AlGaN u shapes groove 4 is 100nm~500nm, and AlGaN u shapes groove 4
Respectively one length of side of exposing is the reguline metal of 500nm~2 μm as gate electrode 7 at both ends；
(11) as shown in figure 14, it is gone out by the way of laser lift-off the sapphire of bottom, as shown in figure 15, and is being exposed
N+It is the metal of 20nm~500nm as drain electrode 1 that 2 lower surface of GaN layer, which uses the modes such as vapor deposition to deposit a layer thickness,.
In the present embodiment, the metal in step (10) and step (11) selects a certain kind or more in Ti/Al/Ni/Au
The alloy or metallic multilayer composite construction of kind metal.
The present embodiment has the AlGaN/GaN power devices and preparation method thereof of vertical structure, is arranged by vertical direction
N-GaN and the interfaces AlGaN so that two-dimensional electron gas can move in the vertical direction and be formed raceway groove, enhance two-dimensional electron gas
Rate travel；The control ability to two-dimensional electron gas is improved by the grid of u shape groove structures simultaneously；And in u shape trench gates
The p-GaN of filling can make HEMT end in the case of non-grid positive bias, form the wider enhanced HEMT of application range；
In addition, the cladding by being spatially separated gate electrode and other region passivation layers that simultaneously both ends are drawn, it can be to avoid other
Grid caused by technological process pollutes the problem for causing cut-in voltage unstable.
The basic principles and main features and advantages of the present invention of the present invention have been shown and described above.The skill of the industry
Art personnel it should be appreciated that the present invention is not limited to the above embodiments, the above embodiments and description only describe
The principle of the present invention, without departing from the spirit and scope of the present invention, various changes and improvements may be made to the invention, these
Changes and improvements all fall within the protetion scope of the claimed invention.The claimed scope of the invention by appended claims and
Its equivalent thereof.
Claims (5)
1. a kind of AlGaN/GaN power devices with vertical structure, it is characterised in that：Including the leakage from bottom to top set gradually
Pole electrode, n+GaN layer and n-GaN U-channels are equipped with a upper surface and n-GaN U-shaped ditches in the n-GaN U-channels
Slot upper surface flush, and depth is less than the AlGaN u shape grooves of n-GaN U-channel depth, and in the AlGaN u shape grooves
Table is equipped with layer of sinxU shape grid；In the SiNxIt is neat filled with a upper surface and n-GaN U-channels upper surface in u shapes grid
Flat p-GaN；It is equipped with covering p-GaN, SiN at the middle part of the upper surfaces p-GaNxU shapes grid and part AlGaN u shape ditches
The dielectric passivation layer of slot, the upper surface of the dielectric passivation layer are additionally provided with overwrite media passivation layer and n-GaN U-channels
Source electrode, and the gate electrode being connected with p-GaN is arranged in the both sides of source electrode.
2. the AlGaN/GaN power devices described in claim 1 with vertical structure, it is characterised in that：The source electrode
It is being parallel to SiNxArea coverage is slightly less than dielectric passivation layer on the direction of u shape grid.
3. the AlGaN/GaN power devices described in claim 1 with vertical structure, it is characterised in that：The drain electrode
Thickness be 20nm~500nm, the n+The thickness of GaN layer is 500nm~3 μm, and the depth of the n-GaN U-channels is 2
μm~5 μm, the width between the notch of n-GaN U-channels is 2 μm~3 μm, and the depth of the AlGaN u shape grooves is 1.5 μ
M~4 μm, the width between the notch of AlGaN u shape grooves are 1 μm~2 μm, the SiNxThe thickness of u shape grid be 10nm~
The thickness of 50nm, the dielectric passivation layer are 50nm~500nm, and the length of the source electrode is 100nm~500nm, thickness
The length of side for 20nm~500nm, the gate electrode is 500nm~2 μm.
4. the preparation method of the AlGaN/GaN power devices with vertical structure described in a kind of claim 1, it is characterised in that：
The preparation method includes the following steps：
(1) on a sapphire substrate, using Si as dopant, doping concentration is 1 × 1018cm-3~5 × 1019cm-3, grow n+-
GaN layer；
(2) in n+In GaN layer, using Si as dopant, doping concentration is 1 × 1017cm-3~5 × 1018cm-3, grow n-GaN
Layer；
(3) longitudinal etching on n-GaN layers, is etched to n+GaN layer ultimately forms a n-GaN U at n-GaN layers of interface
Shape groove；
(4) AlGaN is grown in the n-GaN U-channels etched, until filling and leading up n-GaN U-channels；
(5) longitudinal etching, etching depth width are all slightly less than GaN grooves again on AlGaN, form AlGaN u shape grooves；
(6) high quality SiN is grown in AlGaN u shape groovesxThin layer forms SiN as gate mediumxU shape grid；
(7) in SiNxP-GaN is grown in u shape grid, until filling up u shape grooves, dopant Mg, doping concentration is 5 × 1016cm-3
~5 × 1018cm-3；
(8) in one layer of dielectric passivation layer of device surface homoepitaxial；
(9) constituency etching is carried out to dielectric passivation layer, Al-GaN layers of exposing and n-GaN layers of interface is etched in transverse direction, it is longitudinal
On be etched to centre leave sufficient length make source electrode；
(10) one layer of metal is deposited in the way of vapor deposition etc. in device surface, longitudinal etching is carried out to the first layer metal of deposition,
Until middle section exposed portion dielectric passivation layer, exposes the strip source electrode for being developed across AlGaN u shape grooves, and
Respectively expose a reguline metal as gate electrode in AlGaN u shape grooves both ends；
(11) it is gone out by the way of laser lift-off the sapphire of bottom, and in the n of exposing+GaN layer lower surface is using vapor deposition etc.
Mode deposits one layer of metal as drain electrode.
5. the preparation method of the AlGaN/GaN power devices according to claim 4 with vertical structure, feature exist
In：Metal in the step (10) and step (11) selects the alloy of a certain kind or various metals in Ti/Al/Ni/Au
Or metallic multilayer composite construction.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810133689.3A CN108511513B (en) | 2018-02-09 | 2018-02-09 | AlGaN/GaN power device with vertical structure and preparation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810133689.3A CN108511513B (en) | 2018-02-09 | 2018-02-09 | AlGaN/GaN power device with vertical structure and preparation method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN108511513A true CN108511513A (en) | 2018-09-07 |
| CN108511513B CN108511513B (en) | 2019-12-10 |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| WO2020207098A1 (en) * | 2019-04-12 | 2020-10-15 | 广东致能科技有限公司 | Semiconductor device and fabrication method therefor |
| US11552189B2 (en) | 2019-09-25 | 2023-01-10 | Stmicroelectronics S.R.L. | High electron mobility transistor (HEMT) devices and methods |
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| WO2011114535A1 (en) * | 2010-03-19 | 2011-09-22 | 富士通株式会社 | Compound semiconductor device and manufacturing method for same |
| CN105393359A (en) * | 2013-07-15 | 2016-03-09 | Hrl实验室有限责任公司 | HEMT device and method |
| CN106057868A (en) * | 2016-08-09 | 2016-10-26 | 电子科技大学 | Longitudinal super-junction enhanced MIS HEMT device |
| CN106549038A (en) * | 2016-12-09 | 2017-03-29 | 宁波海特创电控有限公司 | A kind of gallium nitride heterojunction HEMT of vertical stratification |
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| WO2011114535A1 (en) * | 2010-03-19 | 2011-09-22 | 富士通株式会社 | Compound semiconductor device and manufacturing method for same |
| CN105393359A (en) * | 2013-07-15 | 2016-03-09 | Hrl实验室有限责任公司 | HEMT device and method |
| CN106057868A (en) * | 2016-08-09 | 2016-10-26 | 电子科技大学 | Longitudinal super-junction enhanced MIS HEMT device |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| WO2020207098A1 (en) * | 2019-04-12 | 2020-10-15 | 广东致能科技有限公司 | Semiconductor device and fabrication method therefor |
| US11552189B2 (en) | 2019-09-25 | 2023-01-10 | Stmicroelectronics S.R.L. | High electron mobility transistor (HEMT) devices and methods |
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