CN105552047A - AlGaN/GaN HEMT transistor and making method thereof - Google Patents
AlGaN/GaN HEMT transistor and making method thereof Download PDFInfo
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- 238000000034 method Methods 0.000 title claims abstract description 33
- 229910002704 AlGaN Inorganic materials 0.000 title claims abstract 19
- 239000000758 substrate Substances 0.000 claims abstract description 74
- 239000000463 material Substances 0.000 claims abstract description 35
- 238000005036 potential barrier Methods 0.000 claims description 38
- 239000011248 coating agent Substances 0.000 claims description 24
- 238000000576 coating method Methods 0.000 claims description 24
- 229910003460 diamond Inorganic materials 0.000 claims description 10
- 239000010432 diamond Substances 0.000 claims description 10
- 238000009413 insulation Methods 0.000 claims description 10
- 238000004519 manufacturing process Methods 0.000 claims description 9
- 239000011810 insulating material Substances 0.000 claims description 2
- 230000005855 radiation Effects 0.000 abstract description 18
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 40
- 229910002601 GaN Inorganic materials 0.000 description 38
- 239000010931 gold Substances 0.000 description 11
- 229910052751 metal Inorganic materials 0.000 description 6
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- 229910052737 gold Inorganic materials 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 238000009616 inductively coupled plasma Methods 0.000 description 4
- 238000001020 plasma etching Methods 0.000 description 4
- 238000012546 transfer Methods 0.000 description 4
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 239000012141 concentrate Substances 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 238000011161 development Methods 0.000 description 2
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- 238000005516 engineering process Methods 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 229910052594 sapphire Inorganic materials 0.000 description 2
- 239000010980 sapphire Substances 0.000 description 2
- ORILYTVJVMAKLC-UHFFFAOYSA-N adamantane Chemical compound C1C(C2)CC3CC1CC2C3 ORILYTVJVMAKLC-UHFFFAOYSA-N 0.000 description 1
- 229910001573 adamantine Inorganic materials 0.000 description 1
- RNQKDQAVIXDKAG-UHFFFAOYSA-N aluminum gallium Chemical compound [Al].[Ga] RNQKDQAVIXDKAG-UHFFFAOYSA-N 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
- H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
- H01L29/7787—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT with wide bandgap charge-carrier supplying layer, e.g. direct single heterostructure MODFET
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
- H01L23/3675—Cooling facilitated by shape of device characterised by the shape of the housing
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
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- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3736—Metallic materials
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
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- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
- H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
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Abstract
The invention provides an AlGaN/GaN HEMT transistor and a making method thereof. A source electrode and a drain electrode of the device are directly connected with a SiC substrate adopted by the device through a high-thermal conductivity material. Heat generated by a gate electrode of the device is radiated to the SiC substrate through the high-thermal conductivity material connected with the source electrode and the drain electrode. The AlGaN/GaN HEMT device also comprises a high-thermal conductivity material to connect the gate electrode of the device and the SiC substrate, the heat generated by the gate electrode of the device is radiated to the SiC substrate through the high-thermal conductivity material connected with the gate electrode, and the heat radiation ability of the device is further enhanced.
Description
Technical field
The present invention proposes a kind of AlGaN/GaNHEMT transistor and manufacture method thereof, belongs to High Electron Mobility Transistor field.
Background technology
Aluminum gallium nitride compound (AlGaN)/gallium nitride (GaN) High Electron Mobility Transistor (HEMT) has larger power output, wider bandwidth of operation and the more advantage such as high workload efficiency and stronger capability of resistance to radiation as third generation wide bandgap compound semiconductor device, makes it have a extensive future.The power output that AlGaN/GaNHEMT microwave power device is large has benefited from its high power density, existing report GaN microwave power device output power density can reach more than 30W/mm (Wuetal.IEEEElectronDeviceLett., Vol.25, No.3, pp.117-119,2004.), but the AlGaN/GaNHEMT Microwave Power Tubes of present stage release and the output power density of power MMIC product generally only have 35W/mm, very far away with the maximum power output density difference of report.Heat when causing a lower maximum reason of AlGaN/GaNHEMT microwave power device output of products power density to be devices function in raceway groove cannot effectively be dispersed, and makes the junction temperature after further boost device power density that far super device can be carried out the maximum junction temperature of reliably working.Therefore be necessary the heat-sinking capability of enhance device, heat during AlGaN/GaNHEMT devices function is effectively dispersed, to reduce junction temperature during work, give full play to the powerful advantage of AlGaN/GaNHEMT device.
Want the heat-sinking capability of REINFORCED Al GaN/GaNHEMT device, first need to understand the bottleneck affecting device heat radiation.Be the general structure of the AlGaN/GaNHEMT device using SiC as substrate and the schematic diagram of this device heat transfer process shown in Fig. 1, the heat produced in raceway groove will by GaN resilient coating, nucleating layer and SiC substrate finally fall apart to device heat sink on, wherein the thermal conductivity of SiC substrate can reach 400W/mK, and GaN resilient coating and nucleating layer due to defect concentration higher, thermal conductivity, far below the thermal conductivity of SiC substrate, becomes the bottleneck that in restriction GaN device raceway groove, heat heat sink is dispersed.
For REINFORCED Al GaN/GaNHEMT device heat-sinking capability, a kind of method is that crystal mass by promoting GaN resilient coating and nucleating layer is to improve its thermal conductivity, but the theoretic thermal conductivity of GaN material is the highest also only has 150W/mK, even if when its epitaxial material crystal mass reaches perfect condition be still the bottleneck of device heat radiation.In order to GaN resilient coating and this heat radiation bottleneck of nucleating layer, another kind method is in the better diamond substrate of heat conduction by GaN epitaxy material transfer, as shown in Figure 2, remove nucleating layer, GaN resilient coating only retains very thin one deck, the impact of epitaxial loayer on heat radiation is dropped to minimum, simultaneously owing to introducing the better diamond substrate material of heat conductivility, estimate that overall device heat dispersion is by lifting more than 3 times (F.Failietal.DevelopmentofIII-NitrideHEMTsonCVDDiamondSub strates, CSMANTECHConference, 2011.).The difficult point of the method is GaN epitaxial layer to be thinned to degree thin as far as possible but obvious degeneration does not occur epitaxial loayer performance, and the GaN epitaxial layer after thinning is bonded in diamond substrate, bonding material used wants compatible follow-up device technology on the one hand, can't additionally introduce larger thermal resistance simultaneously.Based on the method, successfully achieve development (the M.Tyhachetal.ComparisonofGaNonDiamondwithGaNonSiCHEMTand MMICPerformance of diamond substrate GaNHEMT sample at present, CSMANTECHConference, 2012.), but the device performance of development still needs to be further improved, therefore estimate to also have many critical processes to need to be broken through further.
Due to the heat that produces in GaN device raceway groove will by GaN resilient coating, nucleating layer and SiC substrate finally fall apart to device heat sink on, wherein GaN resilient coating, nucleating layer are all Main Bottlenecks to vertical and horizontal heat radiation, and below raceway groove, start with that to improve device heat-sinking capability technical difficulty larger, changing a kind of thinking is start with improving the heat-sinking capability of device above raceway groove, and technically more easy.The research that improves device heat-sinking capability of starting with above raceway groove mainly concentrates at present and improves device heatsink transverse ability, as shown in Figure 3, common way is on device source drain electrode, cover the material with high heat conductance, laterally led away by the heat of device channel region, it is more simple that technical the method improves device heat-sinking capability compared with starting with below raceway groove.Above device channel, the key point that heat is laterally led away is to select the material with high heat conductance, theory analysis shows to adopt and has thermal conductivity and device thermal resistance can be made to decline 20 about percent (ZhongYanetal.Graphenequiltsforthermalmanagementofhigh-po werGaNtransistors.Nat.Commun.3:827doi:10.1038/ncomms1828 up to the grapheme material of 2000W/mK, 2012.), this heat radiation improves that comparing starts with below raceway groove and improve the effect that device heat-sinking capability reaches more than 3 times certain gap, therefore need to be improved further.The approach longitudinally improving heat radiation above GaN device raceway groove mainly adopts flip chip technology, for AlGaN/GaNHEMT high power device, in order to realize good radiating effect, the quality of upside-down mounting, alignment precision will be all a major challenge, and its difficulty improves the heat-sinking capability of device not second to starting with above raceway groove.
Method shown in Fig. 3 is mainly used in improving device heatsink transverse ability, the shortcoming of this method be also need after the heat in GaN device raceway groove is laterally scattered longitudinally by GaN resilient coating, nucleating layer and SiC substrate finally fall apart to device heat sink on, and GaN resilient coating and the nucleating layer capacity of heat transmission very poor, horizontal conductive force will be made to have a greatly reduced quality.The heat-sinking capability that method in addition shown in Fig. 3 improves AlGaN/GaNHEMT transverse direction realizes by the material of high heat conductance and AlGaN/GaNHEMT device source electrode being connected with drain electrode, and device heating district mainly concentrates under the gate electrode, distance sources electrode or drain electrode are usually more than 1 μm, this distance is suitable with the thickness of GaN resilient coating and nucleating layer etc., and in improvement heat radiation, effect is made a discount again further.Can consider is connected the material of high heat conductance with AlGaN/GaNHEMT device gate electrode improves the heat radiation of device further, because be the heat generation region of device under gate electrode, such method contributes to the heat-sinking capability improving device more.
Summary of the invention
Goal of the invention: the present invention proposes a kind of AlGaN/GaNHEMT transistor and manufacture method thereof, enhances the heat-sinking capability of device.
Technical scheme: the present invention proposes a kind of AlGaN/GaNHEMT transistor, comprise the device body be positioned on substrate, described device body at least comprises source electrode, drain electrode, grid, GaN resilient coating and AlGaN potential barrier, and at least the part surface of device body is covered by Heat Conduction Material.
Preferably, described device body is platform shape structure.Described shape structure is truncated cone-shaped or square platform shape.Described shape texture edge and substrate are 60 to 75 spend angle.The surface of described device body is covered completely by Heat Conduction Material, but covers the Heat Conduction Material of insulation between described source electrode, drain and gate.The surface of described device body is covered completely by diamond.
A kind of AlGaN/GaNHEMT transistor fabrication process, comprises the following steps:
1) on substrate, form device body, described device body comprises nucleating layer, GaN resilient coating and AlGaN potential barrier;
2) device body is made into platform shape structure;
3) in AlGaN potential barrier and platform shape texture edge form source electrode and drain electrode, the AlGaN potential barrier upper surface between source electrode and drain electrode makes grid;
4) on source electrode, drain electrode, grid, AlGaN potential barrier upper surface and substrate, dielectric layer is formed;
5) dielectric layer on source electrode, drain electrode and substrate is removed;
6) substrate top surface in source electrode side and this side stage shape texture edge electroplate the first heat-conducting layer, and substrate top surface and this side stage shape texture edge of drain electrode side electroplate the second heat-conducting layer;
7) dielectric layer on grid is removed, in the first heat-conducting layer, the second heat-conducting layer, grid and step 5) remaining dielectric layer forms the 3rd heat-conducting layer, and the 3rd heat-conducting layer is insulating material.
A kind of AlGaN/GaNHEMT transistor fabrication process, comprises the following steps:
1) on substrate, form device body, described device body comprises nucleating layer, GaN resilient coating and AlGaN potential barrier;
2) device body is made into platform shape structure;
3) in AlGaN potential barrier and platform shape texture edge form source electrode and drain electrode;
4) on source electrode, drain electrode, AlGaN potential barrier upper surface and substrate, dielectric layer is formed;
5) dielectric layer on source electrode, drain electrode and substrate is removed;
6) thermal insulation layer is formed on the surface of platform shape structure and substrate;
7) in platform shape structural top heat-conducting layer and dielectric layer perforate, and grid is formed in hole.
Beneficial effect: the AlGaN/GaNHEMT device source electrode in the present invention and drain electrode by the material of a high heat conductance directly realize with device adopt the connection of SiC substrate, the heat produced under device gate electrode through and the high thermal conductivity material that source electrode is connected with drain electrode realize to SiC substrate heat radiation; Device gate electrode is connected with SiC substrate by the material that the AlGaN/GaNHEMT device in the present invention also exists a high heat conductance, the heat produced under device gate electrode realizes the heat radiation to SiC substrate through the high thermal conductivity material be connected with gate electrode, the heat-sinking capability of further enhance device.
Accompanying drawing explanation
Fig. 1 is structure and the heat transfer process schematic diagram of the AlGaN/GaNHEMT device of existing SiC substrate;
Fig. 2 is structure and the heat transfer process schematic diagram of existing diamond substrate AlGaN/GaNHEMT device;
Fig. 3 is the existing method schematic diagram improving device heatsink transverse ability;
Fig. 4 is existing AlGaN/GaNHEMT structural representation;
Fig. 5 is AlGaN/GaNHEMT structural representation in embodiment 1;
Fig. 6 is the structural representation of substrate in embodiment, nucleating layer, GaN resilient coating and AlGaN potential barrier;
Fig. 7 is the device body platform shape structural representation in embodiment on substrate;
Fig. 8 is the structural representation in embodiment 1 above AlGaN potential barrier after deposit source electrode, grid and drain electrode;
Fig. 9 is the structural representation in embodiment 1 after device dielectric layer deposited;
Figure 10 is the structural representation in embodiment 1 after device deposit first heat-conducting layer and the second heat-conducting layer;
Figure 11 be in embodiment 2 above AlGaN potential barrier deposit source electrode and drain electrode after structural representation;
Figure 12 is the structural representation in embodiment 2 after device dielectric layer deposited;
Figure 13 is the structural representation after etching unnecessary dielectric layer in embodiment 2;
Figure 14 is the structural representation in embodiment 2 after deposit grid.
Embodiment
Below in conjunction with the drawings and specific embodiments, illustrate the present invention further, these embodiments should be understood only be not used in for illustration of the present invention and limit the scope of the invention, after having read the present invention, the amendment of those skilled in the art to various equivalents of the present invention has all fallen within the application's claims limited range.
In specification of the present invention, claims and Figure of description, alleged D score is the direction near substrate, alleged " on " be direction away from substrate.
Embodiment 1: as shown in Figure 4, classical AlGaN/GaNHEMT structure is similar to field effect transistor with operation principle, is provided with substrate, AlN resilient coating, GaN layer and AlGaN layer from bottom to top.Electric current is all flow to drain electrode from source electrode under the control of grid voltage.Discontinuity in the interface of GaN and AlGaN due to conduction band, can form triangular quantum well, thus assembles a lot of electronics in GaN side, forms two-dimensional electron gas (2DEG), thus forms the conducting channel of AlGaN/GaNHEMT.Wherein source electrode and drain electrode are generally ohmic contact, and grid is Schottky contacts.
As shown in Figure 5, the present embodiment transistor device comprises substrate 51, nucleating layer 52, GaN resilient coating 53 and AlGaN potential barrier 54 from the bottom to top successively.On substrate 51, nucleating layer 52, GaN resilient coating 53 and AlGaN potential barrier 54 form device body, and device body is platform shape structure.Nucleating layer 52 is positioned at the orlop of platform shape structure, and its width is maximum.AlGaN potential barrier 54 is positioned at the superiors, and its width is minimum.Fig. 5 gives the sectional view in source electrode 55 and drain electrode 56 cross sections, place, and described shape structure can be the platform shape such as truncated cone-shaped or square platform shape.Source electrode 55 and drain electrode 56 cover the part at platform shape structural top edge, also extend downward substrate 51 along the side of platform shape structure simultaneously, cover a part of side of platform shape structure.The grid 57 and dielectric layer 58, grid 57 and the dielectric layer 58 that are positioned at same level has also been made in platform shape structural top.Described dielectric layer 58 forms for silicon nitride or silicon oxide deposition.
Source electrode 55 and drain electrode 56 adopt multiple layer metal system, comprise Ti/Al/Ni/Au, Ti/Al/Mo/Au etc.Wherein Ni and the AlGaN potential barrier under it 54 form Schottky contacts, and Au major amount reduces grid resistance, and the frequency characteristic of boost device, the metals such as Pt, Ti exist as specific assistant metal.
In order to dispel the heat from all directions, the present invention the whole side of substrate 51 upper surface, platform shape structure and above all deposited heat-conducting layer.Wherein the side of platform shape structure is the first heat-conducting layer 59, and opposite side is the second heat-conducting layer 60, and top device is the 3rd heat-conducting layer 61.First heat-conducting layer 59 can use identical Heat Conduction Material with the second heat-conducting layer 60, also can use different Heat Conduction Materials, and the Heat Conduction Material selected by concrete the present embodiment is all gold.The Material selec-tion of the 3rd heat-conducting layer 61 is then different, and in order to prevent grid 57 and source electrode 55, draining between 56 is short-circuited, and the 3rd heat-conducting layer 61 should select nonconducting Heat Conduction Material, such as diamond.From the angle of heat conduction, the platform shape texture edge of inclination, relative to the vertical side (as Fig. 4) of existing device, the contact area of itself and the first heat-conducting layer 59 and the second heat-conducting layer 60 is larger, is more conducive to heat radiation.
The present embodiment also proposes a kind of heat radiation REINFORCED Al GaN/GaNHEMT transistor fabrication process.As shown in Figure 6, first substrate 51 forms device body.Described substrate 51 is the one in Sapphire Substrate, GaAs substrate, SiC substrate or GaN substrate.
Described device body comprises nucleating layer 52, GaN resilient coating 53 and AlGaN potential barrier 54 from bottom to top.Particularly, be about 30nm nucleating layer 52 at 520 degrees Celsius of lower growth thickness, then the GaN resilient coating 53 of high growth temperature 1um, then keep 520 degrees Celsius of continued growth AlGaN potential barrier 54.
As shown in Figure 7, adopt reactive ion etching (RIE) or inductively coupled plasma etching (ICP) that the device body on substrate 51 is etched into platform shape structure.Nucleating layer 52 is positioned at the orlop of platform shape structure, and its width is maximum.AlGaN potential barrier 54 is positioned at the superiors, and its width is minimum.Described shape structure is the platform shape such as truncated cone-shaped or square platform shape, the inclination angle certain for substrate 51 one-tenth, side of platform shape structure, and this inclination angle span is between 60 to 75 degree.Such nucleating layer 52 is the widest, and AlGaN potential barrier 54 is the narrowest.
As shown in Figure 8, deposit source electrode 55 and drain electrode 56 above AlGaN potential barrier 54, spacing 2 to 5 microns between the two.Source electrode 55 and drain electrode 56 cover the part at platform shape structural top edge, also extend downward substrate 51 along the side of platform shape structure simultaneously, cover a part of side of platform shape structure.Between source electrode 55 and drain electrode 56, deposit forms grid 57.Grid 57, source electrode 55 and drain electrode 56 adopt multiple layer metal system, such as Ti/Al/Ni/Au, Ti/Al/Mo/Au etc.In order to reduce contact resistance, grid 57, source electrode 55 and drain electrode 56, through 800 to 850 celsius temperatures annealing, form ohmic contact with the side of platform shape structure and upper surface.
As shown in Figure 9, at device surface deposit one deck dielectric layer 58, this dielectric layer 58 covers source electrode 55, drain electrode 56, grid 57, AlGaN potential barrier 54 upper surface and substrate 51 simultaneously.The method of deposit can be the one in sputtering, electron beam evaporation, PECVD, and the material of dielectric layer 58 is silicon nitride or silica.
Then the dielectric layer that dry etching is removed source electrode 55, drained on 56 and substrate 51 is adopted.So only at source electrode 55, AlGaN potential barrier 54 upper surface between grid 57 and drain electrode 56, and grid 57 upper surface remains with dielectric layer.
Then substrate 51 upper surface in source electrode 55 side and this side stage shape texture edge electroplate the first heat-conducting layer 59, and substrate 51 upper surface and this side stage shape texture edge of 56 sides that drain electroplate the second heat-conducting layer 60, as shown in Figure 10.From the angle of heat conduction, the platform shape texture edge of inclination, relative to the vertical side (as Fig. 4) of existing device, the contact area of itself and the first heat-conducting layer 59 and the second heat-conducting layer 60 is larger, is more conducive to heat radiation.First heat-conducting layer 59 can use identical Heat Conduction Material with the second heat-conducting layer 60, also can use different Heat Conduction Materials, and the Heat Conduction Material selected by concrete the present embodiment is all gold.In order to obtain good heat conductivility, the thickness of gold is 3-5 micron.
As shown in Figure 5, dry etching is adopted to remove the dielectric layer of grid 57 upper surface.And then at the first heat-conducting layer 59, second heat-conducting layer 60, grid 57 and remaining dielectric layer 58 upper surface deposit the 3rd heat-conducting layer 61.The Material selec-tion of the 3rd heat-conducting layer 61 is then different, and in order to prevent grid 57 and source electrode 55, draining between 56 is short-circuited, and the 3rd heat-conducting layer should select nonconducting Heat Conduction Material, and the present embodiment selects diamond.Adamantine deposit adopts chemical vapour deposition technique (CVD) technique.
Embodiment 2: the present embodiment proposes another kind of heat radiation REINFORCED Al GaN/GaNHEMT transistor fabrication process.As shown in Figure 6, first substrate 51 forms device body.Described substrate 51 is the one in Sapphire Substrate, GaAs substrate, SiC substrate or GaN substrate.
Described device body comprises nucleating layer 52, GaN resilient coating 53 and AlGaN potential barrier 54 from bottom to top.Particularly, be about 30nm nucleating layer 52 at 520 degrees Celsius of lower growth thickness, then the GaN resilient coating 53 of high growth temperature 1um, then keep 520 degrees Celsius of continued growth AlGaN potential barrier 54.
As shown in Figure 7, adopt reactive ion etching (RIE) or inductively coupled plasma etching (ICP) that the device body on substrate 51 is etched into platform shape structure.Nucleating layer 52 is positioned at the orlop of platform shape structure, and its width is maximum.AlGaN potential barrier 54 is positioned at the superiors, and its width is minimum.Described shape structure is the platform shape such as truncated cone-shaped or square platform shape, the inclination angle certain for substrate 51 one-tenth, side of platform shape structure, and this inclination angle span is between 60 to 75 degree.Such nucleating layer 52 is the widest, and AlGaN potential barrier 54 is the narrowest.
As shown in figure 11, deposit source electrode 55 and drain electrode 56 above AlGaN potential barrier 54, spacing 2 to 5 microns between the two.Source electrode 55 and drain electrode 56 cover the part at platform shape structural top edge, also extend downward substrate 51 along the side of platform shape structure simultaneously, cover a part of side of platform shape structure.
Then in the upper surface dielectric layer deposited 58 of source electrode 55, drain electrode 56, AlGaN potential barrier 54 and substrate 51, this is equivalent to the surface that dielectric layer 58 covers whole device, and dielectric layer 62 can adopt pecvd process deposit silicon nitride to be formed, as shown in figure 12.
Adopt the dielectric layer 58 that dry etch process is removed source electrode 55, drained on 56 and substrate 51 as shown in figure 13 subsequently, remaining dielectric layer 58 exists only in the AlGaN potential barrier 54 between source electrode 55 and drain electrode 56.Then adopt CVD technique deposit thermal insulation layer 63 at whole device surface, thermal insulation layer 63 is covered in dielectric layer 58, source electrode 55, drain electrode 56, the whole side of platform shape structure and substrate 51 upper surface.Therefore thermal insulation layer 63 can be that device dispels the heat from all directions.From the angle of heat conduction, the platform shape texture edge of inclination, relative to the vertical side (as Fig. 4) of existing device, the contact area of itself and thermal insulation layer 63 is larger, is more conducive to heat radiation.In the present embodiment, thermal insulation layer 63 have selected nonconducting diamond, is short-circuited between the grid 64 made to prevent source electrode 55, drain electrode 56 and subsequent technique.
As shown in figure 14, by photoetching process dielectric layer 58 and above thermal insulation layer 63 open a window, then the deposit of window place formed grid 64.Grid 64 adopts the mode of evaporation to carry out deposit, and adoptable metal includes but not limited to the multiple layer metal such as Ni/Au/Ti or Ni/Pt/Au/Pt/Ti or Ni/Pt/Au/Ni system, and wherein Ni and the AlGaN potential barrier below it 54 form Schottky contacts.
Claims (8)
1. an AlGaN/GaNHEMT transistor, comprise the device body be positioned on substrate, described device body at least comprises source electrode, drain electrode, grid, GaN resilient coating and AlGaN potential barrier, it is characterized in that, at least the part surface of device body is covered by Heat Conduction Material.
2. AlGaN/GaNHEMT transistor according to claim 1, is characterized in that, described device body is platform shape structure.
3. AlGaN/GaNHEMT transistor according to claim 2, is characterized in that, described shape structure is truncated cone-shaped or square platform shape.
4. AlGaN/GaNHEMT transistor according to claim 2, is characterized in that, described shape texture edge and substrate are 60 to 75 spend angle.
5. AlGaN/GaNHEMT transistor according to claim 1 and 2, is characterized in that, the surface of described device body is covered completely by Heat Conduction Material, but covers the Heat Conduction Material of insulation between described source electrode, drain and gate.
6. AlGaN/GaNHEMT transistor according to claim 1, is characterized in that, the surface of described device body is covered completely by diamond.
7. an AlGaN/GaNHEMT transistor fabrication process, is characterized in that, comprises the following steps:
1) on substrate, form device body, described device body comprises nucleating layer, GaN resilient coating and AlGaN potential barrier;
2) device body is made into platform shape structure;
3) in AlGaN potential barrier and platform shape texture edge form source electrode and drain electrode, the AlGaN potential barrier upper surface between source electrode and drain electrode makes grid;
4) on source electrode, drain electrode, grid, AlGaN potential barrier upper surface and substrate, dielectric layer is formed;
5) dielectric layer on source electrode, drain electrode and substrate is removed;
6) substrate top surface in source electrode side and this side stage shape texture edge electroplate the first heat-conducting layer, and substrate top surface and this side stage shape texture edge of drain electrode side electroplate the second heat-conducting layer;
7) dielectric layer on grid is removed, in the first heat-conducting layer, the second heat-conducting layer, grid and step 5) remaining dielectric layer forms the 3rd heat-conducting layer, and the 3rd heat-conducting layer is insulating material.
8. an AlGaN/GaNHEMT transistor fabrication process, is characterized in that, comprises the following steps:
1) on substrate, form device body, described device body comprises nucleating layer, GaN resilient coating and AlGaN potential barrier;
2) device body is made into platform shape structure;
3) in AlGaN potential barrier and platform shape texture edge form source electrode and drain electrode;
4) on source electrode, drain electrode, AlGaN potential barrier upper surface and substrate, dielectric layer is formed;
5) dielectric layer on source electrode, drain electrode and substrate is removed;
6) thermal insulation layer is formed on the surface of platform shape structure and substrate;
7) in platform shape structural top heat-conducting layer and dielectric layer perforate, and grid is formed in hole.
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