CN108508952B - Band gap reference voltage second-order compensation circuit - Google Patents
Band gap reference voltage second-order compensation circuit Download PDFInfo
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- CN108508952B CN108508952B CN201810433620.2A CN201810433620A CN108508952B CN 108508952 B CN108508952 B CN 108508952B CN 201810433620 A CN201810433620 A CN 201810433620A CN 108508952 B CN108508952 B CN 108508952B
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- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/561—Voltage to current converters
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Abstract
The invention relates to a band gap reference voltage second-order compensation circuit, which belongs to the field of integrated circuit design and comprises an operational amplifier OP1, bipolar transistors Q1-Q4 and resistors R1-R7; the positive input end of the operational amplifier OP1 is connected with the collector of the bipolar transistor Q3, the negative input end of the operational amplifier OP1 is connected with the collector of the bipolar transistor Q2, and the output end of the operational amplifier OP1 is connected with the base of the bipolar transistor Q1; the collector of the bipolar transistor Q1 is connected to the power supply VDD, and the emitter is connected to the inverting input terminal and the forward input terminal of the operational amplifier OP1 through the resistor R1 and the resistor R2, respectively; the emitter of the bipolar transistor Q1 is also connected to the base of the bipolar transistor Q4; the emitter of the bipolar transistor Q2 is grounded in series through a resistor R4 and a resistor R5, and the emitter of the bipolar transistor Q3 is grounded through a resistor R5; the emitter of bipolar transistor Q4 is connected to ground through resistor R7. The circuit of the invention has simple structure, low design complexity and low cost.
Description
Technical Field
The invention belongs to the field of integrated circuit design, and relates to a band gap reference voltage second-order compensation circuit.
Background
The voltage reference circuit is a basic module of the integrated circuit and provides reference voltage for other modules in the integrated circuit. The bandgap reference circuit is a voltage reference circuit that is most widely used because of its advantages such as high precision and high stability.
The traditional band gap reference circuit adopts a first-order compensation mode, the output voltage of the traditional band gap reference circuit can reach the temperature coefficient of 20-100 ppm/DEG C, and if the temperature coefficient is further reduced, second-order compensation is required to be considered. The principle of the existing second-order compensation circuit is to add a nonlinear correction term on the basis of the traditional band-gap reference circuit. This involves first generating a non-linear current INLAs shown in fig. 1, the current generation is complicated, requiring more devices and occupying a larger chip area. In addition, the more current branches also increase the power consumption of the circuit.
Disclosure of Invention
In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide a bandgap reference voltage second-order compensation circuit, which simplifies the circuit structure and reduces the power consumption.
In order to achieve the purpose, the invention provides the following technical scheme:
a band gap reference voltage second-order compensation circuit comprises an operational amplifier OP1, bipolar transistors Q1-Q4 and resistors R1-R7;
the positive input end of the operational amplifier OP1 is connected with the collector of the bipolar transistor Q3, the negative input end of the operational amplifier OP1 is connected with the collector of the bipolar transistor Q2, and the output end of the operational amplifier OP1 is connected with the base of the bipolar transistor Q1;
the collector of the bipolar transistor Q1 is connected to the power supply VDD, and the emitter is connected to the inverting input terminal and the forward input terminal of the operational amplifier OP1 through the resistor R1 and the resistor R2, respectively;
the emitter of the bipolar transistor Q1 is grounded through a resistor R3 and a resistor R6, the bases of the bipolar transistor Q2 and the bipolar transistor Q3 are connected with each other and then connected between a resistor R3 and a resistor R6, and the emitter of the bipolar transistor Q1 is also connected to the base of the bipolar transistor Q4;
the emitter of the bipolar transistor Q2 is grounded in series through a resistor R4 and a resistor R5, and the emitter of the bipolar transistor Q3 is grounded through a resistor R5;
the emitter of the bipolar transistor Q4 is connected to ground through a resistor R7.
Further, the device also comprises a bipolar transistor Q5, MOS transistors M1, M2 and M7, a resistor R8, a resistor R9 and inverters I1 and I2;
the collector of the bipolar transistor Q4 is connected with the grid and the drain of the MOS transistor M1 and the grid of the MOS transistor M2; the sources of the MOS transistor M1 and the MOS transistor M2 are both connected to a power supply VDD;
the drain electrode of the MOS transistor M2 is connected in series with the ground through a resistor R8 and a resistor R9, and the drain electrode of the MOS transistor M2 is also connected to the base electrode of a bipolar transistor Q5;
the emitter of a bipolar transistor Q5 is grounded, the base of the bipolar transistor Q5 is connected to the drain of the MOS transistor M2, and the collector of a bipolar transistor Q5 is connected to the input end of the inverter I1;
the output end of the inverter I1 is connected to the input end of the inverter I2, the output end of the inverter I2 is connected to the gate of the MOS tube M7, the source of the MOS tube M7 is grounded, and the drain of the MOS tube M7 is grounded through a resistor R9.
Further, the device also comprises MOS tubes M3, M4, M5 and M6;
the source of the MOS transistor M3 is connected to VDD, the gate of the MOS transistor M3 is connected with the gate of the MOS transistor M4 and is connected to the collector of the bipolar transistor Q4, the drain of the MOS transistor M3 is connected to the source of the MOS transistor M5, the gate of the MOS transistor M5 is connected to the gate of the MOS transistor M6, and the drain of the MOS transistor M5 is grounded through a resistor R5;
the source of MOS pipe M4 is connected to VDD, the drain of MOS pipe M4 is connected to the source of MOS pipe M6, the drain of MOS pipe M6 is connected to the gate of MOS pipe M6, and the drain of MOS pipe M6 is also connected to the input of inverter I1.
The invention has the beneficial effects that:
(1) the circuit of the invention has simple structure, low design complexity and lower cost;
(2) in the embodiment of the invention, only one path of current lower than 25nA is added on the basis of the existing over-temperature protection circuit, so that the power consumption of the circuit is reduced.
Drawings
In order to make the object, technical scheme and beneficial effect of the invention more clear, the invention provides the following drawings for explanation:
FIG. 1 is a schematic diagram of a nonlinear current composition structure in the prior art;
FIG. 2 is a circuit diagram of the present invention;
FIG. 3 is a graph of simulation results of bandgap reference output voltages according to an embodiment of the present invention;
FIG. 4 is a diagram of second-order compensation current simulation results according to an embodiment of the present invention.
Detailed Description
Preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
The invention provides a second-order compensation band gap reference circuit, which comprises: the circuit comprises a traditional first-order compensation band gap reference circuit, an over-temperature protection circuit and a second-order compensation circuit. As shown in FIG. 2, the conventional first-order compensated bandgap reference circuit includes an operational amplifier OP1, bipolar transistors Q1-Q3, and resistors R1-R6. The positive input end of OP1 is connected with the collector of Q3 and one end of R2, the negative input end of OP1 is connected with the collector of Q2 and one end of R1, and the output end of OP1 is connected with the base of Q1; the collector of the Q1 is connected with a power supply VDD, and the emitter is connected with the other end of the R1, the other end of the R2, one end of the R3 and the base of a bipolar transistor Q4 in the over-temperature protection circuit; the base of Q2 is connected with the base of Q3 and is connected with the other end of R3 and one end of R6, and the emitter of Q2 is connected with one end of R4; the emitter of the Q3 is connected with the other end of the R4 and one end of the R5; the other end of R6 and the other end of R5 are both connected to ground.
The over-temperature protection circuit comprises bipolar transistors Q4 and Q5, MOS transistors M1, M2, M4, M6 and M7, resistors R7-R9 and inverters I1 and I2. The emitter of Q4 is connected with one end of R7, the collector is connected with the grid and the drain of M1 and the grids of M2 and M4, and is simultaneously connected with the grid of M3 in the second-order compensation circuit; the other end of R7 is connected to ground; the sources of M1, M2 and M4 are all connected to a power supply VDD; the drain of M2 is connected to one end of R8 and the base of Q5; the drain of the M4 is connected with the source of the M6; the other end of R8 is connected to one end of R9 and the drain of M7; the collector of Q5 is connected to the gate and drain of M6, the gate of M5 in the second-order compensation circuit and the input of I1; the other end of R9 is connected to ground; the source of M7 is connected to ground, and the gate is connected to the output of I2; the output end of the I1 is connected with the input end of the I2.
And the second-order compensation circuit comprises MOS transistors M3 and M5. Wherein the source of M3 is connected to the power VDD, and the drain is connected to the source of M5. The drain of MOS transistor M5 is connected to the emitter of Q3;
the working principle of the invention is as follows:
band-gap reference output voltage V in first-order compensation band-gap reference circuitREFAt the emitter of Q1, resistors R1 and R2 have the same resistance, the area ratio of the emitters of Q2 and Q3 is 8:1, and
wherein, I5Is the current flowing through M5. In the over-temperature protection circuit, when the temperature is lower than a certain value T0At this time, Q5 is completely turned off and no current flows, so that M5 also has no current, and V is at this timeREFThe expression of (2) is only the first two terms on the right side of the equal sign in the formula (1); when the temperature is higher than T0At this time, the collector current of Q5 gradually increases with the increase of the base voltage thereof, and a current flows in M5, and V is at this timeREFThe expression of (c) is equation (1). Thus VREFCan be expressed as:
as can be seen from equation (2), when the temperature is higher than T0When the voltage is increased, the voltage which is increased along with the temperature rise is added on the basis of a first-order band gap reference, so that the output voltage V is increasedREFThe curve is upwarped at high temperature, and the effect of second-order compensation is achieved.
Fig. 3 shows a simulation experiment result of the output voltage of the bandgap reference circuit varying with temperature, and it can be seen from fig. 3 that the output voltage curve exhibits the characteristic after second-order compensation, and the variation of the output voltage with temperature is effectively reduced.
FIG. 4 shows the second-order compensation current I in the bandgap reference circuit5The simulation experiment result along with the temperature change can be seen from FIG. 4, I5The power consumption is very low, namely 0nA at the normal temperature of 25 ℃, 23.7nA at the high temperature of 125 ℃, so that the power consumption of the whole circuit is greatly reduced.
Compared with the prior art, the reference voltage circuit provided by the embodiment of the invention has the following advantages that:
(1) in the embodiment of the invention, the existing over-temperature protection circuit is used for second-order compensation, so that the circuit has simple structure, low design complexity and lower cost;
(2) in the embodiment of the invention, only one path of current lower than 25nA is added on the basis of the existing over-temperature protection circuit, so that the power consumption of the circuit is reduced.
Finally, it is noted that the above-mentioned preferred embodiments illustrate rather than limit the invention, and that, although the invention has been described in detail with reference to the above-mentioned preferred embodiments, it will be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the scope of the invention as defined by the appended claims.
Claims (1)
1. The utility model provides a band gap reference voltage second order compensating circuit which characterized in that:
the circuit includes: the circuit comprises a traditional first-order compensation band gap reference circuit, an over-temperature protection circuit and a second-order compensation circuit;
the traditional first-order compensation band-gap reference circuit comprises an operational amplifier OP1, bipolar transistors Q1-Q3 and resistors R1-R6;
the positive input end of OP1 is connected with the collector of Q3 and one end of R2, the negative input end of OP1 is connected with the collector of Q2 and one end of R1, and the output end of OP1 is connected with the base of Q1; the collector of the Q1 is connected with a power supply VDD, and the emitter is connected with the other end of the R1, the other end of the R2, one end of the R3 and the base of a bipolar transistor Q4 in the over-temperature protection circuit; the base of Q2 is connected with the base of Q3 and is connected with the other end of R3 and one end of R6, and the emitter of Q2 is connected with one end of R4; the emitter of the Q3 is connected with the other end of the R4 and one end of the R5; the other end of R6 and the other end of R5 are both connected to ground;
the over-temperature protection circuit comprises bipolar transistors Q4 and Q5, MOS transistors M1, M2, M4, M6 and M7, resistors R7-R9, inverters I1 and I2; the emitter of Q4 is connected with one end of R7, the collector is connected with the grid and the drain of M1 and the grids of M2 and M4, and is simultaneously connected with the grid of M3 in the second-order compensation circuit; the other end of R7 is connected to ground; the sources of M1, M2 and M4 are all connected to a power supply VDD; the drain of M2 is connected to one end of R8 and the base of Q5; the drain of the M4 is connected with the source of the M6; the other end of R8 is connected to one end of R9 and the drain of M7; the collector of Q5 is connected to the gate and drain of M6, the gate of M5 in the second-order compensation circuit and the input of I1; the other end of R9 is connected to ground; the source of M7 is connected to ground, and the gate is connected to the output of I2; the output end of the I1 is connected with the input end of the I2;
a second-order compensation circuit including MOS transistors M3 and M5; wherein, the source of M3 is connected to power VDD, and the drain is connected to the source of M5; the drain of MOS transistor M5 is connected to the emitter of Q3.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810433620.2A CN108508952B (en) | 2018-05-08 | 2018-05-08 | Band gap reference voltage second-order compensation circuit |
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| CN201810433620.2A CN108508952B (en) | 2018-05-08 | 2018-05-08 | Band gap reference voltage second-order compensation circuit |
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| CN108508952B true CN108508952B (en) | 2020-06-02 |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103412607A (en) * | 2013-07-18 | 2013-11-27 | 电子科技大学 | High-precision band-gap reference voltage source |
| CN104793690A (en) * | 2015-04-27 | 2015-07-22 | 西安电子科技大学 | High-precision band-gap reference source |
| CN106959723A (en) * | 2017-05-18 | 2017-07-18 | 东南大学 | A kind of bandgap voltage reference of wide input range high PSRR |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5085238B2 (en) * | 2007-08-31 | 2012-11-28 | ラピスセミコンダクタ株式会社 | Reference voltage circuit |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103412607A (en) * | 2013-07-18 | 2013-11-27 | 电子科技大学 | High-precision band-gap reference voltage source |
| CN104793690A (en) * | 2015-04-27 | 2015-07-22 | 西安电子科技大学 | High-precision band-gap reference source |
| CN106959723A (en) * | 2017-05-18 | 2017-07-18 | 东南大学 | A kind of bandgap voltage reference of wide input range high PSRR |
Non-Patent Citations (1)
| Title |
|---|
| 一种带2阶补偿的高精度带隙基准源;张林等;《微电子学》;20090228;第39卷(第1期);全文 * |
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