CN108475650B - 改善的基底加工和装置 - Google Patents

改善的基底加工和装置 Download PDF

Info

Publication number
CN108475650B
CN108475650B CN201680078025.0A CN201680078025A CN108475650B CN 108475650 B CN108475650 B CN 108475650B CN 201680078025 A CN201680078025 A CN 201680078025A CN 108475650 B CN108475650 B CN 108475650B
Authority
CN
China
Prior art keywords
adhesive
template
holes
units
tape
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201680078025.0A
Other languages
English (en)
Other versions
CN108475650A (zh
Inventor
白承昊
张德春
丁锺才
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai Luoke Semiconductor Co ltd
Original Assignee
Rokko Systems Pte Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rokko Systems Pte Ltd filed Critical Rokko Systems Pte Ltd
Publication of CN108475650A publication Critical patent/CN108475650A/zh
Application granted granted Critical
Publication of CN108475650B publication Critical patent/CN108475650B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/673Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders
    • H01L21/67333Trays for chips
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/741Apparatus for manufacturing means for bonding, e.g. connectors
    • H01L24/742Apparatus for manufacturing bump connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10Measuring as part of the manufacturing process
    • H01L22/12Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68313Auxiliary support including a cavity for storing a finished device, e.g. IC package, or a partly finished device, e.g. die, during manufacturing or mounting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68354Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to support diced chips prior to mounting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/114Manufacturing methods by blanket deposition of the material of the bump connector
    • H01L2224/11444Manufacturing methods by blanket deposition of the material of the bump connector in gaseous form
    • H01L2224/1145Physical vapour deposition [PVD], e.g. evaporation, or sputtering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/1147Manufacturing methods using a lift-off mask
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/131Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13101Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/14Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H01L2224/141Disposition
    • H01L2224/1412Layout
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/14Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Wire Bonding (AREA)
  • Printing Plates And Materials Therefor (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Manufacture Or Reproduction Of Printing Formes (AREA)

Abstract

用于制备容置多个IC单元的模板的方法,所述方法包括以下步骤:提供具有孔阵列的金属基底;向所述基底施加粘合表面;除去所述粘合表面的与所述金属基底中的孔对应的部分。

Description

改善的基底加工和装置
技术领域
本发明涉及集成电路(IC)单元的处理,特别是涉及辅助球栅阵列(BGA)IC单元的溅射的方法和装置。
背景技术
溅射以在IC单元上沉积材料的薄膜是应用具有非常高熔点的材料的有效方法。因此,考虑到其对待施用的材料的灵活性,溅射已经被广泛使用。
通常,将IC单元阵列放置在基底上并使其通过溅射室以接收薄材料层。
球栅阵列(BGA)IC单元越来越频繁地替代标准扁平IC单元被使用,标准扁平IC单元的互连引脚受单元的周长限制。BGA芯片可以在面上提供更高密度的互连引脚,从而导致在该芯片上更好地集成器件。然而,由于扁平IC部分与基底被焊球分离,因此在溅射室中使用BGA芯片存在问题。目的在于芯片上表面的溅射可通过由焊球将芯片从基底举起而提供的间隙扩散至下表面。
因此有利的是,避免这样的扩散,同时允许以常规方法溅射BGA芯片。
发明内容
在第一方面中,本发明提供了用于制备容置多个IC单元的模板的方法,所述方法包括以下步骤:提供具有孔阵列的金属基底;向所述基底施加粘合表面;除去所述粘合表面的与所述金属基底中的孔对应的部分。
在第二方面中,本发明提供了用于容置多个IC单元的模板,其包括:具有孔阵列的金属基底;所述基底上的粘合表面,所述孔被布置成用以容置所述多个IC单元。
在第三方面中,本发明提供了用于从孔中顶出IC单元的顶出销,所述顶出销包括:杆部和所述杆部末端处的头部,所述头部具有大于所述杆部的截面的第一接触表面,所述第一接触表面被布置成用以接触所述IC单元的表面并由其施加力以使所述IC单元从所述孔脱离。
在本发明的一个方面中,可使用包括具有孔阵列的金属基底的模板,其中所述孔略小于单元的IC部分。因此,单元适配在孔上,其中焊球穿过孔并因此去除了现有技术布置允许溅射通过其扩散的间隙。通过使单元的IC组件与模板齐平,没有溅射可以通过其扩散至单元的相反面上的间隙。
为了将单元保持在模板上而不施加真空,可在模板上设置粘合表面以将单元“粘”在模板上,代替更常规的真空封装。
在另一个实施方案中,粘合表面可由施加至模板的双面胶带提供。在另一个实施方案中,为了确保粘合表面或双面胶带与孔相对应,可在放置IC单元之前激光切割胶带。或者,可将粘合表面喷涂或蒸镀至金属基底上。在施加粘合剂时,可将金属基底放置在表面上,并且通过将金属基底从表面提起来除去过量的粘合剂。
在又一个实施方案中,双面胶带可包括背衬带,使得在胶带中激光切割孔时,可以从模板上剥离背衬带并因此从粘合层除去切割部分。
在溅射工艺之后,将单元从粘合层移除。对于需要真空封装的常规系统,这可通过结束真空来实现。在使用粘合层的该情况下,可使用顶出销。在又一个实施方案中,顶出销可成形为避免与单元的焊球面上的电极接触。或者,顶出销可成形为均匀地接触包括电极的单元的内部部分,并因此在顶出销的接触面上具有台阶以接触焊球表面和电极二者,并因此向单元施加均匀的压力。
在又一个实施方案中,在激光切割未能将胶带切割得与模板中的孔齐平的情况下,这可导致胶带悬垂进孔的空隙中。在这种情况下,可将孔的尺寸设置成使得胶带孔中的空隙足以使焊球穿过,并因此单元与胶带的悬垂部分而不是模板的孔齐平。
附图说明
参照示出本发明的可能布置的附图进一步描述本发明将是方便的。本发明的其他布置是可能的,因此,附图的特殊性不应被理解为代替本发明前面描述的一般性。
图1是根据本发明的一个实施方案的流程图。
图2是根据本发明的另一个实施方案的流程图。
图3A至3C是根据本发明的工艺的基底的顺序等距视图。
图4A和4B是根据本发明的一个实施方案的与模板接合的IC单元的各种不同视图。
图5是根据本发明的一个实施方案的环形框架的等距视图。
图6A至6C是根据本发明的另一个实施方案的环形框架的顺序等距视图。
图7A和7B是根据本发明的另一个实施方案的模板中凹部的不同视图,以及;
图8A和8B是根据本发明的一个实施方案的顶出销的不同视图。
具体实施方式
图1示出整个工艺的流程图。其从单元的检查、翻转、对准和定向10开始。然后将单元放置在已经向其施加双面胶带的模板上20并激光切割15。一旦单元与模板接合20,就卸载模板25并送去溅射30。在溅射工艺之后,将单元在被卸载之前顶出、对准并进一步检查35。
检查、对准和定向步骤10包括进行顶部视觉检查,然后将单元移动至翻转器(flipper),随后移动至拾取器以用于对准单元。然后单元通过拾取器接合而将单元移动至模板,并在通过拾取器递送期间检查单元的下侧。
图2示出胶带施加和激光切割步骤15,其中提供了模板并向其施加双面胶带。然后通过模板的孔激光切割胶带,以便切割双面胶带。然后除去双面胶带的背衬带60,除去双面胶带的切割部分并暴露用于容置单元的粘合层。
图3A至3C示出单元施加工艺,其中提供的模板65在这种情况下是PCB大小的模板。将双面胶带75施加至模板65,并接着激光切割孔80,剥离背衬带70。这留下用于将单元90容置到相应孔中的粘合层85。
图4A和4B是单元100的详细视图,所述单元100放置在模板115上,特别是放置在孔105中以使焊球110穿过孔,并因此单元100的位置与胶带120齐平。
在使用PCB大小的模板的该特定实施方案中,如图5所示,然后将具有与粘合层接合的单元的模板130放置在环形框架125的粘合层135上。在该布置中,环形框架然后可以被卸载以溅射PCB大小的模板130上较小批量的单元。
图6A至6C示出可溅射大量的单元的常规视图,其中模板145被双面胶带150完全地覆盖。如同图3A至3C的PCB实施方案一样,激光切割胶带150,并且在剥离背衬带140时除去切割部分,导致产生具有用于容置单元160的粘合层165的环形框架155。如同图5的实施方案一样,具有接合在其上的单元160的环形框架155然后可以被卸载以进行溅射。
在一个特定实施方案中,双面胶带的激光切割可能无法将胶带切割成与模板齐平。图7A和7B示出一个具体实例,其中模板170在激光切割胶带之后使悬垂部185越过模板框架175,留下尺寸减小的孔180。考虑到该悬垂部185,可将模板170的尺寸设置成使孔比正常的更大,由此胶带中的包括悬垂部185的孔足以容置单元195并位于悬垂部上,其中焊球伸入孔180中。因此,图7A和7B的实施方案落入本发明的范围内并且适应激光切割实践的实际限制。
图8A和8B示出设置在模板210内的粘合表面205上的BGA芯片200。BGA芯片200包括芯片200周围的焊球连接部235和焊球阵列内的电极240以及空置空间,所述空置空间是与电极240相邻的不同区域245。
从模板除去BGA芯片需要顶出销,然而,常规顶出销通过施加可能刮伤、损坏或移动电极的局部力而有损坏电极240的风险。为此,本发明包括具有专业(specialized)头部220的新顶出销215。专业头部包括第一接触表面和第二表面,所述第一接触表面大于顶出销的杆部的截面积。第一区域225被布置成用以接触电极,以便在电极周围均匀地分布顶出力。第二表面230相对于第一部分225偏移,以便接触BGA芯片的空置区域245。因此,头部220被布置成用以向BGA单元200的焊球面施加均匀的压力,并因此使施加至电极的力最小化,这可以防止损坏。

Claims (6)

1.一种用于处理多个IC单元的方法,所述方法包括:
提供步骤,提供包括具有模板孔阵列的金属基底的模板;
施加步骤,向所述模板施加粘合表面;
除去步骤,除去所述粘合表面的与所述模板中的模板孔对应的部分,
其中所述施加步骤包括将双面胶带放置于所述模板;
其中所述除去步骤包括激光切割所述双面胶带,然后剥离背衬带以暴露所述粘合表面并除去所述双面胶带的切割部分以形成粘合剂孔;
其中所述模板孔大于所述粘合剂孔以限定所述双面胶带的悬垂部,使得每个粘合剂孔和悬垂部足以容置所述IC单元并使所述IC单元置于所述悬垂部上,
其中所述IC单元是BGA芯片,所述粘合剂孔的尺寸被设置成使所述BGA芯片的焊球连接部通过所述粘合剂孔而截留所述BGA芯片的IC部分。
2.根据权利要求1所述的方法,还包括:
放置步骤,在所述模板的粘合剂孔中放置多个所述IC单元,其中每个所述粘合剂孔中放置有多个所述IC单元中的一个;
卸载步骤,卸载环形框架,所述环形框架具有其上放置有所述模板的粘合剂层。
3.根据权利要求2所述的方法,还包括在所述卸载步骤之后用以溅射所述IC单元的溅射步骤。
4.根据权利要求2或3所述的方法,还包括在所述放置步骤之前用以检查所述IC单元的检查步骤。
5.根据权利要求3所述的方法,还包括在所述溅射步骤之后用以检查所述IC单元的检查步骤。
6.一种用于容置多个IC单元的模板,包括:
具有模板孔阵列的金属基底;
所述金属基底上的粘合表面,
所述模板孔被布置成用以容置所述多个IC单元;
其中所述粘合表面包括施加至所述金属基底的双面胶带;
所述双面胶带具有切割部分以形成粘合剂孔;
其中所述模板孔大于所述粘合剂孔以限定所述双面胶带的悬垂部,使得每个粘合剂孔和悬垂部足以容置所述IC单元并使所述IC单元置于所述悬垂部上,
其中所述IC单元是BGA芯片,所述粘合剂孔的尺寸被设置成使所述BGA芯片的焊球连接部通过所述粘合剂孔而截留所述BGA芯片的IC部分。
CN201680078025.0A 2015-12-04 2016-11-17 改善的基底加工和装置 Active CN108475650B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
SG10201509996UA SG10201509996UA (en) 2015-12-04 2015-12-04 Improved substrate processing and apparatus
SG10201509996U 2015-12-04
PCT/SG2016/050569 WO2017095327A1 (en) 2015-12-04 2016-11-17 Improved substrate processing and apparatus

Publications (2)

Publication Number Publication Date
CN108475650A CN108475650A (zh) 2018-08-31
CN108475650B true CN108475650B (zh) 2022-07-12

Family

ID=58797554

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201680078025.0A Active CN108475650B (zh) 2015-12-04 2016-11-17 改善的基底加工和装置

Country Status (5)

Country Link
US (1) US11183413B2 (zh)
CN (1) CN108475650B (zh)
MY (1) MY198165A (zh)
SG (1) SG10201509996UA (zh)
WO (1) WO2017095327A1 (zh)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109023277B (zh) * 2018-08-29 2020-09-08 江苏长电科技股份有限公司 一种bga封装电子产品的磁控溅射方法
SG10201901908XA (en) * 2019-03-04 2020-10-29 Rokko Systems Pte Ltd Improved sputtering processing and apparatus
TWI712104B (zh) * 2020-01-10 2020-12-01 力成科技股份有限公司 晶片固定裝置

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4632871A (en) * 1984-02-16 1986-12-30 Varian Associates, Inc. Anodic bonding method and apparatus for X-ray masks
CN1090344A (zh) * 1992-12-03 1994-08-03 圣戈本/诺顿工业搪瓷有限公司 立式舟形架和晶片支承件
US5846676A (en) * 1995-09-26 1998-12-08 Canon Kabushiki Kaisha Mask structure and exposure method and apparatus using the same
CN1978571A (zh) * 2005-12-06 2007-06-13 爱思工业有限公司 芯片键合胶粘带
CN102246292A (zh) * 2008-10-10 2011-11-16 台湾积体电路制造股份有限公司 在用于3d封装的晶片中电镀晶片贯通孔的方法
CN108292647A (zh) * 2015-09-30 2018-07-17 天工方案公司 与屏蔽的模块的制造相关的装置和方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6426564B1 (en) * 1999-02-24 2002-07-30 Micron Technology, Inc. Recessed tape and method for forming a BGA assembly
US20020096253A1 (en) * 1999-11-23 2002-07-25 Amkor Technology, Inc., Methods Of Attaching A Sheet Of An Adhesive Film To A Substrate In The Course Of Making Integrated Circuit Packages
JP5356876B2 (ja) * 2008-03-28 2013-12-04 日本特殊陶業株式会社 多層配線基板及びその製造方法
US7972904B2 (en) * 2009-04-14 2011-07-05 Powertech Technology Inc. Wafer level packaging method
US8241964B2 (en) * 2010-05-13 2012-08-14 Stats Chippac, Ltd. Semiconductor device and method of embedding bumps formed on semiconductor die into penetrable adhesive layer to reduce die shifting during encapsulation
KR20130012500A (ko) * 2011-07-25 2013-02-04 삼성전자주식회사 칩 패키지 구조물 및 그 제조 방법
CN107002227B (zh) * 2014-08-13 2019-09-24 洛克系统私人有限公司 用于加工经溅射的ic单元的装置及方法
US20160111375A1 (en) * 2014-10-17 2016-04-21 Tango Systems, Inc. Temporary bonding of packages to carrier for depositing metal layer for shielding
TWI735525B (zh) * 2016-01-31 2021-08-11 美商天工方案公司 用於封裝應用之濺鍍系統及方法
JP2017200183A (ja) * 2016-04-29 2017-11-02 スカイワークス ソリューションズ, インコーポレイテッドSkyworks Solutions, Inc. 遮蔽されたダイバーシティ受信モジュール

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4632871A (en) * 1984-02-16 1986-12-30 Varian Associates, Inc. Anodic bonding method and apparatus for X-ray masks
CN1090344A (zh) * 1992-12-03 1994-08-03 圣戈本/诺顿工业搪瓷有限公司 立式舟形架和晶片支承件
US5846676A (en) * 1995-09-26 1998-12-08 Canon Kabushiki Kaisha Mask structure and exposure method and apparatus using the same
CN1978571A (zh) * 2005-12-06 2007-06-13 爱思工业有限公司 芯片键合胶粘带
CN102246292A (zh) * 2008-10-10 2011-11-16 台湾积体电路制造股份有限公司 在用于3d封装的晶片中电镀晶片贯通孔的方法
CN108292647A (zh) * 2015-09-30 2018-07-17 天工方案公司 与屏蔽的模块的制造相关的装置和方法

Also Published As

Publication number Publication date
MY198165A (en) 2023-08-08
US20170162412A1 (en) 2017-06-08
SG10201509996UA (en) 2017-07-28
US11183413B2 (en) 2021-11-23
WO2017095327A1 (en) 2017-06-08
CN108475650A (zh) 2018-08-31

Similar Documents

Publication Publication Date Title
KR101665249B1 (ko) 다이 본더 및 본딩 방법
CN108475650B (zh) 改善的基底加工和装置
US8361604B2 (en) Methods and systems for releasably attaching support members to microfeature workpieces
JP2008028325A (ja) 半導体装置の製造方法
JP2018533848A (ja) キャリア超薄型基板
JP6439053B2 (ja) 電子部品の製造方法および処理システム
US20030094695A1 (en) Process for producing a semiconductor chip
KR101640773B1 (ko) 전자파 차폐막을 구비한 반도체 패키지의 제조 방법 및 이를 위한 장치
TW201705321A (zh) 半導體裝置的製造方法
KR101590593B1 (ko) 반도체패키지의 스퍼터링 방법
US20070134471A1 (en) Methods and apparatuses for releasably attaching microfeature workpieces to support members
US7846776B2 (en) Methods for releasably attaching sacrificial support members to microfeature workpieces and microfeature devices formed using such methods
CN101996889A (zh) 超薄封装工艺
JP2017208388A (ja) 電子部品の製造方法および処理システム
US11515181B2 (en) Device for attaching conductive ball to substrate with plurality of separately controlled plates
JP3351395B2 (ja) チップトレイを用いたフリップチップ形成方法
US20040053488A1 (en) Ball electrode forming method
US4914813A (en) Refurbishing of prior used laminated ceramic packages
JPH1154594A (ja) チップ状部品の取扱方法および装置
US20200286771A1 (en) Sputtering processing and apparatus
US7485493B2 (en) Singulating surface-mountable semiconductor devices and fitting external contacts to said devices
TWI509681B (zh) Method and apparatus for processing on wafers
JP2019169686A (ja) 素子チップの製造方法
KR20090036949A (ko) 반도체 칩 고정용 접착 테이프
JP2001127490A (ja) 粘着性プレートからの部品剥がし方法および装置

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant
TR01 Transfer of patent right
TR01 Transfer of patent right

Effective date of registration: 20240320

Address after: 3rd Floor, No. 2123 Pudong Avenue, China (Shanghai) Pilot Free Trade Zone, Pudong New Area, Shanghai

Patentee after: Shanghai Luoke Semiconductor Co.,Ltd.

Country or region after: China

Address before: Singapore City

Patentee before: ROKKO SYSTEMS Pte. Ltd.

Country or region before: Singapore