CN108449889A - Production method is just recessed in a kind of wiring board - Google Patents
Production method is just recessed in a kind of wiring board Download PDFInfo
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- CN108449889A CN108449889A CN201810246860.1A CN201810246860A CN108449889A CN 108449889 A CN108449889 A CN 108449889A CN 201810246860 A CN201810246860 A CN 201810246860A CN 108449889 A CN108449889 A CN 108449889A
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- hole
- multilayer
- recessed
- plate
- plating
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4623—Manufacturing multilayer circuits by laminating two or more circuit boards the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/09—Treatments involving charged particles
- H05K2203/095—Plasma, e.g. for treating a substrate to improve adhesion with a conductor or for cleaning holes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
The present invention relates to wiring board production technical field, production method is just recessed in specially a kind of wiring board.It is slower that erosion rate is stung to the entirety of hole wall insulated part when the method that the present invention makes positive etchback filling holes with resin in the circuit board not only overcomes potassium permanganate removing glue method, the unconspicuous disadvantage of performance is recessed, also overcomes the problem that plasma removing glue method easily causes folding plating and plating cavity.
Description
Technical field
The present invention relates to wiring board production technical fields more particularly to a kind of wiring board, and production method is just recessed.
Background technology
Printed circuit board is also known as wiring board (PCB, Printed Circuit Board).The production of wiring board includes circuit
Two links of design and manufacture, the manufacture of wiring board are designed as foundation with the circuit of early period, and manufacturing process is generally as follows：By design
It is required that core material, which is cut into required size → pad pasting on core material →, in sawing sheet process uses internal layer film aligning
Exposure → development remove not by the film of photocuring with formed the layers of copper of non-envelope covering on inner figure → etching core material with
It forms internal layer circuit → taking off film → each core material is stacked and is formed as one by high-temperature laminating more by certain put in order
Laminate → according to borehole data drilling → electroless copper plating makes hole metallization → electric plating of whole board that layers of copper thickness in hole be made to reach design requirement
→ making the outer-layer circuit be connected with internal layer on multilayer boards → silk-screen solder mask and is exposed on multilayer boards by film aligning
Light and development make the rear processes such as solder mask → surface treatment → molding, detection.
Positive etchback printed circuit board referred to as etchback plate, refers to etching the epoxy resin of hole wall and glass fiber after drilling
To certain depth, internal layer copper is made to expose completely, then through the via hole, internal layer copper is made to form three-dimensional with hole wall copper plate
Connection, to meet a kind of printed circuit board of highly reliable electrical connection.In the current marketplace, most printed circuit boards production
Product need not make its internal layer copper form this three-dimensional with hole wall copper facing to connect, but for some aerospaces, military product, due to
The very hot of its application, extremely adverse circumstances, the requirement to electronic unit reliability such as cold, high pressure are extremely severe compared with common product
It carves, generally requires the positive etchback printed circuit board of making.
The method that the epoxy resin of hole wall and glass fiber etch into certain depth mainly there is into potassium permanganate removing glue method
With plasma removing glue method, but these methods come with some shortcomings, make the positive etchback printed circuit board of formation layer and layer it
Between electrical connection reliability it still needs further improvement, particular problem is as follows：
1, potassium permanganate removing glue method：Erosion speed is stung to the entirety of hole wall insulated part (including epoxy resin and glass fiber)
Rate is slower, is generally used for the dirty except boring of ordinary circuit board, performance unobvious are recessed.
2, plasma removing glue method：Erosion rate is stung to the entirety for the hole wall that insulate and is more than potassium permanganate, can realize etchback, but right
The erosion rate of stinging of hole wall epoxy resin is more than glass fiber, and hole wall is caused to have glass fiber residual to pit occur,
And then folding plating and plating cavity are easily formed in metallization processes, these plating cavities are easy to conceal moisture content and electroplating liquid medicine,
Major hidden danger is caused to the reliability of circuit board.
In addition, containing the wiring board that positive etchback requires, and the copper thickness of electric plating of whole board is required to control the positive etchback in 20+/- 5um
Wiring board, existing production method easily occur removing glue deficiency when etching the epoxy resin and glass fiber of hole wall or remove
Glue is excessive, glass fiber undercut or overetched problem.
Invention content
The present invention is low in the presence of etchback efficiency when hole wall is recessed for the production method of existing positive etchback printed circuit board
Or there is pit and the reliability of product is caused to there are problems that major hidden danger in hole wall, especially for metalized blind vias be just
Be recessed filling holes with resin positive etchback wiring board, hole wall easily occurs etching it is not clean with etch excessively, hole wall occur pit cause it is hidden
Suffer from more notable problem, a kind of make in the circuit board is provided, the method for filling holes with resin is just being recessed to overcome the above problem.
To achieve the above object, the present invention uses following technical scheme.
Production method is just recessed in a kind of wiring board, includes the following steps：
The processing of S1 multilayer daughter boards：
The core plate for having made internal layer circuit is press-fitted together as one by prepreg, forms multilayer daughter board；
First through hole is bored on multilayer daughter board, the first through hole is used to become metalized blind vias/gold after following process
Categoryization buried via hole；
Then multilayer daughter board is handled using plasma removing glue method, the hole wall of first through hole is recessed, etchback amount is 20-
30μm；
Then internal layer pre-treatment is carried out to multilayer daughter board, the internal layer pre-treatment is followed successively by：Washing, with the glass of 7-13g/L
Glass fiber etching solution is etched, washes, carrying out pickling with the sulfuric acid of 120-160g/L；Etching and pickling in outer layer pre-treatment
Reaction temperature is 42 DEG C, reaction time 3min；
Internal layer copper-coating is carried out followed by multilayer daughter board, the pre-treatment of the internal layer copper-coating is followed successively by：Oil removing,
Washing, pickling, washing, microetch, washing, activation, washing, speed eliminate Sn (OH) Cl, washing；
Electric plating of whole board processing is carried out to multilayer daughter board, electro-coppering thickness is 20 ± 5 μm, and first through hole is made to metallize；
Carried out successively on multilayer daughter board according to the prior art plating hole pattern, plated hole, filling holes with resin, abrasive belt grinding, heavy copper,
Multilayer that there is internal layer circuit and first through hole to be loaded with resin is made in the processing that electric plating of whole board, inner figure, internal layer etch
Plate.
It is preferably, described that the progress electric plating of whole board processing of multilayer daughter board is carried out by the way of bevelling plating in step S1,
Technological parameter is：Current density is 1.2ASD, electroplating time 45min, and the current density plated again after bevelling is 1.2ASD, plating
Time is 45min.
Preferably, in step S1, the technological parameter handled multilayer daughter board using plasma removing glue method is as follows：
Power is 2300W, CF4For 1000sccm, O2For 800sccm.
Preferably, in step S1, when being handled multilayer daughter board using plasma removing glue method, the two sides of multilayer daughter board is equal
Respectively single treatment is carried out with plasma removing glue method.
Preferably, in step S1, in the plated hole process, the hole copper thickness for controlling first through hole is greater than or equal to 25 μm.
Preferably, in step S1, the glass fibre etching solution is grouped as by each group of following mass parts：60 parts of water,
The hydrofluoric acid of the concentrated sulfuric acid of 30 parts of a concentration of 95-98wt%, 50 parts of a concentration of 40-45wt%.
S2 multilayers produce the processing of plate：
Different multilayer daughter boards is press-fitted together as one by prepreg, multilayer is formed and produces plate；Described first after pressing
Through-hole is processed to metalized blind vias/metallization buried via hole；
The second through-hole is bored on multilayer production plate, second through-hole is used to become plated-through hole after following process；
Then it uses plasma removing glue method to handle multilayer production plate, the hole wall of the second through-hole is recessed, etchback amount is
20-30μm；
Then outer layer pre-treatment is carried out to multilayer production plate, the outer layer pre-treatment is followed successively by：It washes, with 7-13g/L's
Glass fibre etching solution is etched, washes, carrying out pickling with the sulfuric acid of 120-160g/L；Etching and pickling in outer layer pre-treatment
Reaction temperature be 42 DEG C, reaction time 3min；
Heavy copper and electric plating of whole board processing are carried out followed by multilayer production plate, makes the second via metal；
Plating hole pattern, plated hole are carried out successively on multilayer production plate according to the prior art, resin plug is carried out to the second through-hole
The processing in hole, abrasive belt grinding, heavy copper, electric plating of whole board；
Then negative film technique is used to make outer-layer circuit on multilayer production plate.
Preferably, in step S2, it is described to multilayer production plate carry out electric plating of whole board processing using bevelling be electroplated by the way of into
Row, technological parameter are：Current density is 1.2ASD, electroplating time 45min, and the current density plated again after bevelling is 1.2ASD,
Electroplating time is 45min.
Preferably, in step S2, it is described using plasma removing glue method to the technological parameter that is handled of multilayer production plate such as
Under：Power is 2300W, CF4For 1000sccm, O2For 800sccm.
Preferably, in step S2, when being handled multilayer production plate using plasma removing glue method, multilayer produces the two of plate
Face respectively carries out single treatment with plasma removing glue method.
Preferably, in step S2, in the plated hole process, the hole copper thickness of the second through-hole of control is greater than or equal to 25 μm.
Preferably, in step S2, the glass fibre etching solution is grouped as by each group of following mass parts：60 parts of water,
The hydrofluoric acid of the concentrated sulfuric acid of 30 parts of a concentration of 95-98wt%, 50 parts of a concentration of 40-45wt%.
Process after S3：
Process is processed after being carried out to multilayer production plate according to the prior art, and non-metallic Kong Houyi is bored on multilayer production plate
It secondary making solder mask and is surface-treated, circuit board finished product is made after molding.
Compared with prior art, the beneficial effects of the invention are as follows：The present invention by adjusting optimization wiring board production process,
First through hole in multilayer daughter board is made the hole handled containing positive recess process, then pressed again by first processing and fabricating multilayer daughter board
Conjunction forms multilayer production plate, and the first through hole for having been subjected to the processing of positive recess process at this time is further processed into as blind/buried vias,
And after continuing to processing, the second through-hole in multilayer production plate, which is processed to be fabricated to, to be handled containing positive recess process
Hole, and removing glue processing is carried out to multilayer daughter board and multilayer production plate using plasma removing glue method, control etchback amount is 20-30 μ
Then m is corresponded to before internal layer sinks copper and heavy copper and is handled before processing and outer layer to remove the glass that hole wall protrudes before carrying out internal layer respectively
Glass fiber keeps hole wall straight, while in stringent control plasma removing glue method removing glue processing, internal layer pre-treatment and outer layer pre-treatment
Technological parameter overcomes when hole wall be recessed to realize that is be just recessed is precisely controlled and there is etchback efficiency is low or hole wall appearance
Pit causes the reliability of product to there are problems that major hidden danger, for being to be handled through positive recess process with metalized blind vias
Wiring board avoids hole wall and occurs that removing glue is insufficient or removing glue is excessive, glass fiber undercut or overetched problem.
After carrying out filling holes with resin processing to first through hole, copper and electric plating of whole board are sunk in the hole of the positive etchback filling holes with resin of formation by internal layer
One layer of thin copper is formed at mouthful, is stung at borrosion hole mouth when can prevent follow-up plasma removing glue method from carrying out removing glue processing to multilayer production plate
Resin causes to be recessed.
The method that the present invention makes the hole handled through positive recess process in the circuit board not only overcomes potassium permanganate removing glue
When method to the entirety of hole wall insulated part sting erosion rate it is slower, be recessed the unconspicuous disadvantage of performance, also overcome plasma removing glue
Method easily causes the problem of folding plating and plating cavity.
Specific implementation mode
In order to more fully understand the technology contents of the present invention, with reference to specific embodiment to technical scheme of the present invention
It is described further and illustrates.
Embodiment
The present embodiment provides a kind of wiring boards, and production method is just recessed, and the wiring board is 12 laminates, is first made respectively
Two pieces six layers of multilayer daughter board contains hole handle through positive recess process in two pieces of multilayer daughter boards, i.e., filling holes with resin is just recessed
Then this two pieces of multilayer daughter boards are press-fitted together as one to form 12 layers of multilayer and produce plate, in former multilayer daughter board by (plated-through hole)
Positive etchback filling holes with resin metalized blind vias is become from plated-through hole, 12 sandwich circuits are made in multilayer production plate after following process
Plate, for the 1-6 layers of the wiring board containing positive etchback filling holes with resin (metalized blind vias), 7-12 layers also contain positive etchback filling holes with resin
(metalized blind vias), 1-12 layers also contain positive etchback filling holes with resin (plated-through hole).
Specific make step is as follows：
(1) sawing sheet：Plank and core plate structure 370HR (core plate can not contain 7628PP structures), baking sheet after sawing sheet：170℃×
4h。
(2) inner figure/internal layer etching：Inner figure shifts, and light-sensitive surface, the film thickness of light-sensitive surface are coated with vertical application machine
8 μm of control completes internal layer circuit exposure using Full-automatic exposure machine with 5-6 lattice exposure guide rule (21 lattice exposure guide rule)；Internal layer etches,
Core plate after exposure imaging is etched into line pattern, it is 3mil that internal layer line width, which measures,.Wherein, it is aligned and is exposed using LDI, interlayer
Aligning degree is controlled in +/- 25um；Confirm pre-treatment microetch amount (0.6-1.2um), pre-treatment speed 2.5m/min, pad pasting speed
2.7m/min does not allow to cut film.
(3) OPE punchings/internal layer AOI：When OPE punchings, very poor 50um is set, beyond partly dividing heap mating making.Internal layer
AOI checks the defects of opening short circuit, circuit notch, circuit pin hole of internal layer circuit, defective to scrap processing, flawless product
Go out to downstream.Wherein, after AOI twice, to prevent leak-stopping wave.
(4) it is laminated：Brown processing is carried out to core plate.Blank sheet of paper partition board, 120 DEG C × 2h of drying-plate are used after core plate brown；According to plate
Material Tg selects lamination appropriate to be pressed, and forms multilayer daughter board.It needs to measure interlayer harmomegathus after lamination, in multilayer daughter board
Get 4 wad cutters (non-folder PIN modes).
(5) internal layer drills：According to drilling data first through hole is bored on multilayer daughter board.Wherein, positioned using non-folder PIN,
Nozzle is bored using new, the service life is set as 500H/ branch；170 DEG C × 2h of baking sheet after drilling.
(6) plasma removing glue method removing glue (crossing plasma processing)：Plate is produced to multilayer according to existing plasma removing glue method
It is handled, the hole wall of first through hole is recessed.Wherein, positive etchback amount control is at 20-30 μm；The positive and negative of multilayer daughter board mistake respectively
1 plasma removing glue；Every batch of is required to do first plate before making, and needs to do the positive etchback that slice analysis confirms plasma removing glue
Effect；The parameter of plasma removing glue method is as follows：Power 2300W, time 60min, CF41000sccm, O2800sccm.Plasma
Slice analysis is carried out after removing glue.
(7) internal layer pre-treatment：Board-washing is carried out using heavy copper pretreatment line；It crosses and counts hole machine, check without consent；Wherein, internal layer
Pre-treatment is followed successively by：Washing, be etched with the glass fibre etching solution of 7-13g/L, washed, with the sulfuric acid of 120-160g/L into
Row pickling；The reaction temperature of etching and pickling is 42 DEG C in internal layer pre-treatment, reaction time 3min.
Glass fibre etching solution is grouped as by each group of following mass parts：60 parts of water, 30 parts of a concentration of 95-98wt% it is dense
The hydrofluoric acid of sulfuric acid, 50 parts of a concentration of 40-45wt%.
(8) the heavy copper of internal layer：Separate slot insert rack, but chemistry removing glue, from except oil cylinder into；Pre-treatment in internal layer copper-coating according to
It is secondary to be：Oil removing, washing, pickling, washing, microetch, washing, activation, washing, speed eliminate Sn (OH) Cl, washing.
(9) electric plating of whole board：Containing 2 grades of coated copper requirements, electro-coppering thickness is 20 ± 5 μm, and first through hole is made to metallize；For copper
The uniformity of thickness distribution, by the way of bevelling plating, current parameters reference：1.2ASD once again after 1.2ASD × 45min, bevelling
×45min.Slice analysis is carried out to multilayer daughter board after electric plating of whole board.
(10) hole pattern/plated hole is plated：Control hole copper thickness is greater than or equal to 25 μm.Multilayer daughter board is sliced after plated hole
Analysis.
(11) filling holes with resin：Resin ink is mountain honor PHP-900IR-6P rabbet inks；Using selective vacuum taphole machine
Operation, it is ensured that 100% fills up.
(12) abrasive belt grinding：Clean, 25 ± 7 μm of the table copper by the resin mill on multilayer daughter board surface；It controls coated copper and presses IPC 2
Grade standard, the present embodiment, which is pressed, is greater than or equal to 7 μm of controls.
(13) heavy copper/electric plating of whole board：It is 10-12 μm to control electric plating of whole board thickness, and current parameters are 1.2ASD × 60min.
(14) inner figure：It is aligned and is exposed using LDI, level to level alignment degree is controlled in ± 25um；Confirm pre-treatment microetch amount
0.6-1.2 μm, pre-treatment speed 2.5m/min, pad pasting speed 2.7m/min does not allow to cut film.Then in the progress of multilayer daughter board
Layer etching, internal layer circuit is produced on multilayer daughter board.
(15) internal layer AOI：Check the defects of opening short circuit, circuit notch, circuit pin hole of internal layer circuit, it is defective to scrap place
Reason, flawless product go out to downstream.Wherein, after AOI twice, to prevent leak-stopping wave.
(16) it is laminated：Brown processing is carried out to multilayer daughter board.Blank sheet of paper partition board, 120 DEG C × 2h of drying-plate are used after brown；After brown
Carry out cleanliness testing；It selects lamination appropriate to be pressed according to plate Tg, forms multilayer and produce plate.It is measured after pressing
Interlayer harmomegathus gets 4 wad cutters (non-folder PIN modes) on multilayer production plate.
(17) gummosis is removed：Electroplating chemical removes gummosis, and removal multilayer produces the remaining PP glue of plate plate face, need to remove twice.
(18) outer layer drills：It is positioned using non-folder PIN, before drilling, subdrilling test boring confirms drilling, and it is logical to bore second again later
Hole；Using new brill nozzle, the service life is set as 500H/ branch, and the second through-hole and other through-holes are disposably drilled out；Baking sheet after drilling
170℃×2h。
(19) plasma removing glue method removing glue (crossing plasma processing)：Plate is produced to multilayer according to existing plasma removing glue method
It is handled, the hole wall of the second through-hole is recessed.Wherein, positive etchback amount control is at 20-30 μm；Multilayer produces the positive and negative difference of plate
Cross 1 plasma removing glue；Every batch of is required to do first plate before making, and needs to do the positive etchback effect that slice confirms plasma removing glue
Fruit；The technological parameter of plasma removing glue method is as follows：Power is 2300W, time 60min, CF4For 1000sccm, O2For
800sccm.Slice analysis is carried out after plasma removing glue.
(20) outer layer pre-treatment：Outer layer pre-treatment is followed successively by：Washing is lost with the glass fibre etching solution of 7-13g/L
It carves, wash, carry out pickling with the sulfuric acid of 120-160g/L；The reaction temperature of etching and pickling is 42 DEG C in outer layer pre-treatment, instead
It is 3min between seasonable.Multilayer production plate does slice analysis after carrying out outer layer pre-treatment.
Glass fibre etching solution is grouped as by each group of following mass parts：60 parts of water, 30 parts of a concentration of 95-98wt% it is dense
The hydrofluoric acid of sulfuric acid, 50 parts of a concentration of 40-45wt%.
(21) heavy copper/electric plating of whole board：It is carried out by the way of bevelling plating, makes the second via metal.Electroplating parameter is
1.2ASD × 45min, the electroplating parameter plated again after bevelling are 1.2ASD × 45min.
(22) hole pattern/plated hole is plated：Second through-hole and other through-holes are opened a window together and carry out a plating, just by the prior art
Often make；Hole copper is set to reach design requirement, the hole copper thickness of the second through-hole is greater than or equal to 25 μm, and average value is 30 μm.
Plated hole carries out slice analysis to multilayer production plate.
(23) filling holes with resin/abrasive belt grinding：The resin ink used is mountain honor PHP-900IR-6P rabbet inks；Using choosing
Selecting property vacuum taphole machine operation, to ensure that 100% fills up；Abrasive belt grinding ensures that the resin mill produced multilayer on plate is clean, table
Copper thickness is controlled at 35 ± 5 μm；It controls coated copper and presses 2 grades of standards of IPC, the present embodiment, which is pressed, is greater than or equal to 7 μm of controls.Abrasive band
Slice analysis is carried out to multilayer production plate after nog plate.
(24) the heavy copper/electric plating of whole board of outer layer：Chemistry removing glue is primary；Copper facing thickness control ensures to complete copper at 15 μm or so
Thickness meets the requirement of design, and 38.4 μm minimum；Electroplating parameter：1.3ASD×60min.
(25) outer graphics：It is aligned and is exposed using LDI, level to level alignment degree is controlled in ± 25um；Confirm pre-treatment microetch amount
0.6-1.2 μm, pre-treatment speed 2.5m/min, pad pasting speed 2.7m/min does not allow to cut film.
(26) outer layer negative film etching/secondary drilling/outer layer AOI：Outer layer is made on multilayer production plate using negative film technique
Then circuit carries out secondary drilling to multilayer production plate, drills out non-metallic hole.
(27) silk-screen welding resistance：Solder mask and silk-screen word are made according to the prior art and by design requirement on multilayer production plate
Symbol.Wherein, solder mask PSR-4000_MPHF/CA-40_MPHF；Before silk-screen welding resistance with needed after silk-screen welding resistance to multilayer produce
Plate carries out cleanliness testing；Line face maximum resist thickness is 50um；Good plate returns mill, and on-gauge plate is to be printed no more than 4 in dust-free room
Hour, otherwise return mill.
(28) surface treatment (heavy nickel gold)：In the nickel gold of the copper face uniform deposition design requirement thickness of welding resistance windowing position, most
Small nickel is 3 μm thick, and minimum gold is 0.05 μm thick.
(29) electric performance test：Flying probe machine check multilayer produces the electric property of plate, detection multilayer production plate
Electric property detects qualified multilayer production plate and enters next processing link.
(30) it is molded：According to the prior art and design requirement gong shape is pressed, external form tolerance+0.05mm is made with just recessed
Lose the wiring board of filling holes with resin.
(31)FQC：According to customs inspection standard and our company test stone, examined to printed circuit board appearance is just recessed
It looks into, such as defective timely repairing ensures to provide excellent quality control for client.
(32)FQA：Appearance, measured hole copper thickness, thickness of dielectric layers, green oil thickness, internal layer copper thickness etc. are taken a sample test again.
(33) it packs：By customer requirement, it is sealed packaging to printed circuit board is just recessed, and be allowed to dry drying prescription and humidity
Card；Shipment.
It is described above only with embodiment come the technology contents that further illustrate the present invention, in order to which reader is easier to understand,
But embodiments of the present invention are not represented and are only limitted to this, any technology done according to the present invention extends or recreation, is sent out by this
Bright protection.
Claims (10)
1. production method is just recessed in a kind of wiring board, which is characterized in that include the following steps：
The processing of S1 multilayer daughter boards：
The core plate for having made internal layer circuit is press-fitted together as one by prepreg, forms multilayer daughter board；
First through hole is bored on multilayer daughter board, the first through hole is used to become metalized blind vias/metallization after following process
Buried via hole；
Then multilayer daughter board is handled using plasma removing glue method, the hole wall of first through hole is recessed, etchback amount is 20-30 μ
m；
Then internal layer pre-treatment is carried out to multilayer daughter board, the internal layer pre-treatment is followed successively by：Washing, with the glass fibers of 7-13g/L
Dimension etching solution is etched, washes, carrying out pickling with the sulfuric acid of 120-160g/L；The reaction of etching and pickling in outer layer pre-treatment
Temperature is 42 DEG C, reaction time 3min；
Internal layer copper-coating is carried out followed by multilayer daughter board, the pre-treatment of the internal layer copper-coating is followed successively by：Oil removing, water
It washes, pickling, washing, microetch, washing, activation, washing, speed eliminate Sn (OH) Cl, washing；
Electric plating of whole board processing is carried out to multilayer daughter board, electro-coppering thickness is 20 ± 5 μm, and first through hole is made to metallize；
Carry out plating hole pattern, plated hole, filling holes with resin, abrasive belt grinding, heavy copper, full plate successively on multilayer daughter board according to the prior art
The multilayer daughter board that there is internal layer circuit and first through hole to be loaded with resin is made in the processing that plating, inner figure, internal layer etch；
S2 multilayers produce the processing of plate：
Different multilayer daughter boards is press-fitted together as one by prepreg, multilayer is formed and produces plate；The first through hole after pressing
It is processed to metalized blind vias/metallization buried via hole；
The second through-hole is bored on multilayer production plate, second through-hole is used to become plated-through hole after following process；
Then it uses plasma removing glue method to handle multilayer production plate, the hole wall of the second through-hole is recessed, etchback amount is 20-30
μm；
Then outer layer pre-treatment is carried out to multilayer production plate, the outer layer pre-treatment is followed successively by：Washing, with the glass of 7-13g/L
Fiber etching solution is etched, washes, carrying out pickling with the sulfuric acid of 120-160g/L；It is etched in outer layer pre-treatment anti-with pickling
It is 42 DEG C to answer temperature, reaction time 3min；
Heavy copper and electric plating of whole board processing are carried out followed by multilayer production plate, makes the second via metal；
Plating hole pattern, plated hole are carried out successively on multilayer production plate according to the prior art, filling holes with resin, sand are carried out to the second through-hole
Processing with nog plate, heavy copper, electric plating of whole board；
Then negative film technique is used to make outer-layer circuit on multilayer production plate；
Process after S3：Process is processed after being carried out to multilayer production plate according to the prior art, is bored on multilayer production plate non-metallic
Solder mask is made behind hole successively and is surface-treated, circuit board finished product is made after molding.
2. production method is just recessed in a kind of wiring board according to claim 1, which is characterized in that described to more in step S1
Straton plate is carried out electric plating of whole board processing and is carried out by the way of bevelling plating, and technological parameter is：Current density is 1.2ASD, plating
Time is 45min, and the current density plated again after bevelling is 1.2ASD, electroplating time 45min.
3. production method is just recessed in a kind of wiring board according to claim 2, which is characterized in that in step S1, the use
The technological parameter that plasma removing glue method handles multilayer daughter board is as follows：Power is 2300W, CF4For 1000sccm, O2For
800sccm。
4. production method is just recessed in a kind of wiring board according to claim 3, which is characterized in that in step S1, using etc. from
When sub- removing glue method handles multilayer daughter board, the two sides of multilayer daughter board respectively carries out single treatment with plasma removing glue method.
5. production method is just recessed in a kind of wiring board according to claim 4, which is characterized in that in step S1, the plated hole
In process, the hole copper thickness for controlling first through hole is greater than or equal to 25 μm.
6. production method is just recessed in a kind of wiring board according to claim 1, which is characterized in that described to more in step S2
Layer production plate is carried out electric plating of whole board processing and is carried out by the way of bevelling plating, and technological parameter is：Current density is 1.2ASD, electricity
The plating time is 45min, and the current density plated again after bevelling is 1.2ASD, electroplating time 45min.
7. production method is just recessed in a kind of wiring board according to claim 6, which is characterized in that in step S2, the use
The technological parameter that plasma removing glue method handles multilayer production plate is as follows：Power is 2300W, CF4For 1000sccm, O2For
800sccm。
8. production method is just recessed in a kind of wiring board according to claim 7, which is characterized in that in step S2, using etc. from
When sub- removing glue method handles multilayer production plate, the two sides of multilayer production plate is respectively once located with plasma removing glue method
Reason.
9. production method is just recessed in a kind of wiring board according to claim 8, which is characterized in that in step S2, the plated hole
In process, the hole copper thickness of the second through-hole of control is greater than or equal to 25 μm.
10. production method is just recessed according to a kind of any one of the claim 1-9 wiring boards, which is characterized in that step S1 and
Glass fibre etching solution described in step S2 is grouped as by each group of following mass parts：60 parts of water, 30 parts of a concentration of 95-
The hydrofluoric acid of the concentrated sulfuric acid of 98wt%, 50 parts of a concentration of 40-45wt%.
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| CN201810246860.1A CN108449889A (en) | 2018-03-23 | 2018-03-23 | Production method is just recessed in a kind of wiring board |
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| CN201810246860.1A CN108449889A (en) | 2018-03-23 | 2018-03-23 | Production method is just recessed in a kind of wiring board |
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| CN201810246860.1A Pending CN108449889A (en) | 2018-03-23 | 2018-03-23 | Production method is just recessed in a kind of wiring board |
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| CN109548321A (en) * | 2018-12-10 | 2019-03-29 | 江门崇达电路技术有限公司 | A kind of production method of positive etchback PCB |
| CN109688731A (en) * | 2018-09-30 | 2019-04-26 | 广州兴森快捷电路科技有限公司 | The preparation method of printed circuit board |
| CN110430672A (en) * | 2019-07-04 | 2019-11-08 | 珠海崇达电路技术有限公司 | A kind of boring method of the circuit board using PTFE substrate |
| CN113038714A (en) * | 2021-03-08 | 2021-06-25 | 浙江万正电子科技有限公司 | Multilayer circuit board positive pitting process and aerospace high-reliability high-temperature-resistant multilayer circuit board |
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