CN108447901A - A kind of anti-integral dose radiation PNP transistor structure - Google Patents

A kind of anti-integral dose radiation PNP transistor structure Download PDF

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Publication number
CN108447901A
CN108447901A CN201810168020.8A CN201810168020A CN108447901A CN 108447901 A CN108447901 A CN 108447901A CN 201810168020 A CN201810168020 A CN 201810168020A CN 108447901 A CN108447901 A CN 108447901A
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pnp transistor
dose radiation
traps
substrate
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CN201810168020.8A
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CN108447901B (en
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刘智
姜洪雨
葛梅
梁希
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Xian Microelectronics Technology Institute
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Xian Microelectronics Technology Institute
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73Bipolar junction transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Light Receiving Elements (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

The present invention discloses a kind of anti-integral dose radiation PNP transistor structure, including p-substrate and the n traps that are arranged in p-substrate;2nd areas p+ of setting and n traps interval in p-substrate;The first areas p+ and the injection regions n+ are respectively provided in n traps;It is surrounded with annular polysilicon gate outside first areas p+.The present invention is compared with stand CMOS PNP transistor, as a result of annular polysilicon around the first areas p+, to completely avoid the p n+ knots that thick field oxide in the prior art is formed, total extreme is eliminated, so that the preventing total dose radiation ability of CMOS band-gap references using the present invention reachable 300krad (Si) under 50rad (Si)/s dosage rates.

Description

A kind of anti-integral dose radiation PNP transistor structure
Technical field
The present invention relates to anti-integral dose radiation effect radiation hardened field, specially a kind of anti-integral dose radiation PNP crystal Pipe structure.
Background technology
When device persistently by ionising radiation (such as gamma-rays and X-ray) when, will produce total extreme.Total Under the conditions of dose, a certain number of electron-hole pairs of ionization generation in silica dioxide medium.When there is electric field action, Accumulation forms oxide-trapped charge and heterointerface state charge in silica, to be had an impact to the performance of device.
CMOS band-gap references are widely applied modules in CMOS Analogous Integrated Electronic Circuits.Its performance is dependent on positively biased state Pn-junction characteristic.Band-gap reference circuit is smaller and smaller with the characteristic size of CMOS technology, sensibility of the circuit to integral dose radiation It is increasing.Main cause is that the radiation injury of PNP transistor causes reference voltage ripple.In n trap CMOS technologies, band gap base The PNP transistor applied in standard its as shown in Figure 1.The areas n trap Zhong p+ are (identical as the source and drain of PMOS transistor) to be used as emitter E, n trap 2 itself is used as base stage B, and p-substrate 1 is as collector C.
Referring to Fig. 1, in integral dose radiation environment, 3 trapped hole of isolation camp oxygen layer, and close to SiO2The interfaces /Si SiO2The boundary of side accumulates, and induction forms a parasitic pn+ different from conventional pn-junction characteristic and ties, and simultaneously with main diode Connection.Since the excess electron concentration of 3 lower section radioinduction of field oxygen layer depends on radiation intergal dose, under radiation environment, always The I/V characteristics of diode just have sizable drift, to cause reference output voltage unstable.
Invention content
For problems of the prior art, the present invention provides a kind of anti-integral dose radiation PNP transistor structure, structure Simply, reasonable design, preventing total dose radiation ability is strong, can completely avoid the p-n+ knots of thick field oxide formation.
The present invention is to be achieved through the following technical solutions:
A kind of anti-integral dose radiation PNP transistor structure, including p-substrate and the n traps that are arranged in p-substrate;
2nd areas p+ of setting and n traps interval in the p-substrate;
It is respectively provided with the first areas p+ and the injection regions n+ in the n traps;It is surrounded with annular outside first areas p+ Polysilicon gate.
Preferably, it is covered with grid oxide layer on p-substrate and n traps.
Further, annular polysilicon gate is arranged above grid oxide layer and corresponding first areas p+ are in around arrangement.
Preferably, the injection regions n+ and the 2nd areas p+ are arranged in a ring.
Preferably, the first areas p+ and the injection regions n+ can be isolated in the width of annular polysilicon gate.
Preferably, the thickness of annular polysilicon gate is less than 1500 Ethylmercurichlorendimides.
Preferably, annular polysilicon gate is made based on CMOS technology.
Compared with prior art, the present invention has technique effect beneficial below:
The present invention surround the first areas p+ compared with stand CMOS PNP transistor, as a result of annular polysilicon, To completely avoid the p-n+ knots that thick field oxide in the prior art is formed, total extreme is eliminated, so that adopting With the preventing total dose radiation ability of CMOS band-gap references of the invention up to 300krad (Si) under 50rad (Si)/s dosage rates.
Further, oxide generates oxide charge and heterointerface state charge after by ionising radiation in MOS device, Total amount of electric charge declines with grid oxygen layer thickness at power exponent.Therefore, relatively thin gate oxide generated in irradiation defect charge also compared with It is few, reduce total dose irradiation influence.
Further, annular polysilicon gate, which is arranged on grid oxide layer top structure, is similar to a MOS type device, and grid connect Ground cannot be opened, but its structure eliminates total dose irradiation influence.
Further, setting can completely eliminate thick field oxide in a ring for the injection regions n+ and the 2nd areas p+, improve device Anti- ionization total-dose radiation effect influences.
Description of the drawings
Fig. 1 is typical case N traps CMOS technology parasitic-PNP transistor sectional view in the prior art.
Fig. 2 is anti-integral dose radiation PNP transistor structure top view of the present invention.
Fig. 3 is anti-integral dose radiation PNP transistor cross-sectional view of the structure of the present invention.
Fig. 4 is N trap CMOS band-gap reference examples.
In figure:P-substrate 1, n traps 2, field oxygen layer 3, the first areas p+ 4, the 2nd areas p+ 5, the injection regions n+ 6, grid oxide layer 7, annular Polysilicon gate 8.
Specific implementation mode
With reference to specific embodiment, the present invention is described in further detail, it is described be explanation of the invention and It is not to limit.
The present invention provides a kind of anti-integral dose radiation PNP transistor structure, is a kind of ruggedized construction of PNP transistor, It is based on deep-submicron CMOS process, using commercial process, is inhibited by ionising radiation total dose effect with the area cost of very little Caused PNP transistor performance degradation improves the ability of CMOS band-gap reference anti-integral dose radiation effects.Using around the first p+ Area 4 be arranged annular polysilicon 8, to completely avoid thick field oxide formation p-n+ knot, eliminate conventional PNP transistor knot The total extreme of structure.
As shown in Figures 2 and 3, the specific present invention includes that spaced first areas p+ 4, n+ are noted successively outward from center Enter area 6 and the 2nd areas p+ 5;It is provided with n traps 2 on p-substrate 1, grid oxide layer 7 is covered on p-substrate 1 and n traps 2;First areas p+ 4 It is located in n traps 2 with the injection regions n+ 6, the 2nd areas p+ 5 are located in p-substrate 1, and the setting of annular polysilicon gate 8 is right on grid oxide layer 7 It is in around arrangement to answer the first areas p+ 4.As shown in Fig. 2, the structure is mutually compatible with CMOS technology.It is complete because using annular polysilicon gate 8 The full p-n+ knots for avoiding thick field oxide formation, eliminate total extreme.Total dose irradiation test result shows using this The reference circuit of device has preferable radiation resistance.Preventing total dose radiation ability is reachable under 50rad (Si)/s dosage rates 300krad(Si)。
In order to verify the characteristic of structure of the present invention, N traps CMOS band-gap references example is as shown in figure 4, its Q1 and Q2 are adopted Anti-integral dose radiation PNP transistor is proposed with the present invention.
Total dose irradiation test result shows there is preferable radiation resistance using the reference circuit of the device.It is anti-total Dose delivery ability is under 50rad (Si)/s dosage rates up to 300krad (Si).

Claims (7)

1. a kind of anti-integral dose radiation PNP transistor structure, which is characterized in that including p-substrate (1) and be arranged in p-substrate (1) the n traps (2) in;
2nd areas p+ (5) of setting and n traps (2) interval in the p-substrate (1);
It is respectively provided with the first areas p+ (4) and the injection regions n+ (6) in the n traps (2);First areas p+ (4) outer shroud winding It is equipped with annular polysilicon gate (8).
2. a kind of anti-integral dose radiation PNP transistor structure according to claim 1, which is characterized in that p-substrate (1) With grid oxide layer (7) is covered on n traps (2).
3. a kind of anti-integral dose radiation PNP transistor structure according to claim 2, which is characterized in that annular polysilicon Grid (8) setting is above grid oxide layer (7) and corresponding first areas p+ (4) are in around arrangement.
4. a kind of anti-integral dose radiation PNP transistor structure according to claim 1, which is characterized in that the injection regions n+ (6) It is arranged in a ring with the 2nd areas p+ (5).
5. a kind of anti-integral dose radiation PNP transistor structure according to claim 1, which is characterized in that annular polysilicon The first areas p+ (4) and the injection regions n+ (6) can be isolated in the width of grid (8).
6. a kind of anti-integral dose radiation PNP transistor structure according to claim 1, which is characterized in that annular polysilicon The thickness of grid (8) is less than 1500 Ethylmercurichlorendimides.
7. a kind of anti-integral dose radiation PNP transistor structure according to claim 1, which is characterized in that annular polysilicon Grid (8) are made based on CMOS technology.
CN201810168020.8A 2018-02-28 2018-02-28 Total dose radiation resistant PNP transistor structure Active CN108447901B (en)

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109585531A (en) * 2018-11-29 2019-04-05 中国电子科技集团公司第四十七研究所 The metal-oxide-semiconductor field effect transistor of resistant to total dose effect
CN110828549A (en) * 2019-11-14 2020-02-21 西安微电子技术研究所 Guard ring doped anti-radiation transistor structure and preparation method thereof
CN110854179A (en) * 2019-11-14 2020-02-28 西安微电子技术研究所 Radiation-reinforced silicon-based bipolar transistor structure based on self-built electric field and preparation method
CN112366246A (en) * 2020-11-09 2021-02-12 电子科技大学 Radiation particle detector device structure
CN113410306A (en) * 2021-06-15 2021-09-17 西安微电子技术研究所 Total dose radiation resistant reinforced LDMOS device structure and preparation method thereof

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Publication number Priority date Publication date Assignee Title
US5869850A (en) * 1996-12-13 1999-02-09 Kabushiki Kaishia Toshiba Lateral insulated gate bipolar transistor
CN1536667A (en) * 2003-04-07 2004-10-13 ������������ʽ���� Semiconductor device
CN104051508A (en) * 2013-03-14 2014-09-17 凌力尔特公司 Bipolar transistor with lowered 1/F noise

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5869850A (en) * 1996-12-13 1999-02-09 Kabushiki Kaishia Toshiba Lateral insulated gate bipolar transistor
CN1536667A (en) * 2003-04-07 2004-10-13 ������������ʽ���� Semiconductor device
CN104051508A (en) * 2013-03-14 2014-09-17 凌力尔特公司 Bipolar transistor with lowered 1/F noise

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
刘智等.: "抗辐射加固CMOS基准设计", 《太赫兹科学与电子信息学报》 *

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109585531A (en) * 2018-11-29 2019-04-05 中国电子科技集团公司第四十七研究所 The metal-oxide-semiconductor field effect transistor of resistant to total dose effect
CN109585531B (en) * 2018-11-29 2022-03-15 中国电子科技集团公司第四十七研究所 MOS field effect transistor for resisting total dose effect
CN110828549A (en) * 2019-11-14 2020-02-21 西安微电子技术研究所 Guard ring doped anti-radiation transistor structure and preparation method thereof
CN110854179A (en) * 2019-11-14 2020-02-28 西安微电子技术研究所 Radiation-reinforced silicon-based bipolar transistor structure based on self-built electric field and preparation method
CN110828549B (en) * 2019-11-14 2022-08-16 西安微电子技术研究所 Guard ring doped anti-radiation transistor structure and preparation method thereof
CN110854179B (en) * 2019-11-14 2023-04-25 西安微电子技术研究所 Radiation-reinforced silicon-based bipolar transistor structure based on self-built electric field and preparation method
CN112366246A (en) * 2020-11-09 2021-02-12 电子科技大学 Radiation particle detector device structure
CN113410306A (en) * 2021-06-15 2021-09-17 西安微电子技术研究所 Total dose radiation resistant reinforced LDMOS device structure and preparation method thereof

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