CN110854179B - Radiation-reinforced silicon-based bipolar transistor structure based on self-built electric field and preparation method - Google Patents

Radiation-reinforced silicon-based bipolar transistor structure based on self-built electric field and preparation method Download PDF

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CN110854179B
CN110854179B CN201911114902.7A CN201911114902A CN110854179B CN 110854179 B CN110854179 B CN 110854179B CN 201911114902 A CN201911114902 A CN 201911114902A CN 110854179 B CN110854179 B CN 110854179B
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bipolar transistor
silicon
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CN110854179A (en
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王清波
薛东风
赵杰
薛智民
孙有民
杜欣荣
卓青青
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Xian Microelectronics Technology Institute
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234Bipolar junction transistors [BJT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73Bipolar junction transistors
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Abstract

The invention discloses a radiation-reinforced silicon-based bipolar transistor structure based on a self-built electric field and a preparation method thereof, wherein the structure is formed by multilayer wiring: a ground potential layer communicated with the lowest potential is formed on the surface of the transistor through a multilayer wiring process, so that a self-built electric field pointing to the ground potential layer is formed in the silicon dioxide insulating layer between each doped region of the transistor and the ground potential layer. The self-built electric field inhibits positive charges generated by total dose radiation in the silicon dioxide insulating layer from moving to the silicon-silicon dioxide interface, so that the number of positive charges which are induced by the radiation and reach the silicon-silicon dioxide interface and form new interface states is reduced, and the total dose radiation resistance of the bipolar transistor is improved.

Description

Radiation-reinforced silicon-based bipolar transistor structure based on self-built electric field and preparation method
Technical Field
The invention belongs to the technical field of silicon-based transistors, and particularly relates to a radiation-reinforced silicon-based bipolar transistor structure based on a self-built electric field and a preparation method thereof.
Background
The conventional silicon-based bipolar transistor comprises an NPN transistor and a PNP transistor, the structure is that selective P-type or N-type impurity doping is carried out in different areas in a silicon substrate or an epitaxial layer to form an NPN or PNP structure, a final transistor structure is realized through a lead, and meanwhile, a silicon dioxide layer is required to be covered on the surface of the transistor and used as an insulating layer between a metal lead and a doped area of the transistor so as to avoid short circuit generated between different doped areas of the transistor through metal connection wires.
When the silicon-based bipolar transistor is irradiated with total dose, the irradiation ionization effect can cause a large amount of radiation induced positive charges in the silicon dioxide insulating layer on the surface of the transistor, and when the positive charges move to the silicon-silicon dioxide interface, new interface states can be generated by reaction with dangling bonds at the interface, so that the recombination center on the surface of the base region of the transistor is increased, the transistor recombination current is increased, the gain is reduced, and then the transistor is disabled under the action of the total dose of radiation.
Disclosure of Invention
The invention provides a self-built electric field-based radiation-reinforced silicon-based bipolar transistor structure and a preparation method thereof.
In order to achieve the above purpose, the radiation-reinforced silicon-based bipolar transistor structure based on the self-built electric field comprises a bipolar transistor main body, an insulating layer, a ground potential layer, an insulating medium layer and a circuit wiring interconnection layer which are sequentially arranged from bottom to top; the bipolar transistor main body is a doped silicon wafer; the insulation layer covers the upper surface of the bipolar transistor main body, a potential electrode contact window and a bipolar transistor electrode leading-out contact window are formed in the insulation layer, a ground potential layer is covered on the upper surface of the insulation layer, and the ground potential layer comprises a ground potential electrode and a plurality of bipolar transistor leading-out electrodes; the upper surface of the ground potential layer is covered with an insulating medium layer, an electrode leading-out contact window is formed in the insulating medium layer, the upper surface of the insulating medium layer is covered with a circuit wiring interconnection layer, and the circuit wiring interconnection layer is connected with a bipolar transistor leading-out electrode through the electrode leading-out contact window.
Further, the ground potential layer is made of aluminum-silicon-copper or doped polysilicon.
Further, the circuit wiring interconnection layer is formed of aluminum silicon copper.
Further, the insulating layer is made of silicon dioxide, and the thickness is +/-10%.
Further, the insulating dielectric layer is made of silicon dioxide, and the thickness is +/-10%.
The preparation method of the radiation-reinforced silicon-based bipolar transistor structure based on the self-built electric field comprises the following steps:
step 1, carrying out impurity selective doping in different areas on a silicon wafer to obtain a bipolar transistor main body, and then forming an insulating layer on the bipolar transistor main body;
step 2, etching the insulating layer to form a ground potential electrode contact window and a bipolar transistor electrode leading-out contact window;
step 3, depositing a first metal layer on the surface of the product prepared in the step 2;
step 4, etching the first metal layer to form a ground potential layer;
step 5, forming an intermetallic insulating medium layer on the product prepared in the step 4 by chemical vapor deposition;
step 6, etching the inter-metal insulating dielectric layer to form a bipolar transistor electrode leading-out contact window;
step 7, depositing a second metal layer on the surface of the product obtained in the step 6;
and 8, etching the second metal layer to form a circuit wiring interconnection layer.
In step 3, the material of the first metal layer is aluminum silicon copper or doped polysilicon.
Compared with the prior art, the invention has at least the following beneficial technical effects:
aiming at the influence mechanism of total dose radiation on a silicon-based bipolar transistor, a ground potential layer communicated with the lowest potential is formed on the surface of the transistor through a multilayer wiring process, so that a self-built electric field pointing to the ground potential layer is formed in a silicon dioxide insulating layer between each doped region of the transistor and the ground potential layer, the self-built electric field inhibits positive charges generated by the total dose radiation in the silicon dioxide layer from moving towards a silicon-silicon dioxide interface, the number of positive charges induced by the radiation reaching the silicon-silicon dioxide interface and forming new interface states is reduced, and the total dose radiation resistance of the bipolar transistor is improved.
Furthermore, the ground potential layer is made of aluminum silicon copper or doped polysilicon, the aluminum silicon copper and the doped polysilicon are the most commonly used materials of the first interconnection wiring layer in the silicon-based bipolar transistor manufacturing process, and the ground potential layer can be compatible with a mature silicon-based bipolar process by adopting the two materials, so that the process cost and the process difficulty are reduced.
Furthermore, the circuit wiring interconnection layer is formed by aluminum-silicon-copper (pure aluminum, aluminum-silicon and aluminum-copper), which is the interconnection wiring material most commonly used in the silicon-based bipolar transistor manufacturing process, and the aluminum-silicon-copper is selected as the circuit wiring interconnection layer, so that the circuit wiring interconnection layer is compatible with the mature silicon-based bipolar process, and the process cost and the process difficulty are reduced.
Further, the insulating layer is made of silicon dioxide, the thickness is (500 nm-800 nm) +/-10%, and the silicon dioxide with the thickness range has lower process cost and process difficulty on the premise of ensuring the insulating effect.
Further, the insulating medium layer is made of silicon dioxide, the thickness of the insulating medium layer is (500 nm-800 nm) +/-10%, and the silicon dioxide within the thickness range has lower process cost and process difficulty on the premise of ensuring the insulating effect.
The preparation method of the radiation reinforced silicon-based bipolar transistor based on the self-built electric field realizes the self-built electric field bipolar transistor structure through a mature silicon-based transistor multilayer wiring process, is completely compatible with the existing silicon-based transistor manufacturing process, and has the advantages of mature and controllable process and low cost and process difficulty on the premise of ensuring the performance and reliability of the device.
Drawings
Fig. 1: a bipolar transistor of conventional structure in longitudinal cross-section;
fig. 2: a top view of a bipolar transistor of conventional structure;
fig. 3: a vertical section view of a bipolar transistor with a self-built electric field structure;
fig. 4: a top view of a self-built electric field structure bipolar transistor;
fig. 5: the traditional bipolar process completes the selective doping of impurities in different areas, forms a bipolar transistor structure and forms a silicon dioxide insulating layer;
fig. 6: photoetching and etching to form a ground potential electrode contact and a bipolar transistor electrode leading-out contact window on the silicon dioxide insulating layer;
fig. 7: depositing metal or doped polysilicon as a ground potential layer and a transistor extraction electrode;
fig. 8: photoetching and etching to form a ground potential layer, wherein all other areas except the extraction electrode on the surface of the transistor are covered by the ground potential layer, and the ground potential layer is connected with a P-type isolation region of the bipolar transistor through a contact extraction window so as to ensure that the circuit is at the lowest potential during operation;
fig. 9: depositing a silicon dioxide insulating layer among multiple layers of wiring;
fig. 10: photoetching and etching to form a bipolar transistor electrode leading-out contact window;
fig. 11: depositing to form interconnection metal;
fig. 12: and photoetching to form a metal interconnection pattern.
In the accompanying drawings: 101—an N-type epitaxial layer of an NPN transistor; 102—an N-type epitaxial layer of a PNP transistor; 2-P type isolation region; 3-P-type silicon substrate; 41-NPN transistor P-type base region; 42—pnp transistor P-collector region; 43-PNP transistor P-type emitter; 51—npn transistor N-type emitter; 52—an N-type epitaxial lead-out region for NPN transistors; 6-a silicon dioxide insulating layer; 7-metal interconnect lines; 8-a ground potential layer; 81—a ground electrode; 82-bipolar transistor extraction electrode, 10-first metal layer; 11—an intermetallic insulating medium; 12-electrode lead-out contact window; 13-aluminum silicon copper metal layer; 14-an N-type buried layer.
Detailed Description
In order to make the purpose and technical scheme of the invention clearer and easier to understand. The present invention will now be described in further detail with reference to the drawings and examples, which are given for the purpose of illustration only and are not intended to limit the invention thereto.
In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, are merely for convenience in describing the present invention and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present invention, unless otherwise indicated, the meaning of "a plurality" is two or more. In the description of the present invention, it should be noted that, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be either fixedly connected, detachably connected, or integrally connected, for example; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communication between two elements. The specific meaning of the above terms in the present invention will be understood in specific cases by those of ordinary skill in the art.
As shown in fig. 1 and 2, the NPN bipolar transistor of the conventional structure includes an NPN transistor and a PNP transistor, the NPN transistor and the PNP transistor share a P-type silicon substrate 3, a P-type isolation region 2 separates the NPN transistor and the PNP transistor above the P-type silicon substrate 3, and an N-type emitter 51, an N-type epitaxial drain 52, and a P-type collector 41 of the NPN transistor are provided on an upper portion of an N-type epitaxial layer 101 of the NPN transistor; the upper part of the N-type epitaxial layer 102 of the PNP transistor is provided with a PNP transistor P-type collector region 42 and a PNP transistor P-type emitter region 43. The uppermost end of the NPN bipolar transistor is a silicon dioxide insulating layer 6 and a metal interconnection line 7.
Aiming at the influence mechanism of total dose radiation on a silicon-based bipolar transistor, the invention provides a novel bipolar transistor junction which improves the total dose radiation resistance of the transistor through a self-built electric field, and the novel bipolar transistor junction is formed through multilayer wiring: a ground potential layer communicated with the lowest potential is formed on the surface of the transistor through a multilayer wiring process, so that a self-built electric field pointing to the ground potential layer is formed in the silicon dioxide insulating layer between each doped region of the transistor and the ground potential layer. The self-built electric field inhibits positive charges generated by total dose radiation in the silicon dioxide insulating layer from moving to the silicon-silicon dioxide interface, so that the number of positive charges which are induced by the radiation and reach the silicon-silicon dioxide interface and form new interface states is reduced, and the total dose radiation resistance of the bipolar transistor is improved.
Example 1
The radiation-reinforced silicon-based bipolar transistor structure based on the self-built electric field comprises a bipolar transistor main body 100, a silicon dioxide insulating layer 6, a ground potential layer 8, an insulating dielectric layer 11 and a circuit wiring interconnection layer 7 which are sequentially arranged from bottom to top. The bipolar transistor body is a doped silicon wafer. The insulating layer 6 covers the upper surface of the bipolar transistor main body 100, a ground potential electrode contact window and a bipolar transistor electrode lead-out contact window are formed in the silicon dioxide insulating layer 6, a ground potential layer 8 is covered on the upper surface of the silicon dioxide insulating layer 6, and the ground potential layer 8 comprises a ground potential electrode 81 and a plurality of bipolar transistor lead-out electrodes 82; the ground potential layer 8 is provided with a groove for accommodating the binding post, the upper surface of the ground potential layer 8 is covered with an insulating medium layer 11, the insulating medium layer 11 is provided with an electrode leading-out contact window 12, the upper surface of the insulating medium layer 11 is covered with a circuit wiring interconnection layer 7, and the circuit wiring interconnection layer 7 is connected with a bipolar transistor leading-out electrode 82 through the electrode leading-out contact window 12.
Wherein the ground potential layer 8 is formed by sputtering aluminum-silicon-copper, and the thickness is 550nm plus or minus 10 percent.
The metal 2 level forms a circuit wiring interconnection layer 7; the material of the insulating layer 6 between the ground potential layer 8 and the bipolar transistor main body 100 is silicon dioxide, and the thickness is 800nm; the insulating layer material between the circuit wiring interconnection layer 7 and the ground potential layer 8 is silicon dioxide, the thickness is 800nm plus or minus 10%, the material of the circuit wiring interconnection layer 7 is aluminum silicon copper, and the thickness is 1.5 mu m plus or minus 10%.
Compared with the bipolar transistor with the traditional structure, the bipolar transistor with the self-built electric field structure has the advantages that after the total radiation dose of 100krad (Si), the amplification factor attenuation of the NPN transistor is reduced from 41% to 27%, the amplification factor attenuation of the PNP transistor is reduced from 29% to 12%, and the bipolar transistor with the self-built electric field structure has higher total radiation dose resistance.
A preparation method of a radiation-reinforced silicon-based bipolar transistor based on a self-built electric field comprises the following steps:
step 1, referring to fig. 5, impurity selective doping of different regions is completed through a conventional bipolar process to form a bipolar transistor body 100, and a silicon dioxide insulating layer 6 is formed on the upper surface of the bipolar transistor body 100;
step 2. Referring to FIG. 6, a photoresist of 1.3 μm is coated on the surface of the silicon dioxide insulating layer 6, and a ground potential electrode contact window 15 and a bipolar transistor electrode extraction contact window 12 are formed by exposure, development and etching, and H is used after etching is completed 2 SO 4 +H 2 O 2 Removing photoresist on the surface of the silicon wafer by using the solution;
step 3, referring to fig. 7, depositing a first metal layer 10 with the thickness of 550nm on the surface of a silicon wafer by a metal sputtering process, wherein the material of the first metal layer 10 is aluminum-silicon-copper;
step 4. Referring to fig. 8, coating 2.2 μm photoresist on the upper surface of the aluminum-silicon-copper metal layer 10, exposing, developing and etching to form a ground potential electrode 81 and a transistor extraction electrode 82, and removing the photoresist coated in the step by plasma etching and an organic solvent cleaning agent solution after metal etching is completed;
step 5. Referring to fig. 9, forming an intermetallic insulating medium 11 by Plasma Enhanced Chemical Vapor Deposition (PECVD), wherein the medium material is silicon dioxide, and the thickness is 800nm;
step 6, referring to fig. 10, coating 1.3 μm photoresist on the surface of an intermetallic insulating medium 11, forming a bipolar transistor electrode leading-out contact window 12 through exposure, development and etching, and removing the photoresist on the surface of the silicon wafer through plasma etching and EKC solution after etching is completed;
step 7, referring to FIG. 11, depositing an aluminum-silicon-copper metal layer 13 with the thickness of 1.5 mu m on the surface of the product obtained in the step 6 through a metal sputtering process;
and 8, referring to FIG. 12, coating 2.2m photoresist on the surface of the product obtained in the step 7, forming a metal interconnection pattern through exposure, development and etching, and removing the photoresist on the surface of the silicon wafer through plasma etching and EKC solution after metal etching is finished.
Example 2
The radiation-reinforced silicon-based bipolar transistor structure based on the self-built electric field comprises a bipolar transistor main body 100, a silicon dioxide insulating layer 6, a ground potential layer 8, an insulating dielectric layer 11 and a circuit wiring interconnection layer 7 which are sequentially arranged from bottom to top. The bipolar transistor body is a doped silicon wafer. The insulating layer 6 covers the upper surface of the bipolar transistor main body 100, a ground potential electrode contact window and a bipolar transistor electrode lead-out contact window are formed in the silicon dioxide insulating layer 6, a ground potential layer 8 is covered on the upper surface of the silicon dioxide insulating layer 6, and the ground potential layer 8 comprises a ground potential electrode 81 and a plurality of bipolar transistor lead-out electrodes 82; the ground potential layer 8 is provided with a groove for accommodating the binding post, the upper surface of the ground potential layer 8 is covered with an insulating medium layer 11, the insulating medium layer 11 is provided with an electrode leading-out contact window 12, the upper surface of the insulating medium layer 11 is covered with a circuit wiring interconnection layer 7, and the circuit wiring interconnection layer 7 is connected with a bipolar transistor leading-out electrode 82 through the electrode leading-out contact window 12.
Wherein the ground potential layer 8 is formed by polysilicon, the thickness of the doped polysilicon is 200nm plus or minus 10%, and Fang Dianzu is 30Ω/≡; the metal aluminum silicon copper layer forms a circuit wiring interconnection layer 7; the insulating layer 6 between the ground potential layer 8 and the bipolar transistor body 100 is silicon dioxide, and the thickness is 500nm plus or minus 10%; the insulating layer material between the circuit wiring interconnection layer 7 and the ground potential layer 8 is silicon dioxide with the thickness of 500nm plus or minus 10 percent, the metal material is aluminum silicon copper with the thickness of 1.5 mu m plus or minus 10 percent.
Compared with the bipolar transistor with the traditional structure, the bipolar transistor with the self-built electric field structure has the advantages that after the total radiation dose of 100krad (Si), the amplification factor attenuation of the NPN transistor is reduced from 41% to 27%, the amplification factor attenuation of the PNP transistor is reduced from 29% to 12%, and the bipolar transistor with the self-built electric field structure has higher total radiation dose resistance.
The structure can be realized by the following method:
step 1, referring to fig. 5, impurity selective doping of different regions is completed through a conventional bipolar process, a bipolar transistor body is formed, and a silicon dioxide insulating layer 6 is formed;
step 2. Referring to FIG. 6, a photoresist of 1.3 μm is coated on the surface of the insulating layer 6, and a ground potential electrode contact and a bipolar transistor electrode lead-out contact window are formed by exposure, development and etching, and H is used after etching is completed 2 SO 4 +H 2 O 2 Removing photoresist on the surface of the insulating layer 6 by using the solution;
step 3, referring to fig. 7, depositing doped polysilicon with the thickness of 200nm on the surface of a silicon wafer by a Low Pressure Chemical Vapor Deposition (LPCVD) process, wherein the square resistance of the polysilicon is 30Ω/≡;
step 4. Referring to FIG. 8, a photoresist of 1.3 μm is coated on the surface of the doped polysilicon, a ground potential layer and a transistor extraction electrode are formed by exposure, development and etching, and then by plasma etching and H 2 SO 4 +H 2 O 2 Removing photoresist on the surface of the doped polysilicon by using the solution;
step 5. Referring to fig. 9, forming an intermetallic insulating medium 11 by Plasma Enhanced Chemical Vapor Deposition (PECVD), wherein the medium material is silicon dioxide, and the thickness is 500nm;
step 6. Referring to FIG. 10, 1.3 μm photoresist is coated on the surface of the inter-metal insulating medium 11, and a bipolar transistor electrode lead-out contact window 12 is formed by exposure, development and etching, and after etching, plasma etching and H are performed 2 SO 4 +H 2 O 2 Removing photoresist by the solution;
step 7, referring to FIG. 11, depositing an aluminum-silicon-copper metal layer 13 with the thickness of 1.5 mu m on the surface of the product obtained in the step 6 through a metal sputtering process;
and 8, referring to FIG. 12, coating 2.2m photoresist on the upper surface of the aluminum-silicon-copper metal layer 13, forming a metal interconnection pattern through exposure, development and etching, and removing the photoresist on the surface of the silicon wafer through plasma etching and EKC solution after metal etching is finished.
The total dose radiation test evaluation is carried out on the novel self-built electric field structure bipolar transistor and the conventional structure bipolar transistor provided by the invention respectively: after 100krad (Si) total dose radiation, the amplification factor of the NPN transistor of the novel self-built electric field structure is attenuated by 27.13%, and the amplification factor of the LPNP transistor is attenuated by 12.90%; the amplification factor attenuation 41.78% of the NPN transistor with the traditional structure and the amplification factor attenuation 29.68% of the LPNP transistor are higher than the total dose radiation resistance of the bipolar transistor with the traditional structure.
Figure GDA0004114593930000091
The above is only for illustrating the technical idea of the present invention, and the protection scope of the present invention is not limited by this, and any modification made on the basis of the technical scheme according to the technical idea of the present invention falls within the protection scope of the claims of the present invention.

Claims (7)

1. The radiation-reinforced silicon-based bipolar transistor structure based on the self-built electric field is characterized by comprising a bipolar transistor main body (100), an insulating layer (6), a ground potential layer (8), an insulating medium layer (11) and a circuit wiring interconnection layer (7) which are sequentially arranged from bottom to top; the bipolar transistor comprises an insulating layer (6), a ground potential layer (8) and a plurality of bipolar transistor extraction electrodes (82), wherein the insulating layer (6) covers the upper surface of a bipolar transistor main body (100), a potential electrode contact window and a bipolar transistor electrode extraction contact window are formed in the insulating layer (6), the upper surface of the insulating layer (6) is covered with the ground potential layer (8), and the ground potential layer (8) comprises a ground potential electrode (81) and a plurality of bipolar transistor extraction electrodes (82); the ground potential layer (8) upper surface covers has insulating medium layer (11), electrode extraction contact window (12) have been seted up on insulating medium layer (11), insulating medium layer (11) upper surface covers has circuit wiring interconnect layer (7), circuit wiring interconnect layer (7) are connected through electrode extraction contact window (12) and bipolar transistor extraction electrode (82).
2. A radiation-hardened silicon-based bipolar transistor structure according to claim 1, characterized in that the material of the ground potential layer (8) is aluminum-silicon-copper or doped polysilicon.
3. A radiation-hardened silicon-based bipolar transistor structure according to claim 1, wherein the circuit wiring interconnect layer (7) is formed of aluminum silicon copper.
4. The self-built electric field-based radiation-hardened silicon-based bipolar transistor structure according to claim 1, wherein the insulating layer (6) is silicon dioxide with a thickness of (500 nm-800 nm) ± 10%.
5. The self-built electric field-based radiation-reinforced silicon-based bipolar transistor structure according to claim 1, wherein the insulating dielectric layer (11) is silicon dioxide with a thickness of (500 nm-800 nm) ± 10%.
6. A method of fabricating a self-built electric field based radiation-hardened silicon-based bipolar transistor structure according to claim 1, comprising the steps of:
step 1, carrying out impurity selective doping in different areas on a silicon wafer to obtain a bipolar transistor main body (100), and then forming an insulating layer (6) on the bipolar transistor main body (100);
step 2, etching on the insulating layer (6) to form a ground potential electrode contact window (15) and a bipolar transistor electrode leading-out contact window (12);
step 3, depositing a first metal layer (10) on the surface of the product prepared in the step 2;
step 4, etching the first metal layer (10) to form a ground potential layer;
step 5, forming an intermetallic insulating medium layer (11) on the product prepared in the step 4 by chemical vapor deposition;
step 6, etching on the inter-metal insulating medium layer (11) to form a bipolar transistor electrode leading-out contact window (12);
step 7, depositing a second metal layer (13) on the surface of the product obtained in the step 6;
and 8, etching the second metal layer (13) to form a circuit wiring interconnection layer (7).
7. The method of fabricating a self-created electric field based radiation-hardened silicon-based bipolar transistor structure according to claim 6, wherein in step 3, the material of the first metal layer (10) is aluminum-silicon-copper or doped polysilicon.
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