CN110828549B - Guard ring doped anti-radiation transistor structure and preparation method thereof - Google Patents
Guard ring doped anti-radiation transistor structure and preparation method thereof Download PDFInfo
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- 230000003471 anti-radiation Effects 0.000 title claims abstract description 7
- 238000002360 preparation method Methods 0.000 title abstract description 7
- 230000005855 radiation Effects 0.000 claims abstract description 27
- 239000012535 impurity Substances 0.000 claims abstract description 22
- 238000000034 method Methods 0.000 claims abstract description 15
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 13
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- 239000007924 injection Substances 0.000 claims abstract description 10
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 19
- 229910052710 silicon Inorganic materials 0.000 claims description 19
- 239000010703 silicon Substances 0.000 claims description 19
- 238000002955 isolation Methods 0.000 claims description 18
- 239000000377 silicon dioxide Substances 0.000 claims description 14
- 235000012239 silicon dioxide Nutrition 0.000 claims description 13
- 239000000758 substrate Substances 0.000 claims description 9
- 238000005468 ion implantation Methods 0.000 claims description 7
- 239000000243 solution Substances 0.000 claims description 5
- 239000011248 coating agent Substances 0.000 claims description 4
- 238000000576 coating method Methods 0.000 claims description 4
- 238000011161 development Methods 0.000 claims description 4
- 238000000137 annealing Methods 0.000 claims description 3
- 238000001020 plasma etching Methods 0.000 claims description 3
- 238000009792 diffusion process Methods 0.000 abstract description 32
- 230000008569 process Effects 0.000 abstract description 9
- 230000000873 masking effect Effects 0.000 abstract description 3
- 230000003321 amplification Effects 0.000 description 8
- 238000003199 nucleic acid amplification method Methods 0.000 description 8
- 230000002829 reductive effect Effects 0.000 description 8
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- 230000002238 attenuated effect Effects 0.000 description 4
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Abstract
The invention discloses a guard ring doped anti-radiation transistor structure and a preparation method thereof, after impurity selective doping of different regions is completed through a traditional bipolar process to form a bipolar transistor structure, P-type impurity injection is carried out on the surface of a transverse diffusion region of a P-type doped region of a transistor through a photoresist masking injection method, an annular P + doped region is formed on the surface of the P-type doped transverse diffusion region, the concentration of P-type impurities on the surface of the P-type doped transverse diffusion region is improved, surface depletion and inversion of the P-type doped region of the bipolar transistor caused by total dose radiation are avoided, and therefore the total dose radiation resistance of the bipolar transistor is improved.
Description
Technical Field
The invention belongs to the technical field of transistor structures, and particularly relates to a guard ring doped anti-radiation transistor structure and a preparation method thereof.
Background
The conventional silicon-based bipolar transistor comprises an NPN transistor and a PNP transistor, wherein the structure is that selective P-type or N-type impurity doping is carried out in different areas of a silicon substrate or an epitaxial layer to form an NPN or PNP structure, the final transistor structure is realized through a lead, and meanwhile, a silicon dioxide layer is required to cover the surface of the transistor and is used as an insulating layer between a metal lead and a transistor doping area to prevent short circuit between different doping areas of the transistor through a metal connecting wire.
When the silicon-based bipolar transistor is radiated with total dose, positive charges are induced and accumulated in a silicon dioxide insulating layer covered on the surface of the transistor due to the radiation ionization effect, so that negative charges are induced on the surface of the transistor, the surface of a P-type doped region (comprising a base region of an NPN transistor and a collector region/emitter region of a PNP transistor) of the bipolar transistor is depleted and even inverted, a field induction junction is formed, particularly, the impurity concentration of the edge region is lower due to the diffusion effect in the transverse edge region of the P-type doped region, and the inversion condition is more easily generated, so that the field induction junction is formed. For an NPN transistor, the surface of the P-type base region is depleted, the surface recombination current is increased, the base current Ib is increased, and beta is reduced; for PNP transistor, P type collector region/emitter region surface depletion/inversion type, and the hole injected into base region is pushed to substrate, hole diffusion distance is increased, base region width W of PNP transistor B Increase, transport coefficient alpha T Decrease, β decreases.
Disclosure of Invention
Aiming at the influence mechanism of total dose radiation on the silicon-based bipolar transistor, the invention provides a novel bipolar transistor structure for improving the surface impurity concentration of a P-type doped region by doping a protection ring and a preparation method thereof, and the total dose radiation resistance of the bipolar transistor can be effectively improved.
In order to achieve the above object, the present invention provides a guard ring doped anti-radiation transistor structure, which includes an NPN transistor and a PNP transistor, wherein the NPN transistor and the PNP transistor share a P-type silicon substrate, and a P-type isolation region separates the NPN transistor and the PNP transistor above the P-type silicon substrate; an NPN transistor N-type emission region, an NPN transistor N-type epitaxial lead-out region and an NPN transistor P-type collector region are arranged on the upper portion of the N-type epitaxial layer of the NPN transistor; the upper part of the N-type epitaxial layer of the PNP transistor is provided with a P-type collector region of the PNP transistor and a P-type emitter region of the PNP transistor; the edge of a P-type base region of the NPN transistor is covered with a first P-type guard ring; a second P-type protection ring covers the P-type emitting area of the PNP transistor; a third P-type protection ring covers the inner side edge of the P-type collector region of the PNP transistor; the outer edge of the P type collector region of the PNP transistor is covered with a fourth P type protection ring.
Furthermore, the inner edge and the outer edge of the P-type isolation region are covered with fifth P-type protection rings.
Furthermore, the widths of the first P-type guard ring, the second P-type guard ring, the third P-type guard ring and the fourth P-type guard ring are the same and smaller than the width of the fifth P-type guard ring.
Further, the fifth P-type guard ring has a width of 3 μm to 7 μm.
Furthermore, the depth of the first P-type protection ring is 0.3-0.8 μm; the depth of the second P-type guard ring is 0.3-0.8 μm; the depth of the third P-type guard ring is 0.3-0.8 μm; the depth of the fourth P-type guard ring is 0.3-0.8 μm; the fifth P-type guard ring is 0.3 μm to 0.8 μm.
Further, the first P-type guard ring, the second P-type guard ring, the third P-type guard ring and the fourth P-type guard ring have a width of 2 μm to 3 μm.
Further, the inner side of the first P-type guard ring is overlapped with the P-type base region by 1 mu m; the inner side of the second P-type protection ring is overlapped with the outer side of the P-type emitting area of the PNP transistor by 1 mu m; the inner side of the third P-type protection ring is overlapped with the inner side of the P-type collector region of the PNP transistor by 1 mu m; the inner side of the fourth P-type guard ring is overlapped with the outer side of the P-type collector region of the PNP transistor by 1 mu m.
A preparation method of the guard ring doped anti-radiation transistor structure comprises the following steps:
Step 4, after the injection is finished, plasma etching and H are carried out 2 SO 4 +H 2 O 2 Removing the photoresist on the surface of the silicon wafer by using the solution;
and 5, forming a guard ring bipolar transistor structure after annealing.
Compared with the prior art, the invention has at least the following beneficial technical effects:
aiming at the influence mechanism of total dose radiation on a silicon-based bipolar transistor, the total dose radiation resistance of the transistor is improved by doping a protection ring. Through selective doping, P-type impurity injection is carried out on the surface of a lateral diffusion region of a P-type doping region (comprising a P-type isolation region, a base region of an NPN transistor and a collector region/emitter region of the PNP transistor) of the bipolar transistor once, and an annular P + doping region (comprising first to fourth protection rings) is formed on the surface of the P-type doping lateral diffusion region, so that the P-type impurity concentration of the surface of the P-type doping lateral diffusion region is improved, the surface depletion and inversion of the P-type doping region of the bipolar transistor caused by total dose radiation are avoided, and the total dose radiation resistance of the bipolar transistor is improved.
Furthermore, the inner edge and the outer edge of the P-type isolation region are covered with the fifth P-type protection rings, the surface P-type impurity concentration of the P-type isolation transverse diffusion region is improved, the surface depletion and inversion of the P-type isolation transverse diffusion region caused by total dose radiation are avoided, a field induction junction is generated, and the electric leakage of the field induction junction is reduced.
Furthermore, the P-type guard ring should cover the P-type doped lateral diffusion region, the guard ring width is determined by the P-type doped lateral diffusion region width, and the P-type doped lateral diffusion region is determined by the P-type doped junction depth, wherein the base region of the NPN transistor and the collector/emitter junction depth of the PNP transistor are the same and smaller than the P-type isolation region junction depth, so the widths of the first P-type guard ring, the second P-type guard ring, the third P-type guard ring and the fourth P-type guard ring are the same and smaller than the width of the fifth P-type guard ring. The influence of the protective ring on the normal state characteristic of the transistor is reduced on the premise of ensuring the radiation-resistant effect. Further, the width of the fifth P-type guard ring is 3-7 μm, and the fifth P-type guard ring and the P-type isolation region are overlapped by 1 μm in the width direction. The inner side of the first P-type guard ring is overlapped with the P-type base region by 1 mu m; the inner side of the second P-type protection ring is overlapped with the outer side of the P-type emitting area of the PNP transistor by 1 mu m; the inner side of the third P-type protection ring is overlapped with the inner side of the P-type collector region of the PNP transistor by 1 mu m; the inner side of the fourth P-type protection ring is overlapped with the outer side of the P-type collector region of the PNP transistor by 1 micrometer, the overlapping design ensures that the protection ring covers the P-type doped transverse expansion region, and the influence of photoetching registration precision on the protection ring effect in the process is avoided.
Furthermore, because the total dose of ionizing radiation only causes depletion and inversion on the surface of the P-type doped region, the depth from the first P-type guard ring to the fifth P-type guard ring is designed to be the same and is 0.3-0.8 μm, and all guard ring structures are formed by doping once while the surface concentration of the P-type doped transverse diffusion region is ensured, so that the process complexity and the process cost are reduced. A method of forming by selective ion implantation: after impurity selective doping in different regions is completed through a traditional bipolar process to form a bipolar transistor structure, P-type impurity injection is performed on the surface of a transverse diffusion region of a P-type doping region of a transistor once through a photoresist masking injection method, an annular P + doping region is formed on the surface of the P-type doping transverse diffusion region, the surface P-type impurity concentration of the P-type doping transverse diffusion region is improved, surface depletion and inversion of the P-type doping region of the bipolar transistor caused by total dose radiation are avoided, and therefore the total dose radiation resistance of the bipolar transistor is improved.
Drawings
FIG. 1: a longitudinal cross-sectional view of a bipolar transistor with a conventional structure;
FIG. 2: a top view of a conventional structure bipolar transistor;
FIG. 3: guard ring structure bipolar transistor longitudinal section view;
FIG. 4: a guard ring structure bipolar transistor top view;
FIG. 5: the traditional bipolar process forms a bipolar transistor structure and forms a schematic diagram of a silicon dioxide insulating layer;
FIG. 6: forming a P-type guard ring doping window schematic diagram by photoetching;
FIG. 7: ion implantation is carried out to dope the P-type guard ring;
FIG. 8: removing the photoresist schematic diagram which is used as an injection shielding layer on the surface of the silicon wafer;
FIG. 9: forming a P-type guard ring schematic.
In the drawings: 101-N type epitaxial layer of NPN transistor; 102-N type epitaxial layer of PNP transistor; 2-P-type isolation region; 3-P type silicon substrate; 41-NPN transistor P-type base region; 42-PNP transistor P type collector region; 43-PNP transistor P-type emitter region; 51-NPN transistor N-type emitter region; 52-NPN transistor N-type epitaxial lead-out region; 6-silicon dioxide insulating layer; 7-radiation-resistant P-type protection ring; 10-photoresist; 11-P-type guard ring window; 14-N type buried layer.
Detailed Description
In order to make the objects and technical solutions of the present invention clearer and easier to understand. The present invention will be described in further detail with reference to the following drawings and examples, wherein the specific examples are provided for illustrative purposes only and are not intended to limit the present invention.
In the description of the present invention, it is to be understood that the terms "center", "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like, indicate orientations or positional relationships based on those shown in the drawings, and are used only for convenience in describing the present invention and for simplicity in description, and do not indicate or imply that the referenced devices or elements must have a particular orientation, be constructed and operated in a particular orientation, and thus, are not to be construed as limiting the present invention. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means two or more unless otherwise specified. In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly and may be, for example, fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.
As shown in fig. 1 and 2, the NPN bipolar transistor of the conventional structure includes an NPN transistor and a PNP transistor, the NPN transistor and the PNP transistor share a P-type silicon substrate 3, a P-type isolation region 2 separates the NPN transistor and the PNP transistor above the P-type silicon substrate 3, and an NPN transistor N-type emitter region 51, an NPN transistor N-type epitaxial lead-out region 52, and an NPN transistor P-type collector region 41 are disposed on an upper portion of an N-type epitaxial layer 101 of the NPN transistor; the upper part of the N type epitaxial layer 102 of the PNP transistor is provided with a PNP transistor P type collector region 42 and a PNP transistor P type emitter region 43. The uppermost end of the NPN bipolar transistor is provided with a silicon dioxide insulating layer 6.
Referring to fig. 3, a guard ring doped radiation resistant transistor structure is formed by selective ion implantation: after impurity selective doping in different regions is completed through a traditional bipolar process to form a bipolar transistor structure, P-type impurity injection is performed on the surface of a transverse diffusion region of a P-type doping region of a transistor once through a photoresist masking injection method, an annular P + doping region is formed on the surface of the P-type doping transverse diffusion region, the surface P-type impurity concentration of the P-type doping transverse diffusion region is improved, surface depletion and inversion of the P-type doping region of the bipolar transistor caused by total dose radiation are avoided, and therefore the total dose radiation resistance of the bipolar transistor is improved.
Example 1
The P-type guard ring bipolar transistor structure adopted by the invention is as follows:
referring to fig. 3 and 4, a self-built electric field radiation-resistant bipolar transistor structure comprises a bipolar transistor body 100 and a silicon dioxide insulating layer 6 which are arranged in sequence from bottom to top. Wherein the bipolar transistor body is a silicon wafer with completed doping. An insulating layer 6 covers the upper surface of the bipolar transistor body 100. The upper part of the transverse diffusion region of the transistor P-type doped region is provided with a plurality of P-type guard rings.
The first P-type guard ring 71 covers the edge of the P-type base region 41 of the NPN transistor and a transverse diffusion region, the junction depth of the P-type base region is 2 micrometers, the width of the P-type guard ring is 3 micrometers, and the inner ring of the P-type guard ring is overlapped with the P-type base region by 1 micrometer.
The second P-type guard ring 72 covers the P-type emitter region 43 and the lateral diffusion region of the PNP transistor, and the third P-type guard ring 73 covers the inner edge of the P-type collector region 42 and the lateral diffusion region of the PNP transistor; the fourth P-type guard ring 74 covers the outer edge of the P-type collector region 42 of the PNP transistor and the lateral diffusion region; the junction depth of the P-type collector region 42 of the PNP transistor and the emitter region 43 of the PNP transistor is 2 microns, and the widths of the second P-type guard ring 72, the third P-type guard ring 73 and the fourth P-type guard ring 74 are all 3 microns; the inner side of the second P-type guard ring 72 overlaps the outer side of the P-type emitter region 43 of the PNP transistor by 1 μm; the inner ring of the third P-type guard ring 73 overlaps the inner side of the P-type collector region 42 of the PNP transistor by 1 μm; the inner ring of the fourth P-type guard ring 74 overlaps the outer side of the P-type collector region 42 of the PNP transistor by 1 μm.
The fifth P-type guard ring 75 covers the edge of the P-type isolation region 2 and the lateral diffusion region, the junction depth of the P-type isolation region is 6 μm, the width of the P-type guard ring is 7 μm, and the inner ring of the P-type guard ring is overlapped with the P-type isolation region 2 by 1 μm.
Compared with the bipolar transistor with the traditional structure, the bipolar transistor with the protection ring structure has the advantages that after the total dose radiation of 100krad (Si), the amplification factor attenuation of the NPN transistor is reduced to 30% from 41%, the amplification factor attenuation of the PNP transistor is reduced to 21% from 29%, and the bipolar transistor with the protection ring structure has higher total dose radiation resistance.
The preparation method of the transistor structure comprises the following steps:
Step 4. referring to FIG. 8, the implant is completed byPlasma etching and H 2 SO 4 +H 2 O 2 Removing the photoresist on the surface of the silicon wafer by using the solution;
and 5, referring to fig. 9, annealing for 10min at 800 ℃, completing the activation of the implanted impurities, and forming a guard ring bipolar transistor structure.
The total dose irradiation test evaluation is respectively carried out on the novel P-type guard ring bipolar transistor and the bipolar transistor with the traditional structure provided by the invention: after irradiation with a total dose of 100krad (Si), the amplification factor of the NPN transistor with the novel protection ring structure is attenuated by 30.57%, and the amplification factor of the PNP transistor is attenuated by 21.75%; the amplification factor of the NPN transistor in the traditional structure is attenuated by 41.78%, the amplification factor of the PNP transistor is attenuated by 29.68%, and the total dose radiation resistance of the novel protection ring structure transistor is higher than that of a bipolar transistor in the traditional structure.
Example 2
The guard ring bipolar transistor structure adopted by the invention is as follows: comprising a bipolar transistor body 100 and a silicon dioxide insulating layer 6 arranged in this order from bottom to top. Wherein the bipolar transistor body is a silicon wafer with completed doping. An insulating layer 6 covers the upper surface of the bipolar transistor body 100. The upper part of the transverse diffusion region of the transistor P-type doped region is provided with a plurality of P-type guard rings.
The first P-type guard ring 71 covers the edge of the P-type base region 41 of the NPN transistor and a transverse diffusion region, the junction depth of the P-type base region is 0.8 mu m, the width of the P-type guard ring is 2 mu m, the inner ring of the P-type guard ring and the P-type base region are overlapped by 1 mu m, and the outer ring of the P-type guard ring covers the P-type base region by 1 mu m;
the second P-type guard ring 72 covers the P-type emitter region 43 and the lateral diffusion region of the PNP transistor, and the third P-type guard ring 73 covers the inner edge of the P-type collector region 42 and the lateral diffusion region of the PNP transistor; the fourth P-type guard ring 74 covers the outer edge of the P-type collector region 42 of the PNP transistor and the lateral diffusion region; the junction depth of the P-type collector region 42 of the PNP transistor and the emitter region 43 of the PNP transistor is 1 μm, and the widths of the second P-type guard ring 72, the third P-type guard ring 73 and the fourth P-type guard ring 74 are all 2 μm; the inner ring of the third P-type guard ring 73 overlaps the inner side of the P-type collector region 42 of the PNP transistor by 1 μm; the inner ring of the fourth P-type guard ring 74 overlaps the outer side of the P-type collector region 42 of the PNP transistor by 1 μm.
The fifth P-type guard ring 75 covers the edge of the P-type isolation region 2 and the lateral diffusion region, the junction depth of the P-type isolation region is 2 μm, the width of the P-type guard ring is 3 μm, and the inner ring of the P-type guard ring is overlapped with the P-type isolation region 2 by 1 μm.
Compared with the bipolar transistor with the traditional structure, the bipolar transistor with the protection ring structure has the advantages that after the total dose radiation of 100krad (Si), the amplification factor attenuation of the NPN transistor is reduced to 30% from 41%, the amplification factor attenuation of the PNP transistor is reduced to 21% from 29%, and the bipolar transistor with the protection ring structure has higher total dose radiation resistance.
The structure can be realized by the following method:
1. referring to fig. 5, the conventional bipolar process completes the selective doping of impurities in different regions to form a bipolar transistor structure and a silicon dioxide insulating layer 6;
2. referring to fig. 6, coating a photoresist with a thickness of 1.3 μm on the surface of the oxide layer, and forming a P-type guard ring window 11 through exposure and development;
3. referring to fig. 7, the P-type guard ring is doped by ion implantation, and impurities are implanted 11 B + Implant energy 20keV, implant dose 5E12cm -2 ；
4. Referring to fig. 8, the implantation is completed by plasma etching and H 2 SO 4 +H 2 O 2 Removing the photoresist on the surface of the silicon wafer by using the solution;
5. referring to fig. 9, a guard ring bipolar transistor structure is formed by a 30 second rapid anneal at 1050 ℃.
The above-mentioned contents are only for illustrating the technical idea of the present invention, and the protection scope of the present invention is not limited thereby, and any modification made on the basis of the technical idea of the present invention falls within the protection scope of the claims of the present invention.
Claims (7)
1. A guard ring doped anti-radiation transistor structure is characterized by comprising an NPN transistor and a PNP transistor, wherein the NPN transistor and the PNP transistor share a P-type silicon substrate (3), and a P-type isolation region (2) separates the NPN transistor and the PNP transistor above the P-type silicon substrate (3); an NPN transistor N-type emitter region (51), an NPN transistor N-type epitaxial lead-out region (52) and an NPN transistor P-type collector region (41) are arranged on the upper portion of an N-type epitaxial layer (101) of the NPN transistor; a PNP transistor P-type collector region (42) and a PNP transistor P-type emitter region (43) are arranged on the upper part of the N-type epitaxial layer (102) of the PNP transistor;
the edge of a P-type base region (41) of the NPN transistor is covered with a first P-type guard ring (71); the PNP transistor P-type emitter region (43) is covered with a second P-type guard ring (72); a third P-type protection ring (73) covers the inner side edge of the P-type collector region (42) of the PNP transistor; the outer edge of the P type collector region (42) of the PNP transistor is covered with a fourth P type protection ring (74);
and fifth P-type protection rings (75) are covered on the inner edge and the outer edge of the P-type isolation region.
2. The guard ring doped radiation-resistant transistor structure of claim 1, wherein the widths of the first P-type guard ring (71), the second P-type guard ring (72), the third P-type guard ring (73) and the fourth P-type guard ring (74) are the same and smaller than the width of the fifth P-type guard ring (75).
3. The guard ring doped radiation resistant transistor structure of claim 1, wherein said fifth P-type guard ring (75) has a width of 3 μm to 7 μm.
4. The guard ring doped radiation-hard transistor structure of claim 1, wherein the depth of said first P-type guard ring (71) is 0.3 μm to 0.8 μm; the depth of the second P-type guard ring (72) is 0.3-0.8 μm; the depth of the third P-type protection ring (73) is 0.3-0.8 μm; the depth of the fourth P-type guard ring (74) is 0.3-0.8 μm; the fifth P-type guard ring (75) has a diameter of 0.3 μm to 0.8 μm.
5. The guard ring doped radiation-resistant transistor structure of claim 1, wherein the widths of the first P-type guard ring (71), the second P-type guard ring (72), the third P-type guard ring (73), and the fourth P-type guard ring (74) are 2 μm to 3 μm.
6. A guard ring doped radiation-resistant transistor structure as claimed in claim 1, characterized in that the inner side of said first P-type guard ring (71) overlaps the P-type base region by 1 μm; the inner side of the second P-type protection ring (72) is overlapped with the outer side of a P-type emitter region (43) of the PNP transistor by 1 mu m; the inner side of the third P-type guard ring (73) is overlapped with the inner side of a P-type collector region (42) of the PNP transistor by 1 mu m; the inner side of the fourth P-type guard ring (74) and the outer side of the P-type collector region (42) of the PNP transistor are overlapped by 1 mu m.
7. A method for fabricating the guard ring doped radiation resistant transistor structure of claim 1, comprising the steps of:
step 1, forming a bipolar transistor structure and forming a silicon dioxide insulating layer (6) on the surface of the bipolar transistor structure;
step 2, coating photoresist (10) on the surface of the silicon dioxide insulating layer (6), and forming a P-type guard ring window (11) through exposure and development;
step 3, doping the region to form the P-type protection ring through ion implantation, and implanting impurities 11 B + ；
Step 4, after the injection is finished, plasma etching and H are carried out 2 SO 4 +H 2 O 2 Removing the photoresist (10) on the surface of the silicon wafer by the solution;
and 5, forming a guard ring bipolar transistor structure after annealing.
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