CN108447839A - 半导体装置及其制造方法 - Google Patents

半导体装置及其制造方法 Download PDF

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Publication number
CN108447839A
CN108447839A CN201711078222.5A CN201711078222A CN108447839A CN 108447839 A CN108447839 A CN 108447839A CN 201711078222 A CN201711078222 A CN 201711078222A CN 108447839 A CN108447839 A CN 108447839A
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conducting part
semiconductor element
conducting
dielectric
semiconductor device
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CN108447839B (zh
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林柏均
朱金龙
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Nanya Technology Corp
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Nanya Technology Corp
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Abstract

本公开涉及一种半导体装置及其制造方法,该半导体装置具有由融熔接合技术形成的多个接合的半导体元件。该多个半导体元件具有多个传导部,其热膨胀系数大于介电部的热膨胀系数。在融熔接合技术的热处理制程中,具有较高热膨胀系数的传导部的体积膨胀,可通过凹部提供的膨胀空间予以容纳。如此,通过融熔接合技术接合该多个半导体元件而形成的半导体装置在两个介电部之间的界面中不具有一横向突出。因此,可以有效排除横向突出造成的电性功能故障。

Description

半导体装置及其制造方法
技术领域
本公开涉及一种半导体装置及其制造方法,特别关于一种半导体装置,具有通过融熔接合技术形成的多个接合的半导体元件及其制造方法。
背景技术
半导体元件对于许多现代应用而言是重要的。随着电子技术的进展,半导体元件的尺寸越来越小,而功能越来越大且整合的电路量越来越多。由于半导体元件的尺度微小化,目前芯片上覆芯片(chip-on-chip)技术广泛用于制造半导体元件。在此半导体封装的生产中,实施许多制造制程,例如磊晶生长制程(epitaxial growing process)或是后插塞制程(post via formation)。
然而,在微小化规模中,半导体元件的制造变得越来越复杂。制造半导体元件的复杂度增加可能造成缺陷,例如电互连不良、产生破裂、或是组件脱层。据此,修饰半导体元件的结构与制造制程仍有许多挑战。
上文的「现有技术」说明仅是提供背景技术,并未承认上文的「现有技术」说明公开本公开的标的,不构成本公开的现有技术,且上文的「现有技术」的任何说明均不应作为本公开的任一部分。
发明内容
本公开的实施例提供一种半导体装置,包含一第一半导体元件,具有一第一传导部、与该第一传导部相邻的一第一介电部、以及位在该第一传导部的一上表面的一凹部,其中该第一传导部的一热膨胀系数大于该第一介电部的一热膨胀系数,以及该凹部的一体积与该第一传导部自一第一温度至高于该第一温度的一第二温度的一体积膨胀实质相同。
在本公开的一些实施例中,该第一传导部的一上端低于该第一介电部的一上端。
在本公开的一些实施例中,该第一传导部的一厚度小于该第一介电部的一厚度。
在本公开的一些实施例中,该半导体装置另包括一第二半导体元件,具有一第二传导部以及与该第二传导部相邻的一第二介电部,其中该第一传导部面对该第二传导部,该凹部分离该第一传导部与该第二传导部,以及该第一介电部接触该第二介电部。
在本公开的一些实施例中,该第一传导部的一中心对准该第二传导部的一中心。
本公开的另一实施例提供一种半导体装置,包括:一第一半导体元件,具有一第一传导部以及与该第一传导部相邻的一第一介电部;以及一第二半导体元件,具有一第二传导部以及与该第二传导部相邻的的一第二介电部。该第一传导部直接接合至该第二传导部,该第一传导部与该第二传导部之间实质未有一焊接材料,以及该第一介电部直接接合至该第二介电部。
在本公开的一些实施例中,该第一传导部的一热膨胀系数大于该第一介电部的一热膨胀系数。
在本公开的一些实施例中,该第一半导体元件与该第二半导体元件垂直接合,以及该第一传导部接触该第二传导部,实质未有一横向突出至该第一介电部与该第二介电部之间的一界面。
在本公开的一些实施例中,该第一传导部的一中心对准该第二传导部的一中心。
本公开的另一实施例提供一种半导体装置的制造方法,包含:形成一第一半导体元件,具有一第一传导部、与该第一传导部相邻的一第一介电部、以及位于该第一传导部的一上表面的一凹部;形成一第二半导体元件,具有一第二传导部以及与该第二传导部相邻的一第二介电部;配置该第一半导体元件与该第二半导体元件,使得该第一传导部面对该第二传导部;以及膨胀该第一传导部与该第二传导部至少其中之一,以填充该凹部。
在本公开的一些实施例中,形成该第一半导体元件包括:形成一第一介电层于一半导体基板上方;形成一开口于该第一介电层中;以及形成该第一传导部于该开口中。
在本公开的一些实施例中,形成该第一传导部于该开口中包括:形成一传导层于该第一介电层上方并且填充该开口;进行一平坦化制程,以自该第一介电层的一上表面移除该传导部的一部分;以及进行一选择性蚀刻,以移除该开口中的该传导层的一上部,以形成该凹部。
在本公开的一些实施例中,形成该第一传导部于该开口中包括:形成一传导层于该第一介电层上方并且填充该开口;进行一第一平坦化制程,以自该第一介电层的一上表面移除该传导层的一部分;形成一遮罩覆盖该开口中的该传导层;形成一第二介电层于该第一介电层上方并且覆盖该遮罩;进行一第二平坦化制程以移除该第二介电层的一部分并且暴露该遮罩;以及移除该遮罩以形成一凹部。
在本公开的一些实施例中,该第一传导部的一热膨胀系数大于该第一介电部的一热膨胀系数,以及膨胀该第一传导部与该第二传导部至少其中之一包括进行一热处理制程,其膨胀该第一传导部的一厚度大于该第一介电部的一厚度。
在本公开的一些实施例中,在一第一温度,形成具有该凹部的该第一传导部,以及该热处理制程加热该第一传导部与该第二传导部至少其中之一至一第二温度,该第二温度高于该第一温度。
在本公开的一些实施例中,该凹部分离该第一传导部与该第二传导部,以及该第一介电部接触该第二介电部。
本公开涉及一种半导体装置及其制造方法,该半导体装置具有融熔接合技术形成的多个接合的半导体元件。所述半导体元件具有多个传导部,其热膨胀系数大于介电部的热膨胀系数。在融熔接合技术的热处理制程中,具有较高热膨胀系数的传导部的体积膨胀,可通过凹部提供的膨胀空间予以容纳。如此,通过融熔接合技术接合所述半导体元件而形成的半导体装置在两个介电部之间的界面中不具有一横向突出。因此,可以有效排除横向突出造成的电性功能故障。
上文已相当广泛地概述本公开的技术特征及优点,俾使下文的本公开详细描述得以获得优选了解。构成本公开的权利要求标的的其它技术特征及优点将描述于下文。本公开所属技术领域中技术人员应了解,可相当容易地利用下文公开的概念与特定实施例可作为修改或设计其它结构或制程而实现与本公开相同的目的。本公开所属技术领域中技术人员亦应了解,这类等效建构无法脱离后附的权利要求所界定的本公开的构思和范围。
附图说明
参阅详细说明与权利要求结合考量附图时,可得以更全面了解本申请案的公开内容,附图中相同的元件符号是指相同的元件。
图1为剖面示意图,例示本公开比较例经由热处理使得半导体元件变形(transforming)。
图2为剖面示意图,例示本公开比较例的半导体装置。
图3为剖面示意图,例示本公开实施例经由热处理使得半导体元件变形(transforming)。
图4为剖面示意图,例示本公开实施例经由热处理使得半导体元件变形(transforming)。
图5为剖面示意图,例示本公开实施例的半导体装置。
图6为剖面示意图,例示本公开实施例的半导体装置。
图7为流程图,例示本公开实施例的半导体装置的制造方法。
图8至图20为示意图,例示本公开实施例通过图7的方法制造半导体装置的制程。
附图标记说明:
10A 半导体元件
10A' 半导体元件
10B 半导体元件
10B' 半导体元件
11 基板
13 传导部
13' 传导部
15 介电部
15' 介电部
17 突出
20A 半导体元件
20A' 半导体元件
21 基板
23 传导部
23' 传导部
25 介电部
25' 介电部
27 凹部
30A 半导体元件
30A' 半导体元件
31 基板
33 传导部
33' 传导部
35 介电部
35' 介电部
37 凹部
41 介电层
43 遮罩
45 孔洞
47 开口
49 传导层
51 遮罩
53 介电层
100 半导体装置
200 半导体装置
300' 半导体装置
具体实施方式
本公开的以下说明伴随并入且组成说明书的一部分的附图,说明本公开的实施例,然而本公开并不受限于该实施例。此外,以下的实施例可适当整合以下实施例以完成另一实施例。
「一实施例」、「实施例」、「例示实施例」、「其他实施例」、「另一实施例」等是指本公开所描述的实施例可包含特定特征、结构或是特性,然而并非每一实施例必须包含该特定特征、结构或是特性。再者,重复使用「在实施例中」一语并非必须指相同实施例,然而可为相同实施例。
本公开涉及一种半导体结构装置及其制造方法,该半导体装置具有通过融熔接合技术形成的多个接合的半导体元件。为了使得本公开可被完全理解,以下说明提供详细的步骤与结构。显然,本公开的实施不会限制该领域中的技术人员已知的特定细节。此外,已知的结构与步骤不再详述,以免不必要地限制本公开。本公开的优选实施例详述如下。然而,除了详细对其进行说明外,本公开亦可广泛实施于其他实施例中。本公开的范围不限于详细说明的内容,而是由权利要求定义。
图1剖面示意图,例示本公开比较例将半导体元件10A变形为半导体元件10A'。半导体元件10A包含基板11、传导部13以及与传导部13相邻的介电部15,其中在平坦化制程之后,传导部13的上端与介电部15的上端实质齐平,该平坦化制程例如广泛应用于制造半导体元件的化学机械研磨制程。在一些实施例中,基板11为硅基板,传导部13由铜制成,以及介电部15由氧化硅制成。
硅的热膨胀系数约为2.6ppm/℃,铜的热膨胀系数约为17.0ppm/℃,以及氧化硅的热膨胀系数小于1.5ppm/℃。换言之,随着温度增加,传导部13的铜比介电部15的氧化硅膨胀更多。因此,当加热半导体元件10A时,传导部13的体积(厚度)膨胀大于介电部15,并且在半导体元件10A'中,传导部13'的上端变得高于介电部15'的上端。
图2为剖面示意图,例示本公开比较例的半导体装置100。通过使用融熔接合技术于两个垂直堆迭的半导体元件10A与10B,形成半导体装置100。在一些实施例中,半导体元件10A与10B可具有相同的架构。融熔接合技术包含热处理制程,使得传导部13的膨胀体积(厚度)大于介电部15;因此,半导体装置100的传导部13'产生横向突出17于半导体装置100的两个介电部15'之间的界面中。然而,横向突出15可能造成半导体装置100无法实现其原有的电性功能。
图3为剖面示意图,例示本公开实施例将半导体元件20A变形为半导体元件20A'。半导体元件20A包含基板21、传导部23、与传导部23相邻的介电部25、以及在传导部23的非平面(曲线的)上表面上方的凹部27,其中传导部23的热膨胀系数大于介电部25。在一些实施例中,基板21为硅基板,传导部23由铜制成,以及介电部25由氧化硅制成。在一些实施例中,以传导部23的上表面定义凹部27的底端,以及以自介电部25的上端横向延伸的虚线定义凹部27的上端。
在热处理制程之前,传导部23的上端低于介电部25的上端,以及传导部23的厚度小于介电部25的厚度。在热处理制程中,随着温度增加,铜的传导部23膨胀得比氧化硅的介电部25更大。因此,当加热半导体元件20A时,传导部23的体积(厚度)膨胀大于介电部25的体积(厚度)膨胀,传导部23填充凹部27,半导体元件20A的传导部23'的上端变得与介电部25的上端实质齐平,并且传导部23的厚度变得与介电部25的厚度实质相同。
图4为剖面示意图,例示本公开实施例将半导体元件30A变形为半导体元件30'。半导体元件30包含基板31、传导部33、与传导部33相邻的介电部35、以及在传导部33的平面上表面上方的凹部37,其中传导部33的热膨胀系数大于介电部35。在一些实施例中,基板31为硅基板、传导部33由铜制成,以及介电部35由氧化硅制成。在一些实施例中,以传导部33的上表面定义凹部37的底端,并且以自介电部35的上端延伸的虚线定义凹部37的上端。
在热处理制程中,随着温度增加,铜的传导部33膨胀得比氧化硅的介电部35更大。因此,当加热半导体元件30A时,传导部33的体积(厚度)膨胀大于介电部35的体积(厚度)膨胀,传导部33填充凹部37,半导体元件30A'的传导部33'的上端与介电部35'的上端实质齐平。
图5为剖面示意图,例示本公开实施例的半导体装置200。应用融熔接合技术于两个垂直堆迭的半导体元件20A与20B,形成半导体装置200。在一些实施例中,半导体元件20A与20B可具有相同的架构。融熔接合技术包含热处理制程,使得传导部23的体积(厚度)膨胀大于介电部25;因此,半导体装置200的传导部23'填充凹部27。
在一些实施例中,配置两个半导体元件20A与20B使得上方半导体元件20A的传导部23面对下方半导体元件20B的传导部23,并且上方半导体元件20A的传导部23的中心对准下方半导体元件20B的传导部23的中心。由于使用融熔接合技术,基本上不需要在垂直堆迭的半导体元件20A与20B之间配置焊接材料或类似物。
同样地,可应用融熔接合技术于两个垂直堆迭的半导体元件30A与30B,形成半导体装置300',如图6所示。融熔接合技术的细节如「An Overview of Patterned Metal/Dielectric Surface Bonding:Mechanism,Alignment and Characterization,J.Electrochem.Soc.1011volume 158,issue 6,P81-P86」文章中所述,其全文并入本文作为参考并且不再重述。
图7为流程图,例示本公开实施例的半导体装置的制造方法。在一些实施例中,可通过图7的方法300形成半导体装置。方法300包含一些操作,并且描述与说明不被视为操作顺序的限制。方法300包含一些步骤(301、303、305与307)。
图8至14为示意图,例示本公开实施例通过图7的方法制造半导体装置的制程。在步骤301中,制造半导体元件30A,如图8至13所示。在一些实施例中,如图13所示,半导体元件30A具有传导部33、与传导部33相邻的介电部35、以及位于传导部33的平面上表面上方的凹部37。在一些实施例中,以传导部33的上表面定义凹部37的底端,以及以自介电部35的上端延伸的虚线定义凹部37的上端。
在图8中,通过在基板31上进行沉积制程,形成介电层41在基板31上。在一些实施例中,基板31例如硅基板,介电层41为氧化硅层。
在图9中,通过在介电层41上进行沉积、微影与蚀刻制程,形成图案化的遮罩43。在一些实施例中,图案化的遮罩43为具有孔洞45的光致抗蚀剂层。
在图10中,通过使用图案化的遮罩43作为蚀刻遮罩进行蚀刻制程,移除孔洞45下方的介电层31的一部分,以于介电层41中形成开口47。
在图11中,移除图案化的遮罩43,并且通过在基板31与介电层41上进行沉积制程而形成传导层49,其中传导层49填充开口47并且覆盖介电层41的上表面。
在图12中,进行平坦化制程,自介电层41的上表面移除传导层49的一部分,同时保留开口47中的传导层49。在一些实施例中,该平坦化制程为化学机械研磨制程,并且在该平坦化制程之后,开口47中的传导层49的上端与介电层41的上端实质齐平。
在图13中,进行选择性蚀刻制程,移除开口47中的传导层49的上部,以形成凹部37。在一些实施例中,开口47中的剩余传导层49形成传导部33,剩余的介电层41形成与传导部33相邻的介电部35,其中凹部37形成于传导部33的上表面上方。在一些实施例中,该选择性蚀刻制程为非等向性蚀刻制程,例如干蚀刻制程,并且在该非等向性蚀刻制程之后,半导体元件30A的传导部33的上表面实质为平面。
在一些实施例中,参阅图14,可实质通过图8至13所公开的制造制程(除了图13的选择性蚀刻制程),而制造半导体元件20A。在一些实施例中,制造半导体元件20A的选择性蚀刻制程为等向性蚀刻制程,例如湿蚀刻制程,并且在该等向性蚀刻制程之后,半导体元件20A的传导部23的上表面实质为非平面(曲线的)。
在步骤303中,制造半导体元件30B,如图15所示。在一些实施例中,类似于半导体元件30A,半导体元件30B具有传导部33以及与传导部33相邻的介电部35。在一些实施例中,半导体元件30B具有凹部37,位于传导部33的上表面上方,其中半导体元件30B的制造可与图8至13所示的半导体晶粒30A的制造相同。
在步骤305中,组合半导体元件30A与半导体元件30B使得半导体元件30A的传导部33面对半导体元件30B的传导部33,如图16所示。在一些实施例中,凹部37分离半导体元件30A的传导部33与半导体元件30B的传导部33,以及半导体元件30A的介电部35接触半导体元件30B的介电部35。
在步骤307中,参阅图16,半导体元件30A的传导部33与半导体元件30B的传导部33至少其中之一膨胀以填充凹部37;因此,半导体元件30A的传导部33接触半导体元件30B的传导部33,以形成电连接。在一些实施例中,半导体元件30A的传导部33的中心对准半导体元件30B的传导部33的中心。
在一些实施例中,传导部33的热膨胀系数大于介电部35的热膨胀系数,融熔接合技术的热处理制程实现传导部33的体积膨胀,使得传导部33的体积(厚度)增加大于介电部35的体积(厚度)增加,因而凹部37被传导部33的导体填充。通过融熔接合技术,基本上不需要在垂直堆迭的半导体元件30A与30B之间配置焊接材料或类似物。
在一些实施例中,在第一温度,形成定义凹部37的底部的传导部33;后续热处理制程将半导体元件30A的传导部33与半导体元件30B的传导部至少其中的一加热至高于第一温度的第二温度。在一些实施例中,传导部33包括铜,以及第二温度实质为300℃与450℃之间;并且第一温度为图13的选择性蚀刻制程的处理温度。在一些实施例中,凹部37的体积与传导部33自第一温度至第二温度的膨胀体积实质相同。
凹部37经设计提供膨胀空间,在融熔接合的热处理制程中,提供较高热膨胀系数的传导部33'的体积膨胀;因此,半导体装置300'在两个介电部35'之间的界面中不具有横向突出。因此,有效排除因横向突出造成的电性功能故障。
图17至20为示意图,例示本公开实施例对应于图7步骤301的制造半导体元件30A的制程。在一些实施例中,进行图8至12所公开的制造制程,而后通过在传导层49上进行沉积、微影与蚀刻制程,形成遮罩51,如图17所示。在一些实施例中,遮罩51为图案化的光致抗蚀剂层,选择性覆盖开口47中的传导层49,以及遮罩51的上端实质高于介电层41的上端。
在图18中,介电层53形成于介电层41上方并且覆盖遮罩51。在一些实施例中,介电层53由氧化硅制成,与介电层41相同材料。
在图19中,进行平坦化制程,以移除介电层53的上部并且暴露遮罩51。在一些实施例中,该平坦化制程为化学机械研磨制程,并且在平坦化制程之后,遮罩51的上端与介电层53的上端实质齐平。
在图20中,自开口47中的传导层49移除遮罩51,因而于开口47中的传导层49的上表面上方形成凹部37。因此,开口47中的传导层49作为半导体元件30A的传导部33,以及剩余介电层53与介电层41作为半导体元件30A的介电部35。
本公开涉及一种半导体装置及其制造方法,该半导体装置具有融熔接合技术形成的多个接合的半导体元件。所述多个半导体元件的传导部的热膨胀系数高于介电部。在融熔接合技术的热处理制程中,具有较高热膨胀系数的传导部的体积膨胀,可通过凹部提供的膨胀空间予以容纳。如此,通过融熔接合技术接合所述多个半导体元件而形成的半导体装置在两个介电部之间的界面中不具有一横向突出。因此,可以有效排除横向突出造成的电性功能故障。
本公开的一实施例提供一种半导体装置,包含一第一半导体元件,具有一第一传导部、与该第一传导部相邻的一第一介电部、以及位于该第一传导部的上表面上方的一凹部,其中该第一传导部的一热膨胀系数大于该第一介电部的一热膨胀系数,以及自一第一温度至高于该第一温度的一第二温度,该凹部的体积与该第一传导部的一体积膨胀实质相同。
本公开的另一实施例提供一种半导体装置,包含:一第一半导体元件,具有一第一传导以及与该第一传导部相邻的一第一介电部;以及一第二半导体元件,具有一第二传导部以及与该第二传导部相邻的一第二介电部。该第一传导部直接接合至该第二传导部,实质上没有一焊接材料于该第一传导部与该第二传导部之间,以及该第一介电部直接接合至该第二介电部。
本公开的另一实施例提供一种半导体装置的制造方法,包含:形成一第一半导体元件,具有一第一传导部、与该第一传导部相邻的一第一介电部、以及一凹部,位于该第一传导部的一上表面;形成一第二半导体元件,具有一第二传导部以及与该第二传导部相邻的一第二介电部;配置该第一半导体元件与该第二半导体元件,使得该第一传导部面对该第二传导部;以及膨胀该第一传导部与该第二传导部至少其中之一以填充该凹部。
虽然已详述本公开及其优点,然而应理解可进行各种变化、取代与替代而不脱离权利要求所定义的本公开的构思与范围。例如,可用不同的方法实施上述的许多制程,并且以其他制程或其组合替代上述的许多制程。
再者,本申请案的范围并不受限于说明书中所述的制程、机械、制造、物质组成物、手段、方法与步骤的特定实施例。该领域的技术人员可自本公开的公开内容理解可根据本公开而使用与本文所述的对应实施例具有相同功能或是达到实质相同结果的现存或是未来发展的制程、机械、制造、物质组成物、手段、方法、或步骤。据此,这些制程、机械、制造、物质组成物、手段、方法、或步骤包含于本申请案的权利要求内。

Claims (20)

1.一种半导体装置,包括:
一第一半导体元件,具有一第一传导部、与该第一传导部相邻的一第一介电部、以及位于该第一传导部的一上表面上方的一凹部,
其中该第一传导部的一热膨胀系数大于该第一介电部的一热膨胀系数,以及该凹部的一体积与该第一传导部自一第一温度至一第二温度的一体积膨胀体积实质相同,该第二温度高于该第一温度。
2.如权利要求1所述的半导体装置,其中该第一传导部的一上端低于该第一介电部的一上端。
3.如权利要求1所述的半导体装置,其中该第一传导部的一厚度小于该第一介电部的一厚度。
4.如权利要求1所述的半导体装置,另包括:
一第二半导体元件,具有一第二传导部以及与该第二传导部相邻的一第二介电部;
其中该第一传导部面对该第二传导部,该凹部分离该第一传导部与该第二传导部,以及该第一介电部接触该第二介电部。
5.如权利要求4所述的半导体装置,其中该第一传导部的一中心对准该第二传导部的一中心。
6.如权利要求4所述的半导体装置,其中该第一传导部直接接合至该第二传导部,实质未有一焊接材料存在于该第一传导部与该第二传导部之间。
7.如权利要求1所述的半导体装置,其中该第一传导部包括铜,以及该第二温度实质为300℃与450℃之间。
8.一种半导体装置,包括:
一第一半导体元件,具有一第一传导部以及与该第一传导部相邻的一第一介电部;以及
一第二半导体元件,具有一第二传导部以及与该第二传导部相邻的一第二介电部;
其中该第一传导部直接接合至该第二传导部,实质未有一焊接材料存在于该第一传导部与该第二传导部之间,以及该第一介电部直接接合至该第二介电部。
9.如权利要求8所述的半导体装置,其中该第一传导部的一热膨胀系数大于该第一介电部的一热膨胀系数。
10.如权利要求8所述的半导体装置,其中该第一半导体元件与该第二半导体元件垂直接合,以及该第一传导部接触该第二传导部,实质未有一横向突出存在于该第一介电部与该第二介电部之间的一界面中。
11.如权利要求8所述的半导体装置,其中该第一半导体元件与该第二半导体元件直接接合,实质未有一焊接材料存在于该第一半导体元件与该第二半导体元件之间。
12.如权利要求8所述的半导体装置,其中该第一传导部的一中心对准该第二传导部的一中心。
13.如权利要求8所述的半导体装置,其中该第一传导部包括铜,以及该第二温度实质为300℃与450℃之间。
14.一种半导体装置的制造方法,包括:
形成一第一半导体元件,具有一第一传导部、与该第一传导部相邻的一第一介电部、以及位于该第一传导部的一上表面上方的一凹部;
形成一第二半导体元件,具有一第二传导部以及与该第二传导部相邻的一第二介电部;
配置该第一半导体元件与该第二半导体元件,使得该第一传导部面对该第二传导部;以及
膨胀该第一传导部与该第二传导部至少其中之一,以填充该凹部。
15.如权利要求14所述的制造方法,其中形成该第一半导体元件包括:
形成一第一介电层于一半导体基板上方;
形成一开口于该第一介电层中;以及
形成该第一传导部于该开口中。
16.如权利要求15所述的制造方法,其中形成该第一传导部于该开口中包括:
形成一传导层于该第一介电层上方并且填充该开口;
进行一平坦化制程,以自该第一介电层的一上表面移除该传导层的一部分;以及
进行一选择性蚀刻制程,通过移除该开口中的该传导层的一上部以形成该凹部。
17.如权利要求15所述的制造方法,其中形成该第一传导部于该开口中包括:
形成一传导层于该第一介电层上方并且填充该开口;
进行一平坦化制程,以自该第一介电层的一上表面移除该传导层的一部分;
形成一遮罩,覆盖该开口中的该传导层;
形成一第二介电层于该第一介电层上方并且覆盖该遮罩;
进行一第二平坦化制程,以移除该第二介电层的一部分并且暴露该遮罩;以及
移除该遮罩以形成一凹部。
18.如权利要求14所述的制造方法,其中该第一传导部的一热膨胀系数大于该第一介电部的一热膨胀系数,以及膨胀该第一传导部与该第二传导部至少其中之一包括进行一热处理制程,以膨胀该第一传导部的一厚度大于该第一介电部的一厚度。
19.如权利要求18所述的制造方法,其中在一第一温度,形成具有该凹部的该第一传导部,以及该热处理制程加热该第一传导部与该第二传导部至少其中之一至一第二温度,该第二温度高于该第一温度。
20.如权利要求14所述的制造方法,其中该凹部分离该第一传导部与该第二传导部,以及该第一介电部接触该第二介电部。
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