CN108293301B - 用于稳定导电迹线之间的电阻的方法 - Google Patents

用于稳定导电迹线之间的电阻的方法 Download PDF

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CN108293301B
CN108293301B CN201680065346.7A CN201680065346A CN108293301B CN 108293301 B CN108293301 B CN 108293301B CN 201680065346 A CN201680065346 A CN 201680065346A CN 108293301 B CN108293301 B CN 108293301B
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printed circuit
circuit board
resistance
vapour phase
conductive traces
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CN108293301A (zh
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迪特马尔·比格尔
亚历山大·班瓦尔特
安德烈·贝林格尔
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Endress and Hauser SE and Co KG
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3452—Solder masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/2747—Manufacturing methods using a lift-off mask
    • H01L2224/2748—Permanent masks, i.e. masks left in the finished device, e.g. passivation layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/279—Methods of manufacturing layer connectors involving a specific sequence of method steps
    • H01L2224/27901—Methods of manufacturing layer connectors involving a specific sequence of method steps with repetition of the same manufacturing step
    • H01L2224/27902—Multiple masking steps
    • H01L2224/27906—Multiple masking steps with modification of the same mask
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/08—Treatments involving gases
    • H05K2203/088—Using a vapour or mist, e.g. cleaning using water vapor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
    • H05K2203/1105—Heating or thermal processing not related to soldering, firing, curing or laminating, e.g. for shaping the substrate or during finish plating
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
    • H05K2203/1194—Thermal treatment leading to a different chemical state of a material, e.g. annealing for stress-relief, aging
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/12—Using specific substances
    • H05K2203/127—Lubricants, e.g. during drilling of holes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14—Related to the order of processing steps
    • H05K2203/1476—Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3494—Heating methods for reflowing of solder

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

本发明涉及一种用于稳定印刷电路板(1)上的导电迹线(2)之间的电阻的方法，印刷电路板(1)包括在导电迹线(2)之间绝缘的表面区域中的阻焊剂，该方法包括通过热传递介质来在汽相焊接设备中处理印刷电路板(1)。

Description

用于稳定导电迹线之间的电阻的方法
技术领域
本发明涉及一种用于稳定印刷电路板的导电迹线之间的电阻的方法，其中印刷电路板具有在导电迹线之间绝缘的表面上的阻焊剂。
背景技术
印刷电路板由电绝缘材料和粘附到其的导电迹线组成，导电迹线最常见的是由薄铜层蚀刻。组件焊在焊盘上。结果，组件同时被机械地保持和电连接。
印刷电路板的两个导电迹线之间的电阻由导电迹线之间的材料来确定。该电阻取决于温度和湿度波动。
发明内容
本发明的目的是提供一种用于稳定印刷电路板的导电迹线之间的电阻的方法。
该目的通过本发明的主题来实现。本发明的主题是一种用于稳定印刷电路板的导电迹线之间的电阻的方法，其中印刷电路板在导电迹线之间绝缘的表面区域上具有阻焊剂，所述方法包括通过热传递介质来在汽相焊接设备中处理印刷电路板。
在汽相焊接设备中处理印刷电路板使得导电迹线之间的电阻较少强依赖于温度和湿度波动。接着，能够将组件焊接到印刷电路板上。
在有利的实施例中，将在汽相焊接设备中的印刷电路板的处理重复多次，优选地，两次。
在有利的进一步的发展中，在200℃与260℃之间的温度处执行在汽相焊接设备中的印刷电路板的处理。
在有利的变型中，在10mbar与100mbar之间的压力下执行在汽相焊接设备中的印刷电路板的处理。
在有利的实施例中，在汽相焊接设备中处理印刷电路板持续4分钟至12分钟之间。
在有利的实施例中，热传递介质包括全氟聚醚。
技术领域
现在将基于附图来更具体地解释本发明，附图如下所示：
图1为具有两个导电迹线的印刷电路板的平面图，
图2为在汽相焊接设备中的根据时间的温度和压力的曲线图，
图3a为第一印刷电路板的三个不同的电阻与时间的曲线的曲线图，以及
图3b为第二印刷电路板的三个不同的电阻与时间的曲线的曲线图。
具体实施方式
图1示出了具有两个导电迹线2的印刷电路板1的平面图。箭头标记这两个导电迹线2之间的最短的间隔A。这两个导电迹线2之间的电阻取决于间隔A，然而，还取决于周围温度和环境湿度。
该方法用于使得沿间隔A的电阻独立于温度变化和湿度变化。
用于稳定印刷电路板1的这两个导电迹线2之间的电阻的方法包括如下步骤：
首先，阻焊剂沉积在印刷电路板1的绝缘的表面区域，即，表面区域3上。接着，助焊剂在热空气镀锡过程中沉积(未示出)在将被焊接的印刷电路板1的表面区域上。最后，通过全氟聚醚来在汽相焊接设备中处理印刷电路板1，其中将在汽相焊接设备中的印刷电路板1的处理重复两次。
在200℃与260℃之间的温度处、以及在10mbar与100mbar之间的压力下、以及持续4分钟至12分钟之间来执行在汽相焊接设备中的印刷电路板1的处理。
图2示出了在汽相焊接设备中的印刷电路板1的处理期间根据时间4的温度和根据时间5的压力的曲线图。
图3a示出了当印刷电路板暴露于特殊的环境条件的同时针对间隔A的三个不同的电阻与时间的曲线7、8、9的曲线图。
第一曲线7示出了未处理的印刷电路板的针对间隔A的电阻与时间。在初始条件下，沿间隔A的电阻达到约1014Ω。
在时间点0处，印刷电路板在具有40℃周围温度和93％的湿度的特定环境中。这些环境条件涉及标准测试，利用标准测试，电子产品被测试到他们的极限。在24小时之后，沿间隔A的电阻值下降到约109Ω并且接近约109Ω的允许值。
第二曲线8示出了利用用于稳定阻焊剂的电阻的方法来处理的印刷电路板的沿间隔A的电阻与时间。能够明显地看出，24小时之后的电阻值落到仅仅约1010Ω。与未处理的印刷电路板相比，这是数量级上的提高。
第三曲线9示出了经过两次用于稳定导电迹线之间的电阻的方法之后的印刷电路板的沿间隔A的电阻与时间。能够明显地看出，24小时之后的电阻值显示出与经过一次所述方法之后的电阻值相比而言进一步的提高，因为在此情况下，电阻更不受环境条件的影响。
图3b示出了对应于图3a、但是针对另一类型的印刷电路板的三个不同的曲线7、8、9。
附图标记列表
1 印刷电路板
2 导电迹线
3 绝缘的表面区域
4 温度曲线
5 压力曲线
6 沿间隔A的电阻的曲线
7 第一曲线
8 第二曲线
9 第三曲线
A 间隔

Claims (6)

1.一种用于稳定印刷电路板(1)的导电迹线(2)之间的电阻的方法，其中所述印刷电路板(1)具有在所述导电迹线(2)之间绝缘的表面区域上的阻焊剂，所述方法包括：
通过热传递介质来在汽相焊接设备中处理所述印刷电路板(1)，
其中所述热传递介质包括全氟聚醚。
2.如权利要求1所述的方法，其中在所述汽相焊接设备中对所述印刷电路板(1)的处理重复多次。
3.如权利要求2所述的方法，其中在所述汽相焊接设备中对所述印刷电路板(1)的处理重复两次。
4.如权利要求1至3中的一项所述的方法，其中在200℃与260℃之间的温度处执行在所述汽相焊接设备中对所述印刷电路板(1)的处理。
5.如权利要求1至3中的一项所述的方法，其中在10mbar与100mbar之间的压力下执行在所述汽相焊接设备中对所述印刷电路板(1)的处理。
6.如权利要求1至3中的一项所述的方法，其中在所述汽相焊接设备中对所述印刷电路板(1)的处理持续4分钟至12分钟之间。
CN201680065346.7A 2015-11-11 2016-11-02 用于稳定导电迹线之间的电阻的方法 Expired - Fee Related CN108293301B (zh)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
DE102015119487.2 2015-11-11
DE102015119487.2A DE102015119487A1 (de) 2015-11-11 2015-11-11 Verfahren zum Stabilisieren des Widerstands zwischen Leiterbahnen
DE102016106106.9 2016-04-04
DE102016106106 2016-04-04
PCT/EP2016/076397 WO2017080882A1 (de) 2015-11-11 2016-11-02 Verfahren zum stabilisieren des widerstands zwischen leiterbahnen

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CN108293301B true CN108293301B (zh) 2020-05-19

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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0544934A1 (de) * 1991-11-30 1993-06-09 Endress U. Hauser Gmbh U. Co. Verfahren zum Stabilisieren der Oberflächeneigenschaften von in Vakuum temperaturzubehandelnden Gegenständen
DE19602312A1 (de) * 1995-12-06 1997-06-12 Wolf Werner Otto Verfahren zur Verbindung von Gegenständen mit metallischen Werkstoffen und Vorrichtung hierzu
CN1256067A (zh) * 1998-01-29 2000-06-07 Smk株式会社 电路基板
CN1373480A (zh) * 2001-02-13 2002-10-09 国家淀粉及化学投资控股公司 用于电子设备的具有电学稳定性的导电和电阻材料
CN102822275A (zh) * 2010-03-24 2012-12-12 住友化学株式会社 液状组合物及金属基电路基板
CN202773180U (zh) * 2012-07-25 2013-03-06 四川深北电路科技有限公司 铝基印制电路板

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0544934A1 (de) * 1991-11-30 1993-06-09 Endress U. Hauser Gmbh U. Co. Verfahren zum Stabilisieren der Oberflächeneigenschaften von in Vakuum temperaturzubehandelnden Gegenständen
DE19602312A1 (de) * 1995-12-06 1997-06-12 Wolf Werner Otto Verfahren zur Verbindung von Gegenständen mit metallischen Werkstoffen und Vorrichtung hierzu
CN1256067A (zh) * 1998-01-29 2000-06-07 Smk株式会社 电路基板
CN1373480A (zh) * 2001-02-13 2002-10-09 国家淀粉及化学投资控股公司 用于电子设备的具有电学稳定性的导电和电阻材料
CN102822275A (zh) * 2010-03-24 2012-12-12 住友化学株式会社 液状组合物及金属基电路基板
CN202773180U (zh) * 2012-07-25 2013-03-06 四川深北电路科技有限公司 铝基印制电路板

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EP3375264A1 (de) 2018-09-19
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WO2017080882A1 (de) 2017-05-18

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