CN108183095B - Flexible display panels and its flip chip structure - Google Patents

Flexible display panels and its flip chip structure Download PDF

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Publication number
CN108183095B
CN108183095B CN201711473116.7A CN201711473116A CN108183095B CN 108183095 B CN108183095 B CN 108183095B CN 201711473116 A CN201711473116 A CN 201711473116A CN 108183095 B CN108183095 B CN 108183095B
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Prior art keywords
routing layer
pad
flip chip
chip structure
routing
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CN201711473116.7A
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CN108183095A (en
Inventor
肖友伟
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Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Priority to CN201711473116.7A priority Critical patent/CN108183095B/en
Priority to PCT/CN2018/074005 priority patent/WO2019127786A1/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528Geometry or layout of the interconnection structure

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Geometry (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Liquid Crystal (AREA)

Abstract

The present invention provides a kind of flexible display panels and its flip chip structure, multiple routing layers that the flip chip structure includes substrate, is set in turn on the substrate from below to up, pad area is equipped on each routing layer, pad area in the multiple routing layer is arranged successively along first direction, the multiple pads being arranged in a linear in a second direction are equipped in pad area on each routing layer, the first direction is vertical with the second direction, is equipped with via hole in the routing layer on routing layer where the multiple pad.Flip chip structure proposed by the present invention is by being arranged multiple routing layers and pad being distributed into multiple routing layers, to provide more bond pad arrangement spaces, the too small technique requirement without being able to satisfy COF of spacing of the bond pad arrangement space not enough and between pad under high definition case is solved the problems, such as.

Description

Flexible display panels and its flip chip structure
Technical field
The present invention relates to flexible display technologies field more particularly to a kind of flexible display panels and its flip chip structure.
Background technique
Mobile phone is changed from plane to curved surface currently on the market, in order to expand screen accounting, realizes narrow frame design, 3D or Curve design is becoming increasingly popular.Therefore, flexible display screen is also more and more extensive is used.Currently, on Flexible Displays Driving design mainly using COF (chip on film, flip chip encapsulation) structure, it is great that COF structure becomes Flexible Displays The display technology of competitive advantage, the most commonly used is 1 row's pads or 2 row's pads to set by COF OLB (Outer Lead Bonding) at present Meter.With the development of display technology, requirement of the people to the resolution ratio of flexible display screen is also higher and higher, and resolution requirement is higher More source signal wires are then needed, thus necessarily will increase the number of the end COF OLB pad, existing 1 row pad or 2 rows Pad design is difficult to meet the technique requirement of COF.Accordingly, it is desirable to provide a kind of pad that the technique that can satisfy COF requires is set Meter, to solve the above problems.
Summary of the invention
In order to solve the deficiencies in the prior art, the present invention provides a kind of flexible display panels and its flip chip structure, energy Enough solve high definition case under bond pad arrangement space not enough and pad between the too small technique without being able to satisfy COF of spacing It is required that the problem of.
It is proposed by the present invention the specific technical proposal is: providing a kind of flip chip structure, the flip chip structure includes Substrate, the multiple routing layers being set in turn on the substrate from below to up are equipped with pad area on each routing layer, described Pad area in multiple routing layers is arranged successively along first direction, is equipped in a second direction in the pad area on each routing layer The multiple pads being arranged in a linear, the first direction is vertical with the second direction, the routing layer where the multiple pad On routing layer in be equipped with via hole.
Further, in the multiple routing layer the pad area of two routing layers of arbitrary neighborhood be staggered in second direction it is predetermined Distance.
Further, the preset distance is not less than the length of each pad in this second direction.
Further, the spacing in multiple pads on each routing layer between two pads of arbitrary neighborhood is equal.
Further, between two pads of arbitrary neighborhood in the multiple routing layer on two routing layers of arbitrary neighborhood Spacing is equal.
Further, the shapes and sizes of multiple pads on each routing layer are all the same and/or the multiple cabling The shapes and sizes of multiple pads in layer in two routing layers of arbitrary neighborhood are all the same.
Further, the quantity of multiple pads in each routing layer is equal.
Further, the shapes and sizes of the via hole on each routing layer are different.
Further, the quantity of the via hole on each routing layer is unequal.
The present invention also provides a kind of flexible display panels, the flexible display panels include any flip as above Membrane structure.
Flip chip structure proposed by the present invention includes multiple routing layers, pad area is equipped on each routing layer, often The multiple pads being arranged in a linear in a second direction, walking where the multiple pad are equipped in pad area on one routing layer Via hole is equipped in routing layer on line layer.By the way that multiple routing layers are arranged and pad is distributed into multiple routing layers, from And more bond pad arrangement spaces are provided, solve high definition case under bond pad arrangement space not enough and pad between spacing It is too small without be able to satisfy COF technique require the problem of.
Detailed description of the invention
With reference to the accompanying drawing, by the way that detailed description of specific embodiments of the present invention, technical solution of the present invention will be made And other beneficial effects are apparent.
Fig. 1 is the structural schematic diagram of flip chip structure;
Fig. 2 is the cross-sectional view of flip chip structure in Fig. 1;
Fig. 3 is the structural schematic diagram of driving chip.
Specific embodiment
Hereinafter, with reference to the accompanying drawings to detailed description of the present invention embodiment.However, it is possible to come in many different forms real The present invention is applied, and the present invention should not be construed as limited to the specific embodiment illustrated here.On the contrary, providing these implementations Example is in order to explain the principle of the present invention and its practical application, to make others skilled in the art it will be appreciated that the present invention Various embodiments and be suitable for the various modifications of specific intended application.In the accompanying drawings, identical label will be used for table always Show identical element.
Referring to Fig.1, Fig. 2, flexible display panels provided in this embodiment include display screen, driving chip and flip chip Structure.Multiple routing layers 2 that flip chip structure includes substrate 1, is set in turn on substrate 1 from below to up, each cabling It is equipped with pad area 21 on layer 2, the pad area 21 in multiple routing layers 2 is arranged successively along first direction, on each routing layer 2 Pad area 21 in be equipped with multiple pads 20 for being arranged in a linear in a second direction, first direction is vertical with second direction, multiple Via hole 10 is equipped in the routing layer 21 on routing layer 21 where pad 20.First direction in the present embodiment is Y-axis side To second direction is X-direction.
Driving chip is equipped with a plurality of leads, the total phase of the item number and the pad 20 in flip chip structure of a plurality of leads It is simultaneously electrically connected with corresponding pad 20 Deng the corresponding pad 20 of, each lead.It is located at outermost cabling on substrate 1 Pad 20 on layer 2 is directly contacted with lead corresponding on driving chip, between substrate 1 and outermost routing layer 2 Pad 20 on routing layer 2 passes through via hole 10 and wire contacts corresponding on driving chip.
In the present embodiment, the number of routing layer 2 is that 4 i.e. substrate 1 is equipped with 4 layers of routing layer 2, this 4 routing layers 2 are along under Direction on and is followed successively by the first routing layer, the second routing layer, third routing layer and the 4th routing layer, and the second routing layer is equipped with Via hole 10 corresponding with the pad 20 on the first routing layer, third routing layer are equipped with corresponding with the pad 20 on the first routing layer Via hole 10 and via hole 10 corresponding with the pad 20 on the second routing layer, the 4th routing layer be equipped with on the first routing layer The corresponding via hole 10 of pad 20, via hole 10 corresponding with the pad 20 on the second routing layer and with the pad on third routing layer 20 corresponding via holes 10.
In this way, the pad 20 on the first routing layer passes through on the second routing layer, third routing layer and the 4th routing layer Via hole 10 and the lead on driving chip are in electrical contact, and the pad 20 on the second routing layer passes through third routing layer, the 4th cabling Via hole 10 on layer and the lead on driving chip are in electrical contact, and the pad 20 on third routing layer passes through on the 4th routing layer Via hole 10 and the lead on driving chip are in electrical contact.Certainly, the quantity of routing layer 2 can be according to the size of flip chip structure And the requirement of the resolution ratio of flexible display panels is set.
Referring to Fig. 3, in order to save the cabling space of driving chip, two routing layers 2 of arbitrary neighborhood in multiple routing layers 2 Pad area 21 is staggered preset distance in second direction, i.e., first pad 20 of two neighboring pad area 21 in the X-axis direction it Between distance be preset distance.Preferably, preset distance is not less than each the length, that is, X-axis side of pad 20 in a second direction To length.In this way, multiple leads 30 for being arranged in a linear of driving chip can simultaneously with the pad on adjacent two layers routing layer 2 20 is in electrical contact, and the item number for the multiple leads 30 being arranged in a linear and the sum of the pad 20 on adjacent two layers routing layer 2 are equal, If substrate 1 is equipped with 4 routing layers 2, the quantity of the pad 20 on each routing layer 2 is 10, then only uses on driving chip Two line leads 30 are set, and the item number of the lead 30 of every a line is 20, and the length of lead 30 in the Y-axis direction is greater than pad 20 and exists Length in Y direction allows the lead in every a line to cover the pad 20 on adjacent two layers routing layer 2 simultaneously.
Certainly, the arrangement mode of the lead on the driving chip in the present embodiment can be with the pad in flip chip structure 20 arrangement mode is corresponding, here without limitation.
Spacing phase in multiple pads 20 on each of the present embodiment routing layer 2 between two pads of arbitrary neighborhood Deng the spacing between two pads 20 of arbitrary neighborhood in multiple routing layers 2 on two routing layers 2 of arbitrary neighborhood is equal.It is each The shapes and sizes of multiple pads 20 on a routing layer 2 are all the same, in multiple routing layers 2 in two routing layers 2 of arbitrary neighborhood Multiple pads 20 shapes and sizes it is all the same.I.e. each pad area 21 is equal sized, in each pad area 21 The shapes and sizes and spacing of pad 20 are all the same, and the quantity of multiple pads in each routing layer 2 is also equal, in this way It can simplify the preparation process of pad 20, while making being more evenly distributed for pad 20.
It is in different size due to the contact resistance on each lead of driving chip, between pad 20 and lead Contact area can also have differences.Contact area between pad 20 and lead can change the shape of via hole 10 by change Change with size.Certainly, the shapes and sizes of the via hole 10 in the present embodiment on each routing layer 2 can be identical, passes through Change the quantity of via hole 10 to change the contact area between pad 20 and lead.
In addition, flip chip structure further includes pressing area 3 in the present embodiment, presses and be equipped in area 3 along the x axis linearly Multiple pins 31 of arrangement.Pressing area 3 and pad area 21 both ends that be located at substrate 1 opposite press area 3 and are used for and display screen Bonding pad pressed so that the realization of multiple pins 31 and display screen is electrically connected.
Below by taking resolution ratio is 2160 × 3840 as an example, need to be arranged 3840 pads 20 in flip chip structure, it is assumed that The length of flip chip structure in the X-axis direction is 50 ㎜, and the number of routing layer 2 is 4, then the pad on each layer of routing layer 2 20 number is 960, is designed according to regular bond pads spacing, and the spacing between two neighboring pad 20 is 35 μm, each weldering The length of panel 21 in the X-axis direction is 33.6mm, then the right side edge of the pad area 21 and substrate 1 of first layer routing layer 2 Distance is 8.2mm, and the pad area 21 of the 4th layer of routing layer 2 is 8.2mm, corresponding, substrate at a distance from the left side edge of substrate 1 1 other end keeps for the space in pressing area 3 also can be more, designs according to the spacing between conventional pin 31, presses area 3 The left and right sides 200 pins 31 can also be set more.
The flip chip structure that the present embodiment proposes is by being arranged multiple routing layers 2 and pad 20 being distributed to multiple cablings In layer 2, to provide more bond pad arrangement spaces, bond pad arrangement space is solved under high definition case not enough and pad 20 Between spacing it is too small without be able to satisfy COF technique require the problem of.In addition, the flip chip structure of the present embodiment can be with Increase the area in the pressing area connecting with display screen.
The above is only the specific embodiment of the application, it is noted that for the ordinary skill people of the art For member, under the premise of not departing from the application principle, several improvements and modifications can also be made, these improvements and modifications are also answered It is considered as the protection scope of the application.

Claims (9)

1. a kind of flip chip structure, which is characterized in that including substrate, from below to up be set in turn in it is multiple on the substrate Routing layer is equipped with pad area on each routing layer, and the pad area in the multiple routing layer is arranged successively along first direction, Be equipped with multiple pads for being arranged in a linear in a second direction in pad area on each routing layer, the first direction with it is described Second direction is vertical, is equipped with via hole in the routing layer on routing layer where the multiple pad.
2. flip chip structure according to claim 1, which is characterized in that arbitrary neighborhood two in the multiple routing layer The pad area of routing layer is staggered preset distance in second direction.
3. flip chip structure according to claim 2, which is characterized in that the preset distance is not less than each pad Length in this second direction.
4. flip chip structure according to claim 1, which is characterized in that appoint in multiple pads on each routing layer The spacing anticipated between two neighboring pad is equal.
5. flip chip structure according to claim 4, which is characterized in that arbitrary neighborhood two in the multiple routing layer The spacing between two pads of arbitrary neighborhood on routing layer is equal.
6. flip chip structure according to claim 4, which is characterized in that the shape of multiple pads on each routing layer Shape and size is all the same and/or the multiple routing layer in the shape of multiple pads in two routing layers of arbitrary neighborhood and big It is small all the same.
7. flip chip structure according to claim 1, which is characterized in that the quantity phase of multiple pads in each routing layer Deng.
8. flip chip structure according to claim 1, which is characterized in that the quantity of the via hole on each routing layer not phase Deng.
9. a kind of flexible display panels, which is characterized in that including flip chip structure a method as claimed in any one of claims 1-8.
CN201711473116.7A 2017-12-29 2017-12-29 Flexible display panels and its flip chip structure Active CN108183095B (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN201711473116.7A CN108183095B (en) 2017-12-29 2017-12-29 Flexible display panels and its flip chip structure
PCT/CN2018/074005 WO2019127786A1 (en) 2017-12-29 2018-01-24 Flexible display panel and chip on film structure thereof

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Application Number Priority Date Filing Date Title
CN201711473116.7A CN108183095B (en) 2017-12-29 2017-12-29 Flexible display panels and its flip chip structure

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CN108183095B true CN108183095B (en) 2019-11-22

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Families Citing this family (5)

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Publication number Priority date Publication date Assignee Title
CN109597252A (en) * 2018-12-17 2019-04-09 武汉天马微电子有限公司 Liquid crystal display module and liquid crystal display device
CN109377890B (en) * 2018-12-21 2020-01-21 武汉华星光电半导体显示技术有限公司 Flexible display device
CN110111682B (en) * 2019-04-10 2021-06-01 Tcl华星光电技术有限公司 Chip on film and display device
CN110689812B (en) * 2019-11-11 2022-05-10 昆山国显光电有限公司 Flexible structure, display panel and display device
CN113178132A (en) * 2021-04-01 2021-07-27 Tcl华星光电技术有限公司 Flip chip thin film set, display panel and display module

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003086629A (en) * 2001-09-13 2003-03-20 Hitachi Ltd Cof-type semiconductor device and manufacturing method thereof
TWI253697B (en) * 2005-04-08 2006-04-21 Phoenix Prec Technology Corp Method for fabricating a flip chip package
KR20080059836A (en) * 2006-12-26 2008-07-01 엘지디스플레이 주식회사 Cof and lcd with the same
KR100818116B1 (en) * 2007-06-20 2008-03-31 주식회사 하이닉스반도체 Semiconductor package
CN102650785A (en) * 2012-03-02 2012-08-29 京东方科技集团股份有限公司 Display panel and display device
KR102212323B1 (en) * 2014-02-10 2021-02-04 삼성디스플레이 주식회사 Display device
CN107134443B (en) * 2017-06-23 2019-09-03 厦门天马微电子有限公司 The packaging method of flip chip, display device and integrated circuit
CN107204346B (en) * 2017-07-27 2019-09-24 厦门天马微电子有限公司 Array substrate, display panel and display device
CN107167971A (en) * 2017-07-28 2017-09-15 武汉天马微电子有限公司 Display panel and display device

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