CN110111682B - Chip on film and display device - Google Patents
Chip on film and display device Download PDFInfo
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- CN110111682B CN110111682B CN201910283619.0A CN201910283619A CN110111682B CN 110111682 B CN110111682 B CN 110111682B CN 201910283619 A CN201910283619 A CN 201910283619A CN 110111682 B CN110111682 B CN 110111682B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
Abstract
The application provides a chip on film and display device, through set up the first output pad and the second output pad that are located different layers on chip on film in order to reduce the figure of individual layer output pad for thereby the laminating district width of every output pad in every layer increases and avoids appearing chip on film and display panel and binds bad problem, guarantees that display device normally shows.
Description
Technical Field
The present application relates to the field of display technologies, and in particular, to a chip on film and a display device.
Background
At present, as the requirements of the common consumers On the refresh rate and the resolution of the display are higher and higher, more and more source driver chips are required to be used, and the number of Chip On Film (COF) chips for carrying the source driver chips is also higher and higher. However, due to the size limitation of the display, the larger the number of the flip chips, the smaller the width of the corresponding flip chip, for example, the 8K 120HZ type display and the 8K 120HZ1G1D architecture type display may have the problem of insufficient charging due to the small width of the flip chip, and the HG2D architecture type display needs to be made to avoid the problem of insufficient charging, whereas the HG2D architecture type display has doubled data lines and doubled scan lines compared to the 1G1D architecture type display, so 48 flip chips with 960 channels are needed, and due to the problem of the width of the display panel, the use of the conventional flip chip bonding (bonding) method may cause the problem of poor bonding due to the small finger width between the flip chip and the display panel.
Therefore, a technical solution is needed to solve the problem of poor bonding caused by the small width of the gold finger bonded between the chip on film and the display panel.
Disclosure of Invention
The present application is directed to a chip on film and a display device, in which the width of a gold finger bonded between the chip on film and the display panel is large to avoid the problem of poor bonding.
In order to achieve the above object, the present application provides a chip on film, including:
the flexible substrate is provided with a crystal coating area and a bonding area positioned on one side of the crystal coating area;
the first output pads are arranged on the flexible substrate along a first direction and are positioned in the bonding area;
a first insulating layer covering the flexible substrate and the first output pads and exposing a partial region of each of the first output pads to form a first bonding region of each of the first output pads;
a plurality of second output pads arranged above the first insulating layer along the first direction and located in the bonding region; and
a second insulating layer covering the first insulating layer and the second output pads and exposing a partial region of each of the second output pads to form a second bonding region of each of the second output pads;
in the second direction, the orthographic projection of the second bonding area of the second output pad on the flexible substrate is positioned on one side of the first bonding area, and the second direction is perpendicular to the first direction.
In the chip on film, an orthographic projection of each second output pad on the flexible substrate coincides with an orthographic projection of two adjacent first output pads on the flexible substrate.
In the above chip on film, the lengths of each first output pad and each second output pad along the first direction are the same, and the width of the gap between two adjacent first output pads is the same as the width of the gap between two adjacent second output pads.
In the above chip on film, the first insulating layer is provided with a plurality of first via holes, and the plurality of first via holes are correspondingly arranged above the plurality of first output pads one to one so as to define the first bonding region of each first output pad.
In the above chip on film, a conductive layer is disposed in the first via holes.
In the above chip on film, the conductive layer is a copper foil or an ito layer.
In the above chip on film, the chip on film further includes a plurality of first leads and a plurality of second leads, the first leads and the first output pads are disposed on the same layer, the second leads and the second output pads are disposed on the same layer, the first leads and the first output pads are connected one-to-one and extend to the chip on region, and the second leads and the second output pads are connected one-to-one and extend to the chip on region.
In the above chip on film, the chip on film further includes a driving chip disposed on the first insulating layer and located in the die attach region.
In the above chip on film, the first output pad and the second output pad are both copper foils.
The application still provides a display device, display device includes above-mentioned cover chip film and has the display panel who binds the district, it is provided with a plurality of first input pads side by side and a plurality of second input pads side by side to bind the district, first input pad with second input pad is located different rows, every first input pad and every first output pad first laminating district one-to-one, every second input pad and every second output pad second laminating district one-to-one.
Has the advantages that: the application provides a chip on film and display device, through set up the first output pad and the second output pad that are located different layers on chip on film in order to reduce the figure of individual layer output pad for thereby the laminating district width of every output pad in every layer increases and avoids appearing the problem that chip on film and display device's display panel bind badly, with the normal demonstration of assurance display device.
Drawings
FIG. 1 is a schematic structural diagram of a chip on film according to a first embodiment of the present application;
FIG. 2 is a schematic structural diagram of a second embodiment of a flip chip film according to the present application;
FIG. 3 is a schematic structural diagram of a display panel of a display device according to a first embodiment of the present application;
fig. 4 is a schematic structural diagram of a display panel of a display device according to a second embodiment of the present application.
Reference numerals:
10, 20 flip chip on film; 100, 200 display panels; 11, 21 a flexible substrate; 110, 210 flip-chip region; 111, 211 a fit region; 12, 22 a first output pad; 13, 23 second output pads; 121, 221 a first attaching area; 131, 231 second attaching areas; 122, 222 first coverage area; 132, 232 second coverage area; 14, 24 first leads; 15, 25 second leads; 101, 201 binding region; 1011, 2011 first input pad; 1012, 2012 second input pad
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
According to the display device, the number of the single-layer output pads is reduced by arranging the first output pads and the second output pads which are positioned on different layers on the chip on film, so that the width of the bonding area of each output pad in each layer is increased, and the problem of poor bonding between the chip on film and the display panel of the display device is avoided.
Referring to fig. 1, which is a schematic structural diagram of a chip on film 10 according to a first embodiment of the present application, the chip on film 10 includes:
the flexible substrate 11 is provided with a crystal covering region 110 and a bonding region 111 positioned on one side of the crystal covering region 110;
a plurality of first output pads 12 arranged on the flexible substrate 11 along the first direction and located in the bonding region 111;
a first insulating layer covering the flexible substrate 11 and the first output pads 12 and exposing a partial region of each first output pad 12 to form a first bonding region 121 of each first output pad 12;
a plurality of second output pads 13 arranged above the first insulating layer along the first direction and located in the bonding region 111; and
a second insulating layer covering the first insulating layer and the second output pads 13 and exposing a partial region of each second output pad 13 to form a second bonding region 131 of each second output pad 13;
in a second direction, the orthographic projection of second attaching area 131 of second output pad 13 on flexible substrate 11 is located on one side of first attaching area 121, and the second direction is perpendicular to the first direction.
In the present embodiment, the flexible substrate 11 is a flexible substrate, which includes but is not limited to a polyimide substrate. The flexible substrate 11 has a flip area 110 and a bonding area 111, the flip area 110 is used for binding the driving chip, and the bonding area 111 is used for setting an input pad and binding the input pad and the display panel to transmit data information in the driving chip to the display panel so that the display panel displays the data information.
In this embodiment, the first output pads 12 are disposed side by side in the y-axis direction in the bonding region 111 of the flexible substrate 11, the first output pads 12 are rectangular, the width of the first output pads 12 is parallel to the y-axis direction, the length of each first output pad 12 in the y-axis direction is 56 ± 2 micrometers, and the gap width between two adjacent first output pads 12 is 10 ± 1 micrometer. The first output pad 12 is a copper foil. The area of the first output pad 12 covered by the first insulating layer is a first covering area 122, and the area of the first insulating layer exposing the first output pad 12 is a first bonding area 121. Compared with the conventional first output pad with a width of only 28 μm, the width of the first output pad in this embodiment is doubled, so that the problem of poor binding between the first output pad 12 and the display panel can be avoided. The first direction is a y-axis direction and the second direction is an x-axis direction.
In the present embodiment, the first insulating layer is used to cover the flexible substrate 11 and the circuit on the flexible substrate 11 to prevent the circuit on the flexible substrate 11 from being shorted or damaged. The first insulating layer is an organic insulating layer. The first insulating layer is provided with a plurality of first via holes (not shown), the plurality of first via holes are arranged above the plurality of first output pads 12 in a one-to-one correspondence manner to define the first attaching region 121 of each first output pad 12, that is, the plurality of first via holes are arranged side by side along the y-axis direction, the first via holes are rectangular, the length of each first via hole along the y-axis direction is 56 ± 2 micrometers, and the distance between two adjacent first via holes is 10 ± 1 micrometer. A conductive layer is arranged in the first via holes, the conductive layer is a copper foil or an indium tin oxide layer, and the first output pad 12 is electrically connected with the display panel through the conductive layer. The thickness of the conductive layer is the sum of the thickness of the first insulating layer and the thickness of the second output pad, so that the conductive layer and the second output pad are positioned on the same plane and are better bonded with the display panel.
In this embodiment, the second output pads 13 are disposed on the first insulating layer side by side along the y-axis direction and located in the bonding region 111, the second output pads 13 are rectangular, the width of the second output pads 13 is parallel to the y-axis direction, the width of the second output pads 13 along the y-axis direction is 56 ± 2 micrometers, the gap width of two adjacent second output pads 13 is 10 ± 1 micrometer, that is, the length of each first output pad 12 and each second output pad 13 along the first direction (y-axis direction) is the same, and the gap width between two adjacent first output pads 12 is the same as the gap width between two adjacent second output pads 13. The area of the second output pad 13 covered by the second insulating layer is a second covering area 132, and the area of the second output pad 13 not covered by the second insulating layer is a second bonding area 131. The second output pad 13 is directly bonded to the display panel through the second bonding region 131. The second output pad 13 is a copper foil. In other embodiments, the length of each second output pad 13 in the y-axis direction is greater than the length of each first output pad 12 in the y-axis direction, and the gap width between two adjacent first output pads 12 is the same as the gap width between two adjacent second output pads 13.
Further, the orthographic projection of each second output pad 13 on the flexible substrate 11 is coincident with the orthographic projection of two adjacent first output pads 12 on the flexible substrate 11. The orthographic projection of the second output pad 13 on the flexible substrate 11 is overlapped with the orthographic projections of two adjacent first output pads 12 on the flexible substrate 11, so that the layout space of the attaching region 111 is saved.
In this embodiment, the second insulating layer covers the first insulating layer and the circuit on the first insulating layer to prevent the circuit on the first insulating layer from being shorted or damaged. The second insulating layer is not covered with the conductive layer to ensure that the conductive layer can be bound with the display panel. The second insulating layer is an organic insulating layer.
In this embodiment, the chip on film 10 further includes a plurality of first leads 14 and a plurality of second leads 15, the first leads 14 and the first output pads 12 are disposed in the same layer, the second leads 15 and the second output pads 13 are disposed in the same layer, the first leads 14 and the first output pads 12 are connected one-to-one and extend to the die attach region 110, and the second leads 15 and the second output pads 13 are connected one-to-one and extend to the die attach region 110. Specifically, a plurality of first leads 14 are disposed on the flexible substrate 11 and covered by the first insulating layer, one end of each first lead 14 is connected to the first output pad 12 of the first covering region 122, and the other end extends to the flip-chip region 110; the plurality of second wires 15 are disposed on the first insulating layer and covered by the second insulating layer, one end of each second wire 15 is connected to the second output pad 13 of the second covering region 132, and the other end extends to the flip chip region 110.
In the present embodiment, the chip on film 10 further includes a driving chip (not shown) disposed on the first insulating layer and located in the die region. The driving chip is disposed on the first insulating layer, the plurality of second leads 15 are electrically connected to the driving chip, and the plurality of first leads 14 are connected to the driving chip through via holes in the first insulating layer.
Please refer to fig. 2, which is a schematic structural diagram of a chip on film 20 according to a second embodiment of the present application, wherein the chip on film 20 includes:
the flexible substrate 21 is provided with a crystal covering region 210 and a bonding region 211 positioned on one side of the crystal covering region 210;
a plurality of first output pads 22 arranged on the flexible substrate 21 side by side along the first direction and located in the bonding region 211;
a first insulating layer covering the flexible substrate 21 and the first output pads 22 and exposing a partial region of each first output pad 22 to form a first bonding region 221 of each first output pad 22;
a plurality of second output pads 23 arranged side by side along the first direction above the first insulating layer and located in the bonding region 211; and
a second insulating layer covering the first insulating layer and the second output pads 23 and exposing a partial region of each second output pad 23 to form a second bonding region 231 of each second output pad 23;
in a second direction, the orthographic projection of the second attaching area 231 of the second output pad 23 on the flexible substrate 21 is located on one side of the first attaching area 221, and the second direction is perpendicular to the first direction.
This embodiment is substantially similar to the first embodiment, except that the orthographic projection of each second output pad 23 on the flexible substrate 21 and the orthographic projection of each first output pad 21 on the flexible substrate 21 are exactly coincident in the first direction, and partially coincident in the second direction, which also results in the routing layout space of the first lead 24 and the second lead 25 being different from the routing layout space of the first lead 14 and the second lead 15 in the first embodiment.
In the present embodiment, the first output pad 22 has a first footprint 222 and a first pasting region 221, and the second output pad 23 has a second footprint 232 and a second pasting region 231. In order to increase the bonding area of each of the first output pads 22 and each of the second output pads 23 to the display panel, the length of the first cover region 222 in the second direction (x-axis direction) is less than the length of the first attaching region 221 in the second direction, and the length of the second cover region 232 in the second direction is less than the length of the second attaching region 231 in the second direction.
The application also provides a display device, the display device can be a liquid crystal display panel, electronic paper, an organic light emitting diode display, a tablet computer, a television and other products or components with display functions, the display device comprises the first embodiment of the flip chip or the second embodiment of the flip chip and a display panel with a binding area, the binding area is provided with a plurality of first input pads side by side and a plurality of second input pads side by side, the first input pads and the second input pads are positioned in different rows, each first input pad is in one-to-one correspondence with the first bonding area of each first output pad, and each second input pad is in one-to-one correspondence with the second bonding area of each second output pad.
Please refer to fig. 3 and 4, which respectively illustrate a display panel 100 corresponding to the chip on film 10 in the first embodiment and a display panel 200 corresponding to the chip on film 20 in the second embodiment. A first input pad 1011 and a second input pad 1012 are arranged in the binding region 101 in fig. 3, and the first input pad 1011 and the second input pad 1012 are arranged in different rows and different columns; the bonding area 201 in fig. 4 has a first input pad 2011 and a second input pad 2012 disposed therein, and the first input pad 2011 and the second input pad 2012 are disposed in different rows and in the same column. The length of each first input pad (1011, 2011) along the x-axis direction is not less than the length of each first output pad (12, 22) along the y-axis, and the length of each second input pad (1012, 2012) along the x-axis is not less than the length of each second output pad (13, 23) along the y-axis.
According to the display device, the first output pad and the second output pad which are located on different layers are arranged on the chip on film and matched with the first input pad and the second input pad which are arranged on the same layer on the display panel, so that normal display of the display device is guaranteed.
The above description of the embodiments is only for assisting understanding of the technical solutions and the core ideas thereof; those of ordinary skill in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications or substitutions do not depart from the spirit and scope of the present disclosure as defined by the appended claims.
Claims (9)
1. A chip on film, comprising:
the flexible substrate is provided with a crystal coating area and a bonding area positioned on one side of the crystal coating area;
the first output pads are arranged on the flexible substrate along a first direction and are positioned in the bonding area;
a first insulating layer covering the flexible substrate and the first output pads and exposing a partial region of each of the first output pads to form a first bonding region of each of the first output pads;
a plurality of second output pads arranged above the first insulating layer along the first direction and located in the bonding region; and
a second insulating layer covering the first insulating layer and the second output pads and exposing a partial region of each of the second output pads to form a second bonding region of each of the second output pads;
in a second direction, the orthographic projection of the second attaching area of the second output pad on the flexible substrate is positioned on one side of the first attaching area, and the second direction is perpendicular to the first direction;
wherein the orthographic projection of each second output pad on the flexible substrate is coincident with the orthographic projection of two adjacent first output pads on the flexible substrate, or,
the orthographic projection of one second output pad on the flexible substrate and the orthographic projection of one first output pad on the flexible substrate are exactly coincident in the first direction.
2. The chip on film of claim 1, wherein each of the first output pads and each of the second output pads have the same length along the first direction, and a gap width between two adjacent first output pads is the same as a gap width between two adjacent second output pads.
3. The chip on film of claim 1, wherein a plurality of first vias are disposed on the first insulating layer, and the plurality of first vias are disposed above the plurality of first output pads in a one-to-one correspondence to define the first bonding region of each of the first output pads.
4. The chip on film of claim 3, wherein a plurality of the first vias are disposed therein with a conductive layer.
5. The chip on film of claim 4, wherein the conductive layer is a copper foil or an ITO layer.
6. The chip on film of claim 1, further comprising a plurality of first leads and a plurality of second leads, wherein the first leads are disposed on a same layer as the first output pads, the second leads are disposed on a same layer as the second output pads, the first leads are connected to the first output pads one-to-one and extend to the flip chip region, and the second leads are connected to the second output pads one-to-one and extend to the flip chip region.
7. The chip on film of claim 1, further comprising a driving chip disposed on the first insulating layer and located in the die attach region.
8. The chip on film of claim 1, wherein the first output pad and the second output pad are both copper foils.
9. A display device, comprising the chip on film according to any one of claims 1 to 8 and a display panel having a bonding area, wherein the bonding area is provided with a plurality of first input pads arranged side by side and a plurality of second input pads arranged side by side, the first input pads and the second input pads are located in different rows, each of the first input pads corresponds to each of the first bonding areas of the first output pads, and each of the second input pads corresponds to each of the second bonding areas of the second output pads.
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| CN201910283619.0A CN110111682B (en) | 2019-04-10 | 2019-04-10 | Chip on film and display device |
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| CN201910283619.0A CN110111682B (en) | 2019-04-10 | 2019-04-10 | Chip on film and display device |
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| CN110111682B true CN110111682B (en) | 2021-06-01 |
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Families Citing this family (6)
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| CN110579915A (en) * | 2019-08-06 | 2019-12-17 | 深圳市华星光电技术有限公司 | flip Chip On Film (COF) set, display module and bonding method of COF set |
| CN111430421B (en) * | 2020-04-02 | 2023-08-15 | 京东方科技集团股份有限公司 | Display device and method for manufacturing the same |
| CN112669707B (en) * | 2020-12-22 | 2023-05-12 | 武汉天马微电子有限公司 | Display panel, flexible circuit board and display device |
| CN113589893A (en) * | 2021-07-28 | 2021-11-02 | Tcl华星光电技术有限公司 | Chip on film and display device |
| CN113838378B (en) * | 2021-09-15 | 2023-07-25 | 昆山国显光电有限公司 | Display module and display device |
| WO2024055205A1 (en) * | 2022-09-14 | 2024-03-21 | 京东方科技集团股份有限公司 | Chip on film, manufacturing method therefor, and display device |
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