CN106647066A - Display panel - Google Patents
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- CN106647066A CN106647066A CN201510732134.7A CN201510732134A CN106647066A CN 106647066 A CN106647066 A CN 106647066A CN 201510732134 A CN201510732134 A CN 201510732134A CN 106647066 A CN106647066 A CN 106647066A
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- China
- Prior art keywords
- signal
- signal lead
- cabling
- display floater
- pixel region
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Classifications
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
- G02F1/13452—Conductors connecting driver circuitry and terminals of panels
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
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- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Optics & Photonics (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The invention relates to a display panel. Pixel regions of the display panel include the main pixel region with a main pixel array, an edge pixel region extending out of the main pixel region from the edge of the main pixel region, a plurality of first signal wires, a plurality of second signal wires, a plurality of third signal wires and a plurality of fourth signal wires; the edge pixel region comprises a plurality of edge pixel arrays, and a gap is reserved between every two adjacent edge pixel arrays; the multiple second signal wires are perpendicular to the first signal wires and are electrically connected with the main pixel array, the multiple third signal wires are perpendicular to the first signal wires and are electrically connected with all pixels along the same straight lines in the same edge pixel arrays, the multiple fourth signal wires are parallel to the first signal wires, one end of each fourth signal wire is connected with the corresponding third signal wire, and the other ends of the fourth signal wires penetrate through the main pixel region and are connected to signal drivers in surrounding area. Each fourth signal wire is located between the two corresponding adjacent first signal wires and located between the two corresponding rows of pixels. Due to the mode that the fourth signal wires penetrate through the main pixel region, the effect of a narrow frame can be achieved.
Description
Technical field
The present invention relates to a kind of display floater, more particularly to a kind of display floater with non-rectangle viewing area
And its cabling mode.
Background technology
Display floater is that, to being formed after group, the array base palte includes showing by array base palte and color membrane substrates
Area and peripheral wiring region, the viewing area includes gate line and data wire arranged in a crossed manner, and gate line and
The thin film transistor (TFT) in pixel region and pixel electrode that data wire is limited.The peripheral wiring region includes and grid
The grid drive chip of polar curve connection, the source driving chip being connected with data wire.
Fig. 1 is to represent the schematic diagram that the typical case of existing active matrix display devices is constituted.As shown in figure 1, existing
The display part 1 for having active matrix display devices is usually rectangular shape.In the number for pressing rectangular configuration mutually
Possesses the thin film transistor (TFT) in pixel and pixel region according to the cross part of line 3 and scan line 2.In a scanning
During have input strobe pulse on line 2, the thin film transistor (TFT) that gate terminal is connected with the scan line 2 becomes
Conducting state, the signal potential after charging on data wire 3 is applied in pixel, such as on liquid crystal.Due to this
Current potential, the optical characteristics of liquid crystal material will change, and can change display.
With fast-developing and people's living standard, the continuous improvement of esthetic sentiment of Display Technique, show
Shape, the display effect in region increasingly obtain the attention of people.Therefore, viewing area is no longer limited to pass
The rectangle of system shows, meanwhile, the continuous expansion of the application of display, with non-rectangle viewing area
Display device has obtained developing faster, for example：Circular display area shown in Fig. 2.Wherein, it is above-mentioned
Circle, including other for example semicircle, similar rounds with wavy edge or " cardioid " structures is aobvious
Show region, in can be applicable to the various devices for needing display such as wrist-watch, onboard instruments disk.
Additionally, it is limited to that display device is lightening and development trend of narrow frame, the Zhou Bianqu of display device
Domain is more and more narrow, for the display device with non-rectangle viewing area, how in limited Zhou Bianqu
The rational cabling mode to non-rectangle viewing area is improved to adapt to above-mentioned lightening and narrow frame sending out
Exhibition trend is one is worth the problem of research.
The content of the invention
It is an object of the invention to provide a kind of display floater, display floater has non-rectangle viewing area, logical
Cross and the cabling of non-rectangle viewing area is passed through from the range of the visible area of display floater and connected whole or in part
Driver is connected to, the cabling quantity of neighboring area is reduced, so as to reach the effect of narrow frame or Rimless.
The present invention provides a kind of display floater, and the display floater has pixel region, it is characterised in that the pixel
Region includes
Main pixel region, the main pixel region is provided with main pel array；
Peripheral pixel area, the peripheral pixel area extends and protrudes from the master from the edge of the main pixel region
Pixel region, the peripheral pixel area is included in multiple edge pixel arrays, and the plurality of edge pixel array
Two edge pixel arrays of arbitrary neighborhood between have interval cause two edge pixel arrays of arbitrary neighborhood it is equal
Directly do not connect；
A plurality of first signal lead, is electrically connected at the main pel array and the edge pixel array；
A plurality of secondary signal cabling, perpendicular to a plurality of first signal lead, and is electrically connected at the main pixel
Array；
A plurality of 3rd signal lead, perpendicular to a plurality of first signal lead, each article of the 3rd signal lead electricity
Property be connected to all pixels being located along the same line in same edge pixel array, the straight line with this second letter
Number cabling is parallel；And
A plurality of 4th signal lead, parallel to a plurality of first signal lead, each article of the 4th signal lead
One end connects wherein one article the 3rd signal lead, and the other end of the 4th signal lead passes through the main pixel region
And it is connected to the signal driver of the neighboring area of the display floater；
Wherein, each article of the 4th holding wire is located between adjacent two article of first signal lead, and the 4th signal
Line is located between adjacent two rows pixel.
Used as optional technical scheme, each article of the 3rd signal lead is electrically connected at corresponding one article the 4th
Signal lead.
As optional technical scheme, all three be located along the same line in the plurality of edge pixel array
Signal lead is electrically connected with by connecting line.
Used as optional technical scheme, the connecting line is arranged along the edge bending of corresponding edge pel array.
Used as optional technical scheme, the quantity being located along the same line in the plurality of edge pixel array is unique
All 3rd signal leads, be respectively and electrically connected to corresponding 4th signal lead.
Used as optional technical scheme, each secondary signal cabling extended and via this week towards the neighboring area
Border area domain is connected to the signal driver.
Used as optional technical scheme, the pixel region is also included parallel to a plurality of first signal lead extremely
Few one article of the 5th signal lead, one end of each article of the 5th signal lead connects corresponding one article of secondary signal and walks
Line, the other end of the 5th signal lead passes through the main pixel region and is connected to the signal driver.
As optional technical scheme, the secondary signal cabling of the 5th signal lead is not electrically connected with towards this week
Border area domain extends and is connected to the signal driver via the neighboring area.
Used as optional technical scheme, a plurality of first signal lead is data wire, and a plurality of secondary signal is walked
Line and a plurality of 3rd signal lead are gate line, and the signal driver is gate drivers；Or, this is more
The signal lead of bar first is gate line, and a plurality of secondary signal cabling and a plurality of 3rd signal lead are data
Line, the signal driver is source electrode driver.
As optional technical scheme, there are two row's pixels between adjacent two first signal leads；Or,
There are three row's pixels between adjacent two first signal leads.
Compared with prior art, secondary signal cabling of the invention and the 3rd signal lead, partly or entirely
Not from the neighboring area cabling of main pixel region both sides, but utilize and be routed in main pel array and with second
The 5th signal lead and the 4th signal lead with the electric connection of the 3rd signal lead that signal lead is electrically connected with
Transmission signal, by the setting of such cabling mode the cabling quantity of neighboring area can be efficiently reduced,
So as to reach the effect of narrow frame or Rimless.Therefore, the pel array using the present invention and its wiring side
The display floater of formula, can meet the trend of narrow frame.
Description of the drawings
Fig. 1 is the schematic diagram that the typical case of active matrix display devices in prior art is constituted.
Fig. 2 is the schematic diagram of circular display area in prior art.
Fig. 3 is the schematic diagram of the embodiment one of the display floater cabling mode of the present invention.
Fig. 4 is the schematic diagram of the embodiment two of the display floater cabling mode of the present invention.
Fig. 5 is the schematic diagram of the embodiment three of the display floater cabling mode of the present invention.
Fig. 6 is the schematic diagram of the embodiment four of the display floater cabling mode of the present invention.
Fig. 7 is the schematic diagram of an embodiment of the display floater of the present invention.
Fig. 8 is the schematic diagram of another embodiment of the display floater of the present invention.
Specific embodiment
Describe the present invention below in conjunction with the drawings and specific embodiments, but not as to the present invention's
Limit.
Fig. 3 is the schematic diagram of the embodiment one of the display floater cabling mode of the present invention, refer to Fig. 3, is shown
Show that panel 100 has pixel region, pixel region includes main pixel region and peripheral pixel area.In this reality
In applying mode, peripheral pixel area is to extend and protrude from main pixel region from the top edge of main pixel region,
Certainly, in other embodiments, peripheral pixel area can also be other edge (examples from main pixel region
Such as lower limb or left and right edges) extend and protrude from main pixel region.
Main pixel region is provided with main pel array 110, and main pel array 110 is generally regular shape, for example
The rectangle of three horizontally-arranged pixel arrangements of pixel region downside in Fig. 3, peripheral pixel area includes multiple sides
Edge pel array 120, depending on the shape foundation panel-shaped of edge pixel array 120, such as pixel in Fig. 3
The pel array of the similar triangular pitch on the upside of region, or for circular display floater, heart-shaped display surface
The pel array of the similar semicircle arrangement in plate, and have between the edge pixel array 120 of arbitrary neighborhood
There is interval, with the state for keeping not connecting.
Pixel region also includes multi-signal cabling, and a plurality of first signal lead 111 is electrically connected with main pixel battle array
Row 110 and edge pixel array 120；A plurality of secondary signal cabling 112, perpendicular to the first signal lead 111,
It is electrically connected with main pel array 110；A plurality of 3rd signal lead 113, perpendicular to the first signal lead 111,
Each article of the 3rd signal lead 113 be electrically connected with same edge pixel array 120 positioned at same straight line
All pixels on (above-mentioned straight line parallel is in secondary signal cabling 112)；A plurality of 4th signal lead 114, puts down
Row connects wherein one article the 3rd signal in the first signal lead 111, one end of each article of the 4th signal lead 114
Cabling 113, the other end of the 4th signal lead 114 passes through main pixel region, and is connected to the letter of neighboring area
Number driver 130, wherein, each article of the 4th signal lead 114 is located at adjacent two article of first signal lead 111
Between, and between adjacent two rows pixel, in the present embodiment, each article of the 4th signal lead 114
Between the pixel of two tandems, in other embodiments, each article of the 4th signal lead 114 also can position
Between two horizontally-arranged pixels.
In the present embodiment, all of 3rd signal lead 113 is respectively walked by corresponding 4th signal
Line 114 can save the Zhou Bianqu in the both sides of main pel array 110 from the inside cabling of main pel array 110
The former cabling space in domain, reaches the effect of narrow frame.
In the present embodiment, the first signal lead 111 is data wire, secondary signal cabling 112 and the 3rd
Signal lead 113 is gate line, and signal driver 130 is gate drivers.
In view of the 4th signal lead 114 from 110 inside cabling of main pel array when, pixel battle array may be affected
The visual effect of row, present embodiment adopts the driving side of half source drive HSD (half source drive)
Formula, i.e., have two tandem pixels, that is to say, that the drive of HSD between two adjacent the first signal leads 111
Under flowing mode, the number of the first signal lead 111 only needs original half, and the 4th signal lead 114 can
Visuality to be arranged in the region of the first signal lead 111 saved, without affecting pel array.
Fig. 4 is the schematic diagram of the embodiment two of the display floater cabling mode of the present invention.Fig. 4 is refer to, is shown
The pixel region for showing panel 200 has main pixel region 210, multiple peripheral pixel areas 220 and is mutually perpendicular to
A plurality of first signal lead 211 and a plurality of secondary signal cabling 212, wherein, a plurality of secondary signal cabling
212 are electrically connected with the signal driver 230 of the neighboring area of display floater 200.It is different from embodiment one
, in the present embodiment, (such as horizontally-arranged side on the same straight line between each peripheral pixel area 220
To) all 3rd signal leads 213 be electrically connected with by connecting line 215, connecting line 215 is along corresponding
The edge bending of edge pixel array 220 is arranged, and it is to reduce connecting line as far as possible to bend the purpose for arranging
215 wiring space.
After by concatenating connecting line 215, the 3rd signal on the straight line of all edge pixel arrays 220
Wherein one article the 3rd signal lead 213 is only needed to be electrically connected with after one article of the 4th signal lead 214 in cabling 213,
Other the 3rd signal leads 213 on the straight line will be all in being electrically connected at the signal lead 214 of this article the 4th
State, i.e., all 3rd signal lead, 213 need on the straight line of all edge pixel arrays 220
One article of the 4th signal lead 214 is electrically connected with, increasing the setting of connecting line 215 can reduce by the 4th letter
The quantity of number cabling 214.Wherein, the 4th signal lead 214 is parallel to the first signal lead 211.
Fig. 5 is the schematic diagram of the embodiment three of the display floater cabling mode of the present invention, refer to Fig. 5, is shown
The pixel region for showing panel 300 has main pixel region 310 with multiple peripheral pixel areas 320.With embodiment party
Formula two similarly, in present embodiment, between peripheral pixel area 320 also by bending connecting line 315
It is electrically connected with, unique all 3rd letters of the quantity being located along the same line in multiple edge pixel arrays 320
Number cabling 313, is respectively and electrically connected to corresponding 4th signal lead 314, all of 4th signal lead 314
Through main pixel region 310, the signal driver 330 of the neighboring area of display floater 300 is connected to.
Except for the difference that, in the present embodiment, display floater 300 also includes that at least one the 5th signal is walked
Line 316, the 5th signal lead 316 increases by the 5th signal lead 316 parallel to the first signal lead 311
Purpose is to be electrically connected with secondary signal cabling 312 and for the transmission of the signal of secondary signal cabling 312, is connected
The mode of connecing is that one end of each article of the 5th signal lead 316 connects corresponding one article of secondary signal cabling 312, should
The other end of the 5th signal lead 316 is through the main pixel region 310 and is connected to the signal driver 330.
That is, not being using secondary signal cabling in embodiment one and embodiment two in present embodiment
112nd, 212 cabling mode, i.e., all of secondary signal cabling 112,212 is extended simultaneously towards neighboring area
Signal driver 130,230 is connected to via neighboring area, conversely, present embodiment is then by the second letter
Number cabling 312 utilizes mode of the 5th signal lead 316 from the inside cabling of main pel array 310, can enter one
Step reduction both sides are the cabling space of neighboring area.
In the present embodiment, all of secondary signal cabling 312 is all by corresponding 5th signal lead
316 are connected to signal driver 330, and the neighboring area of the both sides of main pel array 310 does not have any cabling,
Cabling space can be reduced to minimum；Certainly, in other embodiments, for example it is of the invention shown in Fig. 6
The embodiment four of the cabling mode of display floater 400, according to the demand of actual cabling, can also only have part
Binary signal cabling 412 is connected to signal driver 430 by the 5th signal lead 416, and other electrically do not connect
The secondary signal cabling 412 of the 5th signal lead 416 is connect still from the periphery of the both sides of main pel array 410
Region cabling, i.e. these secondary signal cablings 412 still extend towards neighboring area and are connected to via neighboring area
The signal driver 430.Wherein, the 5th signal lead 416 is parallel to the first signal lead 411.
Fig. 7 is the schematic diagram of an embodiment of the display floater of the present invention, in above-mentioned embodiment, phase
Adjacent two the first signal leads 111,211,311,411 have two row's pixels, Fig. 7 are refer to, in this reality
In applying mode, display floater 500 is driven by the way of OTSD (one third source drive),
There are three tandem pixels, that is to say, that the driving side of OTSD between two i.e. adjacent the first signal leads 511
Under formula, the number of the first signal lead 511 only needs original 1/3rd, and the wiring space having more can use
In the cabling of the 4th signal lead 514, using the wire laying mode in above-mentioned embodiment narrow frame is can reach
Effect.
Fig. 8 is the schematic diagram of another embodiment of the display floater of the present invention, Fig. 8 is refer to, in this enforcement
In mode, the first signal lead 611 is gate line, the signal lead 613 of secondary signal cabling 612 and the 3rd
For data wire, signal driver 630 is source electrode driver.By by two adjacent the first signal leads
611 (gate lines) are made between the horizontally-arranged pixel of identical two, and the signal of original first such that it is able to vacate half is walked
, to the 4th signal lead 614 of arranging, the 4th signal lead 614 is parallel to the first letter for the wiring space of line 611
Number cabling 611, one end of each article of the 4th signal lead 614 connects wherein one article the 3rd signal lead 613,
The other end passes through main pixel region, is connected to the signal driver 630 of the neighboring area of display floater 600, its
In, each article of the 4th signal lead 614 is located between adjacent two article of first signal lead 611, and positioned at phase
Between adjacent two row's pixels.
In the present invention, the type of drive of display floater is not restricted, and only needs the cabling space between pixel not have
Have and be covered with by the first signal lead, you can other are used for the space of the signal lead of original first that will be had more
The wiring of cabling, for example, be electrically connected with the 5th signal lead or the 3rd signal of secondary signal cabling for arrangement
4th signal lead of cabling, walks so as to reduce partly or completely former secondary signal cabling or the 3rd signal
The space of the neighboring area cabling from main pixel region both sides of line, to reach the purpose of narrow frame.
In sum, compared with prior art, secondary signal cabling of the invention and the 3rd signal lead, portion
Divide or fully not from the neighboring area cabling of main pixel region both sides, but utilize and be routed at main pel array
In and the 5th signal lead being electrically connected with secondary signal cabling and be electrically connected with the 3rd signal lead the
Four signal leads transmit signal, and by the setting of such cabling mode neighboring area can be efficiently reduced
Cabling quantity, so as to reach the effect of narrow frame or Rimless.Therefore, using the pel array of the present invention
And its display floater of wire laying mode, the trend of narrow frame can be met.
Certainly, the present invention can also have other various embodiments, in the feelings without departing substantially from spirit of the invention and its essence
Under condition, those of ordinary skill in the art can make various corresponding changes and deformation, but this according to the present invention
A little corresponding changes and deformation should all belong to the protection domain of appended claims of the invention.
Claims (10)
1. a kind of display floater, the display floater has pixel region, it is characterised in that the pixel region includes
Main pixel region, the main pixel region is provided with main pel array；
Peripheral pixel area, the peripheral pixel area extends and protrudes from the master from the edge of the main pixel region
Pixel region, the peripheral pixel area is included in multiple edge pixel arrays, and the plurality of edge pixel array
Two edge pixel arrays of arbitrary neighborhood between have interval so that two edge pixel arrays of arbitrary neighborhood
Directly do not connect；
A plurality of first signal lead, is electrically connected at the main pel array and the edge pixel array；
A plurality of secondary signal cabling, perpendicular to a plurality of first signal lead, and is electrically connected at the main pixel
Array；
A plurality of 3rd signal lead, perpendicular to a plurality of first signal lead, each article of the 3rd signal lead electricity
Property be connected to all pixels being located along the same line in same edge pixel array, the straight line with this second letter
Number cabling is parallel；And
A plurality of 4th signal lead, parallel to a plurality of first signal lead, each article of the 4th signal lead
One end connects wherein one article the 3rd signal lead, and the other end of the 4th signal lead passes through the main pixel region
And it is connected to the signal driver of the neighboring area of the display floater；
Wherein, each article of the 4th holding wire is located between adjacent two article of first signal lead, and the 4th signal
Line is located between adjacent two rows pixel.
2. display floater as claimed in claim 1, it is characterised in that each article of the 3rd signal lead is electrical
It is connected to corresponding one article of the 4th signal lead.
3. display floater as claimed in claim 1, it is characterised in that be located in the plurality of edge pixel array
All 3rd signal leads on same straight line are electrically connected with by connecting line.
4. display floater as claimed in claim 3, it is characterised in that the connecting line is along corresponding edge pixel battle array
The edge bending of row is arranged.
5. display floater as claimed in claim 3, it is characterised in that the plurality of edge pixel array middle position
Unique all 3rd signal leads of quantity on same straight line, are respectively and electrically connected to corresponding 4th letter
Number cabling.
6. display floater as claimed in claim 1, it is characterised in that each secondary signal cabling is towards this week
Border area domain extends and is connected to the signal driver via the neighboring area.
7. display floater as claimed in claim 1, it is characterised in that the pixel region is also included parallel to this
At least one the 5th signal lead of a plurality of first signal lead, one end connection of each article of the 5th signal lead
A corresponding secondary signal cabling, the other end of the 5th signal lead passes through the main pixel region and connects
To the signal driver.
8. display floater as claimed in claim 7, it is characterised in that be not electrically connected with the 5th signal lead
Secondary signal cabling extend towards the neighboring area and be connected to the signal driver via the neighboring area.
9. display floater as claimed in claim 1, it is characterised in that a plurality of first signal lead is data
Line, a plurality of secondary signal cabling and a plurality of 3rd signal lead are gate line, and the signal driver is grid
Driver；Or, a plurality of first signal lead is gate line, a plurality of secondary signal cabling and this is more
Article the 3rd signal lead is data wire, and the signal driver is source electrode driver.
10. display floater as claimed in claim 1, it is characterised in that adjacent two first signal leads
Between have two row's pixels；Or, there are three row's pixels between adjacent two first signal leads.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510732134.7A CN106647066A (en) | 2015-11-02 | 2015-11-02 | Display panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510732134.7A CN106647066A (en) | 2015-11-02 | 2015-11-02 | Display panel |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN106647066A true CN106647066A (en) | 2017-05-10 |
Family
ID=58810800
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510732134.7A Pending CN106647066A (en) | 2015-11-02 | 2015-11-02 | Display panel |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106647066A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107316607A (en) * | 2017-08-14 | 2017-11-03 | 深圳市华星光电半导体显示技术有限公司 | A kind of organic light emitting diode display |
| US10424603B2 (en) | 2018-02-09 | 2019-09-24 | Au Optronics Corporation | Display panel |
| US10714015B2 (en) | 2017-08-14 | 2020-07-14 | Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd. | Organic light emitting diode display device |
| CN113711291A (en) * | 2019-04-24 | 2021-11-26 | 夏普株式会社 | Display device |
| WO2022227031A1 (en) * | 2021-04-30 | 2022-11-03 | 京东方科技集团股份有限公司 | Array substrate and display device |
-
2015
- 2015-11-02 CN CN201510732134.7A patent/CN106647066A/en active Pending
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107316607A (en) * | 2017-08-14 | 2017-11-03 | 深圳市华星光电半导体显示技术有限公司 | A kind of organic light emitting diode display |
| US10714015B2 (en) | 2017-08-14 | 2020-07-14 | Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd. | Organic light emitting diode display device |
| US10424603B2 (en) | 2018-02-09 | 2019-09-24 | Au Optronics Corporation | Display panel |
| CN113711291A (en) * | 2019-04-24 | 2021-11-26 | 夏普株式会社 | Display device |
| CN113711291B (en) * | 2019-04-24 | 2023-09-15 | 夏普株式会社 | display device |
| WO2022227031A1 (en) * | 2021-04-30 | 2022-11-03 | 京东方科技集团股份有限公司 | Array substrate and display device |
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Application publication date: 20170510 |