CN108022488A - A kind of four-dimension coupled electricity-generation hyperchaotic system analog circuit - Google Patents

A kind of four-dimension coupled electricity-generation hyperchaotic system analog circuit Download PDF

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CN108022488A
CN108022488A CN201710557674.5A CN201710557674A CN108022488A CN 108022488 A CN108022488 A CN 108022488A CN 201710557674 A CN201710557674 A CN 201710557674A CN 108022488 A CN108022488 A CN 108022488A
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CN108022488B (en
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惠小健
王震
任水利
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Xijing University
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Xijing University
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Abstract

A kind of four-dimension coupled electricity-generation hyperchaotic system analog circuit, including the input terminal of output terminal connection first passage of first passage, the first input end of second channel and the input pin for meeting multiplier A1 in third channel;The first input pin of multiplier A2 in the previous stage output terminal connection second channel of first passage output terminal;The second input terminal, the input terminal of fourth lane of the output terminal connection second channel of second channel;The previous stage output terminal of second channel output terminal connects the second input pin of multiplier A1 in the first input pin and third channel of multiplier A3 in the second input terminal of first passage, first passage;The second input pin of multiplier A3, the second input pin of multiplier A2 of second channel and the input terminal of third channel in the previous stage output terminal connection first passage of third channel output terminal;3rd input terminal of the previous stage output terminal connection first passage of fourth lane output terminal;The present invention has the advantages of circuit structure is simple, easy to implement.

Description

A kind of four-dimension coupled electricity-generation hyperchaotic system analog circuit
Technical field
The present invention relates to nonlinear properties generating apparatus design field, more particularly to a kind of four-dimensional coupled electricity-generation surpasses Chaos system analog circuit.
Background technology
Chaos system has a wide range of applications in circuit, communication, information science, engineering technology and medicine etc., also by people Common approval.Polarity inversion in Geomagnetic secular variation, be most be difficult in earth magnetism theory explanation the problem of one of, to this place Magnetist proposes many models and describes its phenomenon, wherein generator coupled model is earliest and is model the most classical. And as people are to the understanding of nature, it is found that geomagnetic model complexity be High Dimensional Systems, based on this, people are from the basis of three-dimensional On, it is proposed that the system of dimension higher is four-dimensional coupled electricity-generation hyperchaotic system, but the analysis document for this model is more, its Circuit realizes that document is not reported with patent.
At present, the realization of chaos system is the realization of ignorant circuit, then the four-dimensional generator coupled hyperchaotic system circuit of design, There is significant application value with analysis of magnetic polarity inversion for understanding.The shortcomings that prior art to be solved by this invention, that is, higher-dimension The problems such as geomagnetic coupling generating system is not easy with circuit realization and circuit unreliability.
The content of the invention
The object of the present invention is to provide a kind of four-dimensional coupled electricity-generation hyperchaotic system analog circuit, its system has stronger Chaotic characteristic etc..
In order to achieve the above object, the technical solution taken of the present invention is:
A kind of four-dimension coupled electricity-generation hyperchaotic system analog circuit, including first passage, second channel, third channel and the Four-way;
The output terminal connection first input end of first passage of the first passage, the first input end of second channel and The first input pin of multiplier A1 in third channel;In the previous stage output terminal connection second channel of first passage output terminal The first input pin of multiplier A2;
The second input terminal, the input terminal of fourth lane of the output terminal connection second channel of the second channel;Second The previous stage output terminal of channel output end connects the first input of multiplier A3 in the second input terminal of first passage, first passage The second input pin of multiplier A1 in pin and third channel;
The second input of multiplier A3 is drawn in the previous stage output terminal connection first passage of the third channel output terminal The second input pin of multiplier A2 and the input terminal of third channel of foot, second channel;
3rd input terminal of the previous stage output terminal connection first passage of the fourth lane output terminal.
The first passage includes phase inverter U1,2 pins connection resistance R11, resistance R12, the resistance of phase inverter U1 One end of R13, resistance R14 and resistance R17, the output terminal of the other end connection multiplier A3 of resistance R11, resistance R12's is another The output terminal of end connection first passage, the previous stage output terminal of resistance R13 connection second channel output terminals, resistance R14's is another The previous stage output terminal of end connection fourth lane output terminal, 6 pins and resistance of the other end connection phase inverter U1 of resistance R17 One end of R18,2 pins and capacitance C1 one end, the capacitance C1 other ends of the other end connection inverting integrator U3 of resistance R18 connect Connect 6 pins of inverting integrator U3 and one end of resistance R19,2 pins and electricity of the other end connection phase inverter U2 of resistance R19 Hinder one end of R20,6 pins of the other end connection phase inverter U2 of resistance R20;4 pins of phase inverter U1, the 4 of phase inverter U2 are drawn 4 pins of foot and inverting integrator U3 connect VDD (negative voltage), 7 pins of phase inverter U1,7 pins of phase inverter U2 and anti-phase product 7 pins of device U3 are divided to meet VCC (positive voltage).
The output terminal of the phase inverter U2 of the first passage is signal-x, and the output terminal of inverting integrator U3 is signal x。
The second channel includes phase inverter U4,2 pins connection resistance R21, resistance R22, the resistance R23 of phase inverter U4 With one end of resistance R24, the output terminal of the other end connection multiplier A2 of resistance R21, the other end connection first of resistance R22 The output terminal of passage, the output terminal of the other end connection second channel of resistance R23, the other end connection phase inverter of resistance R24 6 pins of U4 and one end of resistance R25,2 pins of the other end connection inverting integrator U6 of resistance R25 and the one of capacitance C2 End, 6 pins of other end connection inverting integrator U6 of capacitance C2 and one end of resistance R26, the other end connection of resistance R26 2 pins of phase inverter U5 and resistance R27 one end, 6 pins of the other end connection phase inverter U5 of resistance R27;Inverting amplifier U4 3 pins, 3 pins of 3 pins and inverting integrator U6 of inverting amplifier U5 are grounded;4 pins, the phase inverter U5 of phase inverter U4 4 pins of 4 pins and inverting integrator U6 meet VDD (negative voltage), 7 pins of phase inverter U4,7 pins of phase inverter U5 with 7 pins of inverting integrator U6 meet VCC (positive voltage);
The output end signal of the second channel phase inverter U5 is-y, and the output terminal of second channel inverting integrator U6 is Signal y.
The third channel includes phase inverter U7,2 scripts connection resistance R31, resistance R32 and the resistance of phase inverter U7 One end of R34, the other end connection multiplier A1 output terminals of resistance R31, the other end connection third channel output of resistance R32 The previous stage output terminal at end, 6 pins and resistance R35 one end, resistance R35 of the other end connection phase inverter U7 of resistance R34 are another One end of end connection capacitance C3 and the pin 2 of inverting integrator U9, the 6 of the other end connection inverting integrator U9 of capacitance C3 draws 2 pins of one end of foot and resistance R36, resistance R36 other ends connection resistance R38 one end and phase inverter U8, resistance R38 are another 6 pins of end connection phase inverter U8;3 pins of inverting amplifier U7,3 pins of inverting amplifier U8 and inverting integrator U9 3 pins ground connection;4 pins of phase inverter U7,4 pins of phase inverter U8 and 4 pins of inverting integrator U9 connect VDD (negative electricity Pressure), 7 pins of phase inverter U7,7 pins of phase inverter U8 and 7 pins of inverting integrator U9 meet VCC (positive voltage).
The output end signal of the third channel phase inverter U8 is-z, and the output terminal of third channel inverting integrator U9 is Signal z.
The fourth lane includes phase inverter U10, and 2 scripts of phase inverter U10 connect the one of resistance R41 and resistance R43 End, the output terminal of the other end connection second channel of resistance R41,6 He of pin of the other end connection phase inverter U10 of resistance R43 One end of resistance R44, one end of other end connection capacitance C4 of resistance R44 and 2 pins of inverting integrator U12, capacitance C4's 6 pins of other end connection inverting integrator U12 and one end of resistance R45, other end connection resistance R47 one end of resistance R45 With 2 pins of phase inverter U11,6 pins of the other end connection phase inverter U11 of resistance R47;It is 3 pins of phase inverter U10, anti-phase The 3 pins ground connection of device U11 and 3 pins of inverting integrator U12 are grounded;4 pins of phase inverter U10,4 pins of phase inverter U11 And 4 pins of inverting integrator U12 meet VDD (negative voltage), 7 pins of phase inverter U10,7 pins of phase inverter U11 and 7 pins of phase inverter integration U12 meet VCC (positive voltage).
The output end signal of the fourth lane phase inverter U11 is-w, the output terminal of fourth lane inverting integrator U12 It is signal w.
The phase inverter U1, phase inverter U2, inverting integrator U3, phase inverter U4, phase inverter U5, inverting integrator U6, Phase inverter U7, phase inverter U8, inverting integrator U9, phase inverter U10, phase inverter U11 and inverting integrator U12 use transport and placing device LM741。
Multiplier A1, multiplier A2 and the multiplier A3 uses multiplier AD633.
Resistance R11=1k Ω in the first passage, resistance R12=33k Ω, resistance R13=1K Ω, resistance R16= 10K Ω, resistance R17=10K Ω, resistance R18=10K Ω, resistance R14=1K Ω, resistance R19=1K Ω, resistance R20=1K Ω, capacitance C1=10nF;Resistance R21=0.5K Ω in second channel, resistance R22=3.3K Ω, resistance R23=10K Ω, resistance R24=10K Ω, resistance R25=10K Ω, resistance R26=10K Ω, resistance R27=10K Ω, capacitance C2=0.1 μ F;Threeway Resistance R31=1K Ω in road, resistance R32=10K Ω, resistance R34=1K Ω, resistance R35=5K Ω, resistance R36=10K Ω, Resistance R38=10K Ω, capacitance C3=10nF;Resistance R41=5K Ω in fourth lane, resistance R43=10K Ω, resistance R44= 10K Ω, resistance R45=10K Ω, resistance R47=10K Ω, capacitance C4=10nF;VCC=15V, VDD=-15V.
Beneficial effects of the present invention:
X-y, x-z, y-z are easily observed on the analog oscilloscope of the present invention, x-w, y-w, z-w phasors, have circuit structure It is relatively simple, easily realize, the teaching and demonstration and coupled electricity-generation system model suitable for non-linear chaos circuit are analyzed and researched.
Brief description of the drawings
Fig. 1 is the circuit diagram of the present invention.
Fig. 2 is the x output waveform figures of Fig. 1.
Fig. 3 is the y output waveform figures of Fig. 1.
Fig. 4 is the z output waveform figures of Fig. 1.
Fig. 5 is the w output waveform figures of Fig. 1.
Fig. 6 is the x-y output phasors of Fig. 1.
Fig. 7 is the x-z output phasors of Fig. 1.
Fig. 8 is the y-z output phasors of Fig. 1.
Fig. 9 is the x-w output phasors of Fig. 1.
Figure 10 is the y-w output phasors of Fig. 1.
Figure 11 is the z-w output phasors of Fig. 1.
Embodiment
The present invention is described in detail with reference to the accompanying drawings and examples.
With reference to Fig. 1, a kind of four-dimension coupled electricity-generation hyperchaotic system analog circuit, including first passage, second channel, the 3rd Passage and fourth lane;
The output terminal connection first input end of first passage of the first passage, the first input end of second channel and Connect the first input pin of multiplier A1 in third channel;In the previous stage output terminal connection second channel of first passage output terminal Multiplier A2 the first input pin;
The second input terminal, the input terminal of fourth lane of the output terminal connection second channel of the second channel;Second The previous stage output terminal of channel output end connects the first input of multiplier A3 in the second input terminal of first passage, first passage The second input pin of multiplier A1 in pin and third channel;
The second input of multiplier A3 is drawn in the previous stage output terminal connection first passage of the third channel output terminal The second input pin of multiplier A2 and the input terminal of third channel of foot, second channel;
3rd input terminal of the previous stage output terminal connection first passage of the fourth lane output terminal.
The first passage includes phase inverter U1,2 pins connection resistance R11, resistance R12, the resistance of phase inverter U1 One end of R13, resistance R14 and resistance R17, the output terminal of the other end connection multiplier A3 of resistance R11, resistance R12's is another The output terminal of end connection first passage, the previous stage output terminal of resistance R13 connection second channel output terminals, resistance R14 four-ways The previous stage output terminal of road output terminal, 6 pins of other end connection phase inverter U1 of resistance R17 and one end of resistance R18, resistance 2 pins of the other end connection inverting integrator U3 of R18 and capacitance C1 one end, capacitance C1 other ends connection inverting integrator U3 6 pins and resistance R19 one end, 2 pins of other end connection phase inverter U2 of resistance R19 and one end of resistance R20, resistance 6 pins of the other end connection phase inverter U2 of R20;4 pins of phase inverter U1,4 pins of phase inverter U2 and inverting integrator 4 pins of U3 meet VDD (negative voltage), and 7 pins of phase inverter U1,7 pins of phase inverter U2 and 7 pins of inverting integrator U3 connect VCC (positive voltage).
The output terminal of the phase inverter U2 of the first passage is signal-x, and the output terminal of inverting integrator U3 is signal x。
The second channel includes phase inverter U4,2 pins connection resistance R21, resistance R22, the resistance R23 of phase inverter U4 With one end of resistance R24, the output terminal of the other end connection multiplier A2 of resistance R21, the other end connection first of resistance R22 The output terminal of passage, the output terminal of one end connection second channel of resistance R23, the other end connection phase inverter U4 of resistance R24 6 pins and resistance R25 one end, 2 pins of other end connection inverting integrator U6 of resistance R25 and one end of capacitance C2, 6 pins of other end connection inverting integrator U6 of capacitance C2 and one end of resistance R26, the other end connection of resistance R26 are anti-phase 2 and resistance R27 one end of device U5,6 pins of the other end connection phase inverter U5 of resistance R27;3 pins of inverting amplifier U4, 3 pins of inverting amplifier U5 are grounded with 3 pins of inverting integrator U6;4 pins of phase inverter U4, the 4 of phase inverter U5 are drawn 4 pins of foot and inverting integrator U6 connect VDD (negative voltage), 7 pins of phase inverter U4,7 pins of phase inverter U5 and anti-phase product 7 pins of device U6 are divided to meet VCC (positive voltage);
The output end signal of the second channel phase inverter U5 is-y, and the output terminal of second channel inverting integrator U6 is Signal y.
The third channel includes phase inverter U7,2 scripts connection resistance R31, resistance R32 and the resistance of phase inverter U7 One end of R34, the other end connection multiplier A1 output terminals of resistance R31, the other end connection third channel output of resistance R32 The previous stage output terminal at end, 6 pins and resistance R35 one end, resistance R35 of the other end connection phase inverter U7 of resistance R34 are another One end of end connection capacitance C3 and the pin 2 of inverting integrator U9, the 6 of the other end connection inverting integrator U9 of capacitance C3 draws 2 pins of one end of foot and resistance R36, resistance R36 other ends connection resistance R38 one end and phase inverter U8, resistance R38 are another 6 pins of end connection phase inverter U8;3 pins of inverting amplifier U7,3 pins of inverting amplifier U8 and inverting integrator U9 3 pins ground connection;4 pins of phase inverter U7,4 pins of phase inverter U8 and 4 pins of inverting integrator U9 connect VDD (negative electricity Pressure), 7 pins of phase inverter U7,7 pins of phase inverter U8 and 7 pins of inverting integrator U9 meet VCC (positive voltage).
The output end signal of the third channel phase inverter U8 is-z, and the output terminal of third channel inverting integrator U9 is Signal z.
The fourth lane includes phase inverter U10, and 2 scripts of phase inverter U10 connect the one of resistance R41 and resistance R43 End, the output terminal of the other end connection second channel of resistance R41,6 He of pin of the other end connection phase inverter U10 of resistance R43 One end of resistance R44, one end of other end connection capacitance C4 of resistance R44 and 2 pins of inverting integrator U12, capacitance C4's 6 pins of other end connection inverting integrator U12 and one end of resistance R45, other end connection resistance R47 one end of resistance R45 With 2 pins of phase inverter U11,6 pins of the other end connection phase inverter U11 of resistance R47;It is 3 pins of phase inverter U10, anti-phase The 3 pins ground connection of device U11 and 3 pins of inverting integrator U12 are grounded;4 pins of phase inverter U10,4 pins of phase inverter U11 And 4 pins of inverting integrator U12 meet VDD (negative voltage), 7 pins of phase inverter U10,7 pins of phase inverter U11 and 7 pins of phase inverter integration U12 meet VCC (positive voltage).
The output end signal of the fourth lane phase inverter U11 is-w, the output terminal of fourth lane inverting integrator U12 It is signal w.
The phase inverter U1, phase inverter U2, inverting integrator U3, phase inverter U4, phase inverter U5, inverting integrator U6, Phase inverter U7, phase inverter U8, inverting integrator U9, phase inverter U10, phase inverter U11 and inverting integrator U12 use transport and placing device LM741。
Multiplier A1, multiplier A2 and the multiplier A3 uses multiplier AD633.
Resistance R11=1k Ω in the first passage, resistance R12=33k Ω, resistance R13=1K Ω, resistance R16= 10K Ω, resistance R17=10K Ω, resistance R18=10K Ω, resistance R14=1K Ω, resistance R19=1K Ω, resistance R20=1K Ω, capacitance C1=10nF;Resistance R21=0.5K Ω in second channel, resistance R22=3.3K Ω, resistance R23=10K Ω, resistance R24=10K Ω, resistance R25=10K Ω, resistance R26=10K Ω, resistance R27=10K Ω, capacitance C2=0.1 μ F;Threeway Resistance R31=1K Ω in road, resistance R32=10K Ω, resistance R34=1K Ω, resistance R35=5K Ω, resistance R36=10K Ω, Resistance R38=10K Ω, capacitance C3=10nF;Resistance R41=5K Ω in fourth lane, resistance R43=10K Ω, resistance R44= 10K Ω, resistance R45=10K Ω, resistance R47=10K Ω, capacitance C4=10nF;VCC=15V, VDD=-15V.
The present invention operation principle be:
Four-dimension coupled electricity-generation hyperchaotic system of the present invention, is more than because the system contains two Liapunov exponents 0, so that the chaotic characteristic of the circuit is sufficiently complex.If using the output signal of the circuit as carrier signal, believe with target Number modulated by related algorithm, you can reach the effect of communication security.Dimensionless mathematical model of the present invention is as follows:
In formula (1), x, y, z, w are state variable, and α, b, c, k are the parameter of equation.The i.e. four-dimensional coupled electricity-generation of system (1) Hyperchaotic system.
By first, second, third, the circuit of fourth lane forms circuit according to the present invention, first, second, third, The circuit of fourth lane realizes first, second, third in formula (1), the 4th function respectively.Inverting integrator is adopted with phase inverter With LM741, when analog multiplier uses AD633, the output waveform figure of circuit is shown in Fig. 2, Fig. 3, Fig. 4, Fig. 5, the phase of circuit output Figure is shown in Fig. 6, Fig. 7, Fig. 8, Fig. 9, Figure 10, Figure 11, and Fig. 2 to Figure 11 has reflected that the basic chaos of four-dimensional coupled electricity-generation system is special Property, so as to enrich the type of chaos, new model and thinking are provided for description geomagnetic polarity reversal for chaos system.

Claims (6)

1. a kind of four-dimension coupled electricity-generation hyperchaotic system analog circuit, including first passage, second channel, third channel and the 4th Passage, it is characterised in that:
The output terminal connection first input end of first passage of the first passage, the first input end of second channel and connect the The first input pin of multiplier A1 in triple channel;Multiplying in the previous stage output terminal connection second channel of first passage output terminal The first input pin of musical instruments used in a Buddhist or Taoist mass A2;
The second input terminal, the input terminal of fourth lane of the output terminal connection second channel of the second channel;Second channel The previous stage output terminal of output terminal connects the first input pin of multiplier A3 in the second input terminal of first passage, first passage With the second input pin of multiplier A1 in third channel;
The second input pin of multiplier A3, the in the previous stage output terminal connection first passage of the third channel output terminal The second input pin of multiplier A2 and the input terminal of third channel of two passages;
3rd input terminal of the previous stage output terminal connection first passage of the fourth lane output terminal.
2. a kind of four-dimensional coupled electricity-generation hyperchaotic system analog circuit according to claim 1, it is characterised in that described First passage includes phase inverter U1, and 2 pins of phase inverter U1 connect resistance R11, resistance R12, resistance R13, resistance R14 and resistance One end of R17, the output terminal of the other end connection multiplier A3 of resistance R11, the other end of resistance R12 connect the defeated of first passage Outlet, the previous stage output terminal of resistance R13 connection second channel output terminals, resistance R14 other ends connection fourth lane output terminal Previous stage output terminal, 6 pins of other end connection phase inverter U1 of resistance R17 and one end of resistance R18, resistance R18's is another 2 pins of one end connection inverting integrator U3 and capacitance C1 one end, 6 pins of capacitance C1 other ends connection inverting integrator U3 and One end of resistance R19,2 pins of other end connection phase inverter U2 of resistance R19 and one end of resistance R20, resistance R20's is another 6 pins of end connection phase inverter U2;4 pins of phase inverter U1,4 pins of phase inverter U2 and 4 pins of inverting integrator U3 connect 7 pins of VDD (negative voltage), phase inverter U1,7 pins of phase inverter U2 and 7 pins of inverting integrator U3 connect VCC (positive electricity Pressure);
The second channel includes phase inverter U4,2 pins connection resistance R21, resistance R22, resistance R23 and the electricity of phase inverter U4 One end of R24, the output terminal of the other end connection multiplier A2 of resistance R21 are hindered, the other end of resistance R22 connects first passage Output terminal, the output terminal of one end connection second channel of resistance R23,6 pins of the other end connection phase inverter U4 of resistance R24 With one end of resistance R25,2 pins of other end connection inverting integrator U6 of resistance R25 and one end of capacitance C2, capacitance C2's 6 pins of other end connection inverting integrator U6 and one end of resistance R26,2 Hes of the other end connection phase inverter U5 of resistance R26 Resistance R27 one end, 6 pins of the other end connection phase inverter U5 of resistance R27;3 pins, the inverting amplifier of inverting amplifier U4 3 pins of U5 are grounded with 3 pins of inverting integrator U6;4 pins of phase inverter U4,4 pins of phase inverter U5 and anti-phase integration 4 pins of device U6 connect VDD (negative voltage), 7 pins of phase inverter U4,7 pins of 7 pins of phase inverter U5 and inverting integrator U6 Meet VCC (positive voltage);
The third channel includes phase inverter U7, and 2 scripts of phase inverter U7 connect resistance R31, resistance R32 and resistance R34 One end, resistance R31 the other end connection multiplier A1 output terminals, resistance R32 the other end connection third channel output terminal before Level-one output terminal, 6 pins of the other end connection phase inverter U7 of resistance R34 and resistance R35 one end, the connection of the resistance R35 other ends One end of capacitance C3 and the pin 2 of inverting integrator U9,6 pins and resistance of the other end connection inverting integrator U9 of capacitance C3 2 pins of one end of R36, resistance R36 other ends connection resistance R38 one end and phase inverter U8, the connection of the resistance R38 other ends are anti-phase 6 pins of device U8;3 pins of inverting amplifier U7,3 pins of inverting amplifier U8 and 3 pins of inverting integrator U9 are grounded; 4 pins of phase inverter U7,4 pins of 4 pins of phase inverter U8 and inverting integrator U9 meet VDD (negative voltage), and the 7 of phase inverter U7 Pin, 7 pins of phase inverter U8 and 7 pins of inverting integrator U9 meet VCC (positive voltage);
The fourth lane includes phase inverter U10, one end of the 2 scripts connection resistance R41 and resistance R43 of phase inverter U10, electricity Hinder the output terminal of the other end connection second channel of R41, the pin 6 and resistance of the other end connection phase inverter U10 of resistance R43 One end of R44, one end of other end connection capacitance C4 of resistance R44 and 2 pins of inverting integrator U12, capacitance C4's is another 6 pins of end connection inverting integrator U12 and one end of resistance R45, other end connection resistance R47 one end of resistance R45 and anti- 2 pins of phase device U11,6 pins of the other end connection phase inverter U11 of resistance R47;3 pins, the phase inverter U11 of phase inverter U10 3 pins ground connection be grounded with 3 pins of inverting integrator U12;4 pins of phase inverter U10,4 pins of phase inverter U11 and anti- 4 pins of phase integral device U12 connect VDD (negative voltage), 7 pins of phase inverter U10,7 pins of phase inverter U11 and phase inverter product 7 pins of U12 are divided to meet VCC (positive voltage).
3. a kind of four-dimensional coupled electricity-generation hyperchaotic system analog circuit according to claim 1, it is characterised in that described The output terminal of the phase inverter U2 of first passage is signal-x, and the output terminal of inverting integrator U3 is signal x.
The output end signal of the second channel phase inverter U5 is-y, and the output terminal of second channel inverting integrator U6 is signal y。
The output end signal of the third channel phase inverter U8 is-z, and the output terminal of third channel inverting integrator U9 is signal z。
The output end signal of the fourth lane phase inverter U11 is-w, and the output terminal of fourth lane inverting integrator U12 is letter Number w.
4. a kind of four-dimensional coupled electricity-generation hyperchaotic system analog circuit according to claim 2, it is characterised in that described Phase inverter U1, phase inverter U2, inverting integrator U3, phase inverter U4, phase inverter U5, inverting integrator U6, phase inverter U7, phase inverter U8, inverting integrator U9, phase inverter U10, phase inverter U11 and inverting integrator U12 use transport and placing device LM741.
5. a kind of four-dimensional coupled electricity-generation hyperchaotic system analog circuit according to claim 2, it is characterised in that described Multiplier A1, multiplier A2 and multiplier A3 use multiplier AD633.
6. a kind of four-dimensional coupled electricity-generation hyperchaotic system analog circuit according to claim 2, it is characterised in that described Resistance R11=1k Ω in first passage, resistance R12=33k Ω, resistance R13=1K Ω, resistance R16=10K Ω, resistance R17= 10K Ω, resistance R18=10K Ω, resistance R14=1K Ω, resistance R19=1K Ω, resistance R20=1K Ω, capacitance C1=10nF; Resistance R21=0.5K Ω in second channel, resistance R22=3.3K Ω, resistance R23=10K Ω, resistance R24=10K Ω, resistance R25=10K Ω, resistance R26=10K Ω, resistance R27=10K Ω, capacitance C2=0.1 μ F;Resistance R31=1K in third channel Ω, resistance R32=10K Ω, resistance R34=1K Ω, resistance R35=5K Ω, resistance R36=10K Ω, resistance R38=10K Ω, Capacitance C3=10nF;Resistance R41=5K Ω in fourth lane, resistance R43=10K Ω, resistance R44=10K Ω, resistance R45= 10K Ω, resistance R47=10K Ω, capacitance C4=10nF;VCC=15V, VDD=-15V.
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CN202949435U (en) * 2012-12-06 2013-05-22 南京师范大学 Four-dimensional fractional-order hyperchaotic circuit
CN103414550A (en) * 2013-08-02 2013-11-27 南京师范大学 Four-dimensional hyper-chaotic circuit
CN103684746A (en) * 2014-01-03 2014-03-26 滨州学院 Implementation of four-dimensional hyperchaotic system without balance points and simulation circuit
CN205265707U (en) * 2015-12-12 2016-05-25 西京学院 Chaos circuit of four -dimensional super T
CN206042009U (en) * 2016-07-12 2017-03-22 陶然 Novel four -dimensional hyper -chaos system

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CN102946309A (en) * 2012-11-19 2013-02-27 合肥工业大学 Hyperchaotic circuit
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