CN102946309A - Hyperchaotic circuit - Google Patents

Hyperchaotic circuit Download PDF

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Publication number
CN102946309A
CN102946309A CN2012104679582A CN201210467958A CN102946309A CN 102946309 A CN102946309 A CN 102946309A CN 2012104679582 A CN2012104679582 A CN 2012104679582A CN 201210467958 A CN201210467958 A CN 201210467958A CN 102946309 A CN102946309 A CN 102946309A
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output
operational amplifier
resistance
inverting input
connect
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CN102946309B (en
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何怡刚
吴先明
罗旗舞
于文新
郑剑
尹柏强
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Hefei University of Technology
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Hefei University of Technology
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Abstract

The invention provides a hyperchaotic circuit which is composed of two analog multipliers, ten operational amplifiers, a resistor and a capacitor. According to the hyperchaotic circuit, a linear controller is introduced on the basis of a three-dimensional chaotic system, so that a new four-dimensional chaotic system is realized and is applicable to chaos theory of universities, laboratory teaching and demonstration, science popularization demonstration and the like, and can be used for displaying various waveforms, phase diagrams and evolution curves of a hyperchaotic system.

Description

A kind of hyperchaotic circuit
Technical field
The invention belongs to nonlinear circuit, especially relate to a kind of four dimensional chaos circuit, in order to distinguish over the three-dimensional chaos circuit, the four dimensional chaos circuit is also referred to as hyperchaotic circuit.
Background technology
Three-dimensional self-governing chaos system only has a positive Lapunov index, their bandwidth relative narrower, and easy filtered system disposes in communication engineering, makes it lose the meaning of application.And hyperchaos has two and plural Lyapunov index, compares with three-dimensional chaos, and it has more complicated dynamic behavior, has better using value in fields such as information processing and communication engineerings.
Application number is 200710072479.X, and publication number is that the patent of invention " ultra-chaos pseudo random sequence generator " of CN101145901A is a kind of method of hyperchaos pseudorandom sequence generation, is to have proposed a kind of algorithm.Application number is 200910103368.X, publication number is that the patent of invention " hyperchaos signal generating method and hyperchaos signal generating system " of CN101510862A is by introducing a sinusoidal signal to nonlinear circuit and then produce the hyperchaos signal, having increased like this complexity of circuit.
Summary of the invention
The technical problem to be solved in the present invention is, overcomes the defects that prior art exists, and a kind of hyperchaotic circuit that is applicable to university's chaos science, experimental teaching and demonstration, scientific popularization is provided.
The technical solution adopted for the present invention to solve the technical problems is:
A kind of hyperchaotic circuit is made of two analog multipliers, ten operational amplifiers and resistance and electric capacity, wherein the second operational amplifier U 2Inverting input and the 4th resistance R 4Connect the second operational amplifier U 2In-phase input end ground connection, the second operational amplifier U 2Be connected the first capacitor C between inverting input and the output 1, the second operational amplifier U 2Output is the X output; The 5th operational amplifier U 5Inverting input and the tenth resistance R 10Connect the 5th operational amplifier U 5In-phase input end ground connection, the 5th operational amplifier U 5Be connected the second capacitor C between inverting input and the output 2, the 5th operational amplifier U 5Output is the Y output; The 7th operational amplifier U 7Inverting input and the 14 resistance R 14Connect the 7th operational amplifier U 7In-phase input end ground connection, the 7th operational amplifier U 7Be connected the 3rd capacitor C between inverting input and the output 3, the 7th operational amplifier U 7Output is the Z output; The tenth operational amplifier U 10Inverting input is connected with the 19 resistance, the tenth operational amplifier U 10Be connected the 4th capacitor C between inverting input and the output 3, the tenth operational amplifier U 10Output is the U output; The 3rd operational amplifier U 3Inverting input and the 5th resistance R 5Connect the 3rd operational amplifier U 3In-phase input end ground connection, the 3rd operational amplifier U 3Be connected the 6th resistance R between inverting input and the output 6, the 3rd operational amplifier U 3Output is the NOTX output; The 8th operational amplifier U 8Inverting input and the 15 resistance R 15Connect the 8th operational amplifier U 8In-phase input end ground connection, the 8th operational amplifier U 8Be connected the 16 resistance R between inverting input and the output 16, the 8th operational amplifier U 8Output is the NOTZ output; The first operational amplifier U 1Inverting input and the first resistance R 1, the second resistance R 2Connect the first resistance R 1The other end is connected with the Y output again, the second resistance R 2The other end is connected with the NOTX output again, the first operational amplifier U 1In-phase input end ground connection, the first operational amplifier U 1Be connected the 3rd resistance R between inverting input and the output 3, the first operational amplifier U 1Output and the 4th resistance R 4Connect; Four-operational amplifier U 4Inverting input and the 7th resistance R 7, the 8th resistance R 8, the 20 resistance R 20Connect the 7th resistance R 7The other end is connected with the X output again, the 20 resistance R 20The other end is connected with the U output again, four-operational amplifier U 4In-phase input end ground connection, four-operational amplifier U 4Be connected the 9th resistance R between inverting input and the output 9, four-operational amplifier U 4Output and the tenth resistance R 10Connect; The 6th operational amplifier U 6Inverting input and the 11 resistance R 11, the 12 resistance R 12Connect the 11 resistance R 11The other end is connected with the NOTZ output again, the 6th operational amplifier U 6In-phase input end ground connection, the 6th operational amplifier U 6Be connected the 13 resistance R between inverting input and the output 13, the 6th operational amplifier U 6Output and the 14 resistance R 14Connect; The 9th operational amplifier U 9Inverting input and the 17 resistance R 17Connect the 17 resistance R 17The other end is connected with the NOTX output again, the 9th operational amplifier U 9In-phase input end ground connection, the 9th operational amplifier U 9Be connected the 18 resistance R between inverting input and the output 18, the 9th operational amplifier U 9Output and the 19 resistance R 19Connect; The first analog multiplier A 1Two inputs are connected with NOTX output, Z output respectively, the first analog multiplier A 1Output and the 8th resistance R 8Connect; The second analog multiplier A 2Two inputs are connected with X output, Y output respectively, the second analog multiplier A 2Output and the 12 resistance R 12Connect.
Described the 17 resistance R 17Available potentiometer replaces, and changes the 17 resistance R 17Resistance can be observed the various curves that this hyperchaos develops.
Beneficial effect of the present invention is: the oscillogram of observable X, Y, Z, each output of U on ordinary oscilloscope, also observable X-Y, X-Z, X-U, Y-Z, Y-U, Z-U phasor.The present invention introduces a linear controller on the basis of Chaotic System, realized a kind of new four dimensional chaos system, is applicable to university's chaos science, experimental teaching and demonstration, scientific popularization with experimental demonstration etc.; Can show the various waveforms of hyperchaotic system, phasor and develop curve.
Description of drawings
Fig. 1 is hyperchaotic circuit schematic diagram of the present invention;
Fig. 2 is the X output oscillogram of hyperchaotic circuit of the present invention;
Fig. 3 is the Y output oscillogram of hyperchaotic circuit of the present invention;
Fig. 4 is the Z output oscillogram of hyperchaotic circuit of the present invention;
Fig. 5 is the U output oscillogram of hyperchaotic circuit of the present invention;
Fig. 6 is the X-Y output phasor of hyperchaotic circuit of the present invention;
Fig. 7 is the X-Z output phasor of hyperchaotic circuit of the present invention;
Fig. 8 is the X-U output phasor of hyperchaotic circuit of the present invention;
Fig. 9 is the Y-Z output phasor of hyperchaotic circuit of the present invention;
Figure 10 is the Y-U output phasor of hyperchaotic circuit of the present invention;
Figure 11 is the Z-U output phasor of hyperchaotic circuit of the present invention.
Embodiment
The invention will be further described below in conjunction with drawings and Examples.
Embodiment 1:
With reference to Fig. 1, present embodiment is made of two analog multipliers, ten operational amplifiers and resistance and electric capacity, wherein the second operational amplifier U 2Inverting input and the 4th resistance R 4Connect the second operational amplifier U 2In-phase input end ground connection, the second operational amplifier U 2Be connected the first capacitor C between inverting input and the output 1, the second operational amplifier U 2Output is the X output; The 5th operational amplifier U 5Inverting input and the tenth resistance R 10Connect the 5th operational amplifier U 5In-phase input end ground connection, the 5th operational amplifier U 5Be connected the second capacitor C between inverting input and the output 2, the 5th operational amplifier U 5Output is the Y output; The 7th operational amplifier U 7Inverting input and the 14 resistance R 14Connect the 7th operational amplifier U 7In-phase input end ground connection, the 7th operational amplifier U 7Be connected the 3rd capacitor C between inverting input and the output 3, the 7th operational amplifier U 7Output is the Z output; The tenth operational amplifier U 10Inverting input is connected with the 19 resistance, the tenth operational amplifier U 10Be connected the 4th capacitor C between inverting input and the output 4, the tenth operational amplifier U 10Output is the U output; The 3rd operational amplifier U 3Inverting input and the 5th resistance R 5Connect the 3rd operational amplifier U 3In-phase input end ground connection, the 3rd operational amplifier U 3Be connected the 6th resistance R between inverting input and the output 6, the 3rd operational amplifier U 3Output is the NOTX output; The 8th operational amplifier U 8Inverting input and the 15 resistance R 15Connect the 8th operational amplifier U 8In-phase input end ground connection, the 8th operational amplifier U 8Be connected the 16 resistance R between inverting input and the output 16, the 8th operational amplifier U 8Output is the NOTZ output; The first operational amplifier U 1Inverting input and the first resistance R 1, the second resistance R 2Connect the first resistance R 1The other end is connected with the Y output again, the second resistance R 2The other end is connected with NOT X output again, the first operational amplifier U 1In-phase input end ground connection, the first operational amplifier U 1Be connected the 3rd resistance R between inverting input and the output 3, the first operational amplifier U 1Output and the 4th resistance R 4Connect; Four-operational amplifier U 4Inverting input and the 7th resistance R 7, the 8th resistance R 8, the 20 resistance R 20Connect the 7th resistance R 7The other end is connected with the X output again, the 20 resistance R 20The other end is connected with the U output again, four-operational amplifier U 4In-phase input end ground connection, four-operational amplifier U 4Be connected the 9th resistance R between inverting input and the output 9, four-operational amplifier U 4Output and the tenth resistance R 10Connect; The 6th operational amplifier U 6Inverting input and the 11 resistance R 11, the 12 resistance R 12Connect the 11 resistance R 11The other end is connected with the NOTZ output again, the 6th operational amplifier U 6In-phase input end ground connection, the 6th operational amplifier U 6Be connected the 13 resistance R between inverting input and the output 13, the 6th operational amplifier U 6Output and the 14 resistance R 14Connect; The 9th operational amplifier U 9Inverting input and the 17 resistance R 17Connect the 17 resistance R 17The other end is connected with the NOTX output again, the 9th operational amplifier U 9In-phase input end ground connection, the 9th operational amplifier U 9Be connected the 18 resistance R between inverting input and the output 18, the 9th operational amplifier U 9Output and the 19 resistance R 19Connect; The first analog multiplier A 1With the second analog multiplier A 2Model all select AD633, its pin 1 and 3 is as two inputs, pin 2,4 and 6 equal ground connection, the first analog multiplier A 1Two inputs are connected with NOTX output, Z output respectively, the first analog multiplier (A 1) output and the 8th resistance R 8Connect; The second analog multiplier A 2Two inputs are connected with X output, Y output respectively, the second analog multiplier A 2Output and the 12 resistance R 12Connect.
According to Fig. 1, make a hyperchaos single face PCB hardware circuit.New hyperchaos single face PCB hardware circuit is made flow process: (1) is carried out circuit board wiring to Fig. 1 and is printed on the photographic film; (2) on the sensitization single sided board, photographic film is exposed; (3) photographic plate after the exposure is developed; (4) to the rotten copper of the photographic plate after developing; (5) bore the component pins hole; (6) be welded and fixed element.Operational amplifier uses μ A741, and analog multiplier uses AD633, wherein the positive supply V of analog multiplier AD633, operational amplifier μ A741 DD, negative supply V EE, the GND wiring time partial line is arranged at top layer, adopt wire jumper to connect.
Work as capacitor C 1=C 2=C 3=C 4=10nF, resistance R 4=R 8=R 10=R 12=R 14=R 18=R 19=10K Ω, R 3=R 9=R 13=18K Ω, R 7=20K Ω, R 1=R 2=R 5=R 6=R 15=R 16=30K Ω, R 11=R 20=180K Ω, R 17=100K Ω, operational amplifier uses μ A741, and when analog multiplier used AD633, the oscillogram of circuit output was seen Fig. 2, Fig. 3, Fig. 4, Fig. 5, the phasor of circuit output is seen Fig. 6, Fig. 7, Fig. 8, Fig. 9, Figure 10, Figure 11, and embodiment 1 circuit has been realized validity of the present invention fully.
Embodiment 2:
The difference of present embodiment and embodiment 1 is: described the 17 resistance R 17Replace with potentiometer, change the 17 resistance R 17Resistance can be observed the various curves that this hyperchaos develops.

Claims (2)

1. a hyperchaotic circuit is characterized in that, is made of two analog multipliers, ten operational amplifiers and resistance and electric capacity, wherein the second operational amplifier U 2Inverting input and the 4th resistance R 4Connect the second operational amplifier U 2In-phase input end ground connection, the second operational amplifier U 2Be connected the first capacitor C between inverting input and the output 1, the second operational amplifier U 2Output is the X output; The 5th operational amplifier U 5Inverting input and the tenth resistance R 10Connect the 5th operational amplifier U 5In-phase input end ground connection, the 5th operational amplifier U 5Be connected the second capacitor C between inverting input and the output 2, the 5th operational amplifier U 5Output is the Y output; The 7th operational amplifier U 7Inverting input and the 14 resistance R 14Connect the 7th operational amplifier U 7In-phase input end ground connection, the 7th operational amplifier U 7Be connected the 3rd capacitor C between inverting input and the output 3, the 7th operational amplifier U 7Output is the Z output; The tenth operational amplifier U 10Inverting input is connected with the 19 resistance, the tenth operational amplifier U 10Be connected the 4th capacitor C between inverting input and the output 3, the tenth operational amplifier U 10Output is the U output; The 3rd operational amplifier U 3Inverting input and the 5th resistance R 5Connect the 3rd operational amplifier U 3In-phase input end ground connection, the 3rd operational amplifier U 3Be connected the 6th resistance R between inverting input and the output 6, the 3rd operational amplifier U 3Output is the NOTX output; The 8th operational amplifier U 8Inverting input and the 15 resistance R 15Connect the 8th operational amplifier U 8In-phase input end ground connection, the 8th operational amplifier U 8Be connected the 16 resistance R between inverting input and the output 16, the 8th operational amplifier U 8Output is the NOTZ output; The first operational amplifier U 1Inverting input and the first resistance R 1, the second resistance R 2Connect the first resistance R 1The other end is connected with the Y output again, the second resistance R 2The other end is connected with the NOTX output again, the first operational amplifier U 1In-phase input end ground connection, the first operational amplifier U 1Be connected the 3rd resistance R between inverting input and the output 3, the first operational amplifier U 1Output and the 4th resistance R 4Connect; Four-operational amplifier U 4Inverting input and the 7th resistance R 7, the 8th resistance R 8, the 20 resistance R 20Connect the 7th resistance R 7The other end is connected with the X output again, the 20 resistance R 20The other end is connected with the U output again, four-operational amplifier U 4In-phase input end ground connection, four-operational amplifier U 4Be connected the 9th resistance R between inverting input and the output 9, four-operational amplifier U 4Output and the tenth resistance R 10Connect; The 6th operational amplifier U 6Inverting input and the 11 resistance R 11, the 12 resistance R 12Connect the 11 resistance R 11The other end is connected with the NOTZ output again, the 6th operational amplifier U 6In-phase input end ground connection, the 6th operational amplifier U 6Be connected the 13 resistance R between inverting input and the output 13, the 6th operational amplifier U 6Output and the 14 resistance R 14Connect; The 9th operational amplifier U 9Inverting input and the 17 resistance R 17Connect the 17 resistance R 17The other end is connected with the NOTX output again, the 9th operational amplifier U 9In-phase input end ground connection, the 9th operational amplifier U 9Be connected the 18 resistance R between inverting input and the output 18, the 9th operational amplifier U 9Output and the 19 resistance R 19Connect; The first analog multiplier A 1Two inputs are connected with NOTX output, Z output respectively, the first analog multiplier A 1Output and the 8th resistance R 8Connect; The second analog multiplier A 2Two inputs are connected with X output, Y output respectively, the second analog multiplier A 2Output and the 12 resistance R 12Connect.
2. hyperchaotic circuit according to claim 1 is characterized in that, the 17 resistance R 17Replace with potentiometer, change the 17 resistance R 17Resistance is observed the various curves that hyperchaos develops.
CN201210467958.2A 2012-11-19 2012-11-19 Hyperchaotic circuit Active CN102946309B (en)

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104202140A (en) * 2014-08-31 2014-12-10 王春梅 Four-dimensional balance point-free hyperchaotic system based on five-simplest chaotic system, and analogue circuit
CN104486063A (en) * 2014-12-17 2015-04-01 山东外国语职业学院 Five-stage amplitude limiting Jerk hyperchaotic circuit
CN108022488A (en) * 2017-07-10 2018-05-11 西京学院 A kind of four-dimension coupled electricity-generation hyperchaotic system analog circuit
CN110299750A (en) * 2019-07-03 2019-10-01 南京荟学智能科技有限公司 A kind of wireless charging system and method for low-power consumption product
CN112683322A (en) * 2020-12-18 2021-04-20 中国人民解放军海军工程大学 Chaos detection circuit module

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101145901A (en) * 2007-07-06 2008-03-19 哈尔滨工程大学 Ultra-chaos pseudo random sequence generator
CN101510862A (en) * 2009-03-13 2009-08-19 重庆邮电大学 Method and system for generating ultra-chaos signal
CN101826958A (en) * 2010-04-20 2010-09-08 江苏技术师范学院 Multi-architecture chaotic signal generator
CN202218241U (en) * 2011-09-27 2012-05-09 滨州学院 Four-dimensional chaotic circuit with larger separating index

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101145901A (en) * 2007-07-06 2008-03-19 哈尔滨工程大学 Ultra-chaos pseudo random sequence generator
CN101510862A (en) * 2009-03-13 2009-08-19 重庆邮电大学 Method and system for generating ultra-chaos signal
CN101826958A (en) * 2010-04-20 2010-09-08 江苏技术师范学院 Multi-architecture chaotic signal generator
CN202218241U (en) * 2011-09-27 2012-05-09 滨州学院 Four-dimensional chaotic circuit with larger separating index

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104202140A (en) * 2014-08-31 2014-12-10 王春梅 Four-dimensional balance point-free hyperchaotic system based on five-simplest chaotic system, and analogue circuit
CN104486063A (en) * 2014-12-17 2015-04-01 山东外国语职业学院 Five-stage amplitude limiting Jerk hyperchaotic circuit
CN104486063B (en) * 2014-12-17 2017-12-08 山东外国语职业学院 A kind of five rank amplitude limit type Jerk hyperchaotic circuits
CN108022488A (en) * 2017-07-10 2018-05-11 西京学院 A kind of four-dimension coupled electricity-generation hyperchaotic system analog circuit
CN108022488B (en) * 2017-07-10 2020-06-09 西京学院 Four-dimensional coupling power generation hyperchaotic system analog circuit
CN110299750A (en) * 2019-07-03 2019-10-01 南京荟学智能科技有限公司 A kind of wireless charging system and method for low-power consumption product
CN112683322A (en) * 2020-12-18 2021-04-20 中国人民解放军海军工程大学 Chaos detection circuit module

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