CN109302277A - A kind of four-dimension fractional order chaotic model and circuit - Google Patents
A kind of four-dimension fractional order chaotic model and circuit Download PDFInfo
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- CN109302277A CN109302277A CN201811276339.9A CN201811276339A CN109302277A CN 109302277 A CN109302277 A CN 109302277A CN 201811276339 A CN201811276339 A CN 201811276339A CN 109302277 A CN109302277 A CN 109302277A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/001—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols using chaotic signals
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
- H04L2209/12—Details relating to cryptographic hardware or logic circuitry
Abstract
The invention discloses a kind of four-dimensional fractional order chaotic model and its circuits, the circuit of the four-dimension fractional order chaotic model includes four channel circuits: the signal input part of the signal input part of the output signal-x connection first passage of first passage, second channel, the signal input part of the previous stage output signal x connection third channel of first passage；The signal input part of the output signal-y connection fourth lane of second channel, signal input part, the multiplier A2 of the previous stage output signal y connection first passage of second channel；The previous stage output signal z connection multiplication A1 of third channel；The signal input part of the previous stage output signal w connection second channel of fourth lane.Fractional order chaotic model of the invention has higher complexity compared with integer rank chaotic model, more complicated dynamic behavior can be generated, it can be used for fractional order chaotic system circuit design, experiment, also existing chaos system information encryption can be overcome due to complexity not high the drawbacks of being easily decrypted, provide foundation for the application of chaos system.
Description
Technical field
The invention belongs to chaos system technical fields, are related to a kind of Chaotic Systems of fractional order form, and in particular to
A kind of 0.9 rank fractional order circuit model with physical realizability and abundant dynamic behavior.
Background technique
Chaology, is the scientific revolution just risen in nearly 30 years, it and the theory of relativity and quantum mechanics are listed in together 20
The most great discovery in century and scientific work that will be handed on from age to age.The quantum-mechanical physics causal law for occurring having queried microcosmos, and mix
And then the decision type causal law including macrocosm Laplce's formula is then negated in the appearance of ignorant theory, chaology is universal
The opposite of predictable opinion, explains why we cannot be completely dependent on the model of computer or other rationalities to formulate certainly
Plan, main essential characteristic have at 3 points: intrinsic stochasticity, initial value sensitivity, irregular orderly.Chaos sequence is to initial strip
The sensibility of part can be used for multiple access communication；Its noise like characteristic can be used to improve the confidentiality of communication system；Chaos sequence
Chaotic mask can then be can be used for accurate reproduction and signal restores, therefore the chaotic signal that chaos system generates can be widely applied
In the fields such as secret communication.
The differential order of Fractional Differential Equation can be also possible to score for arbitrary number, its appearance extends integer rank
The descriptive power of the differential equation is the popularization of the integer rank differential equation.The research of chaos system is focused primarily upon at present whole
Number rank chaos systems, however actual system be usually in the form of fractional order existing for, integer rank chaos system is to practical mixed
The idealization of ignorant system is handled.Research finds that the nonlinear degree of chaotic systems with fractional order is higher than its corresponding integer rank chaos system
System, i.e. chaotic systems with fractional order have higher complexity and richer dynamic behavior, are more difficult to for information encryption
To crack, therefore chaotic systems with fractional order model and circuit are studied with more commonly meaning and practicability.
In conclusion problem of the existing technology is: it is mixed that the existing research to chaos system is concentrated mainly on integer rank
Ignorant system, it is less to the research of chaotic systems with fractional order and not deep enough.Therefore, a new fractional order chaotic model is constructed,
It is very valuable for designing the concise circuit model simulation chaotic systems with fractional order easily realized
Summary of the invention
In view of the problems of the existing technology, the present invention provides a kind of four-dimensional fractional order chaotic model and its circuits.
In order to achieve the above object, a kind of four-dimensional fractional order chaotic model, the four-dimension fractional order chaotic model are as follows:
Wherein, x, y, z, w are state variable, and a=0.63, b=0.1 are system parameter, and q=0.9 is fractional order order.
Another object of the present invention is to provide a kind of circuit of four-dimensional fractional order chaotic model, the four-dimension scores
The circuit of rank chaotic model includes four channels；
The signal input of the signal input part, second channel of the output signal-x connection first passage of the first passage
End, the signal input part of the previous stage output signal x connection third channel of first passage；Output signal-y the connection of second channel
The signal input part of fourth lane, signal input part, the multiplier of the previous stage output signal y connection first passage of second channel
A2；The previous stage output signal z connection multiplication A1 of third channel；The previous stage output signal w connection second channel of fourth lane
Signal input part.
The first passage includes phase inverter U1,2 pin connecting resistance R4, resistance R5 and the resistance R6 of phase inverter U1,
1 pin and electricity of the other end connection phase inverter U1 of the output signal-x of the other end connection first passage of resistance R4, resistance R5
One end of R6 is hindered, the other end of resistance R6 connects previous stage output signal y；The 2 of the other end connection inverting integrator of resistance R7
The input terminal of pin and 0.9 rank fractional order circuit module；The output end of 0.9 rank fractional order circuit module connects inverting integrator U2
1 pin and resistance R8 one end；The other end of resistance R8 connects 2 pins of phase inverter U3 and one end of resistance R9, resistance R9's
1 pin of other end connection phase inverter U3；3 pins of phase inverter U1,3 pins of inverting integrator U2 draw with the 3 of phase inverter U3
Foot ground connection；4 pins, 4 pins of inverting integrator U2 and 4 pins of phase inverter U3 of phase inverter U1 connect VEE (negative voltage)；Reverse phase
8 pins, 8 pins of inverting integrator U2 and 8 pins of phase inverter U3 of device U1 connect VCC (positive voltage)；Phase inverter integrator U2
Output end be signal-x, the output end of phase inverter U3 is signal x；
The second channel includes multiplier A1, the output of one of input terminal connection first passage of multiplier A1
The previous stage output signal z of another input terminal connection third channel of signal-x, multiplier A1, the output port of multiplier A1
Connect one end of resistance R10；The previous stage output signal w of one end connection fourth lane of resistance R12；2 pins of phase inverter U4
Connect the other end, one end of R11 and the other end of resistance R12 of resistance R10；The other end of resistance R11 connects phase inverter U4
1 pin and resistance R13 one end；2 pins of the other end connection inverting integrator U5 of resistance R13 and 0.9 rank fractional order electricity
The input terminal of road module, 0.9 rank fractional order circuit module connect 1 pin of inverting integrator U5 and one end of resistance R14；Resistance
2 pins of the other end connection phase inverter U6 of R14 and one end of resistance R15, the 1 of the other end connection phase inverter U5 of resistance R15
Pin；3 pins of 3 pins of phase inverter U4,3 pins of inverting integrator U5 and phase inverter U6 are grounded；Draw the 4 of phase inverter U4
Foot, 4 pins of inverting integrator U5 and 4 pins of phase inverter U6 connect VEE (negative voltage)；8 pins, the reverse phase integral of phase inverter U4
8 pins of device U5 and 8 pins of phase inverter U6 connect VCC (positive voltage)；The output signal of second channel phase inverter U6 be-y, second
The output end of channel inverting integrator is signal y；
The third channel includes multiplier A2, and one of input terminal of multiplier A2 connects the previous of first passage
The previous stage output signal y of another input terminal connection second channel of grade output signal x, multiplier A2, multiplier A2's is defeated
One end of outlet connection resistance R16；One end of DC power supply DC is grounded, and the other end connects one end of resistance R18；Phase inverter U7's
2 pins connect the other end, one end of resistance R17 and the other end of resistance R18 of resistance R16, the other end connection of resistance R17
1 pin of phase inverter U7 and one end of resistance R19；2 pins of the other end connection inverting integrator U8 of resistance R19 and 0.9 rank
The input terminal of fractional order circuit module, 1 pin and resistance of the output end connection inverting integrator of 0.9 rank fractional order circuit module
One end of R20,2 pins of the other end connection phase inverter U9 of resistance R20 and one end of resistance R21, the other end connection of R21 are anti-
1 pin of phase device U9；3 pins of 3 pins of phase inverter U7,3 pins of inverting integrator U8 and phase inverter U9 are grounded；Phase inverter
4 pins, 4 pins of inverting integrator U8 and 4 pins of phase inverter U9 of U7 connect VEE (negative voltage)；8 pins of phase inverter U7,
8 pins of inverting integrator U8 and 8 pins of phase inverter U9 connect VCC (positive voltage)；The output signal of third channel phase inverter U9
For-z, the output end of third channel inverting integrator is signal z；
The fourth lane includes phase inverter U10, one end of 2 pin the connecting resistance R22 and R23 of phase inverter U10, resistance
1 pin and resistance of the other end connection phase inverter U10 of the output signal-y of the other end connection second channel of R22, resistance R23
One end of R24,2 pins of the other end connection inverting integrator U11 of resistance R24 and the input of 0.9 rank fractional order circuit module
End, 1 pin of the output end connection inverting integrator U11 of 0.9 rank fractional order circuit module and one end of resistance R25, resistance R25
Other end connection phase inverter U12 2 pins and resistance R26 one end, the other end connection phase inverter U12's of resistance R26 1 draws
Foot；3 pins of 3 pins of phase inverter U10,3 pins of inverting integrator U11 and phase inverter U12 are grounded；Draw the 4 of phase inverter U10
Foot, 4 pins of inverting integrator U11 and 4 pins of phase inverter U12 connect VEE (negative voltage)；8 pins of phase inverter U10, reverse phase
8 pins of integrator U11 and 8 pins of phase inverter U12 connect VCC (positive voltage)；The output signal of fourth lane phase inverter U9 be-
W, the output end of fourth lane inverting integrator are signal w；
Further, the 0.9 rank fractional order circuit module is connected in parallel on the both ends of capacitor C1 by resistance R1, and resistance R2 is in parallel
At the both ends of capacitor C2, resistance R3 is connected in parallel on the both ends of capacitor C3, and three parallel modules are followed in series to form again.
Further, the phase inverter U1, inverting integrator U2, phase inverter U3, phase inverter U4, inverting integrator U5, anti-
Phase device U6, phase inverter U7, inverting integrator U8, phase inverter U9, phase inverter U10, inverting integrator U11, phase inverter U12 are using fortune
Put device TL082.
Further, the multiplier A1, multiplier A2 use multiplier AD633.
Further, in the 0.9 rank fractional order circuit module, resistance R1=62.84M Ω, capacitor C1=1.232uF,
Resistance R2=250K Ω, capacitor C2=1.835uF, resistance R3=2.5K Ω, capacitor C3=1.1uF.
Further, the resistance R4=10K Ω in the first passage, resistance R5=10K Ω, resistance R6=10K Ω, electricity
Hinder R7=2K Ω, resistance R8=10K Ω, resistance R9=10K Ω；Resistance R10=1K Ω, resistance R11=10K in second channel
Ω, resistance R12=10K Ω, resistance R13=2K Ω, resistance R14=10K Ω, resistance R15=10K Ω；Electricity in third channel
R16=1K Ω, resistance R17=10K Ω, resistance R18=10K Ω are hindered, the value of DC voltage source is 0.63V, resistance R19=2K
Ω, resistance R20=10K Ω, resistance R21=10K Ω；Resistance R22=10K Ω in fourth lane, resistance R23=10K Ω, electricity
Hinder R24=2K Ω, resistance R25=10K Ω, resistance R26=10K Ω, VCC=15V, VEE=-15V.
Four-dimensional fractional order chaotic model of the invention can generate a variety of different periods with system parameter a, the variation of b
Track, quasi-periodic orbit, chaos attractor and Hyperchaotic Attractors assign different to the four-dimensional fractional order chaotic model
Initial value when, also have the appearance of attractors coexistence phenomenon, dynamic behavior is extremely abundant, and complexity is high.Its analog circuit knot
Structure is simple, easily realizes, can be used for fractional order chaotic system circuit design, experiment and application, it is real to be particularly suitable for university's circuit
Middle high dimensional nonlinear electric circuit teaching is tested, in addition to this, the high complexity that system shows can also help to overcome existing chaos system
The drawbacks of system information encryption is easily decrypted provides foundation for the application of chaos system.
Detailed description of the invention
Fig. 1 is four-dimensional fractional-order chaos circuit connection schematic diagram provided in an embodiment of the present invention.
Fig. 2 is the numerical simulation x-y plane phase diagram of four-dimensional fractional-order chaos circuit provided in an embodiment of the present invention.
Fig. 3 is the numerical simulation x-z-plane phase diagram of four-dimensional fractional-order chaos circuit provided in an embodiment of the present invention.
Fig. 4 is the numerical simulation y-z plane phase diagram of four-dimensional fractional-order chaos circuit provided in an embodiment of the present invention.
Fig. 5 is the numerical simulation w-x plane phase figure of four-dimensional fractional-order chaos circuit provided in an embodiment of the present invention.
Fig. 6 is the full-scale investigation x-y plane phase diagram of four-dimensional fractional-order chaos circuit provided in an embodiment of the present invention.
Fig. 7 is the full-scale investigation x-z-plane phase diagram of four-dimensional fractional-order chaos circuit provided in an embodiment of the present invention.
Fig. 8 is the full-scale investigation y-z plane phase diagram of four-dimensional fractional-order chaos circuit provided in an embodiment of the present invention.
Fig. 9 is the full-scale investigation w-x plane phase figure of four-dimensional fractional-order chaos circuit provided in an embodiment of the present invention.
Specific embodiment
In order to which the purpose of the present invention and technical solution is more clearly understood, below in conjunction with drawings and examples, to this hair
Bright application principle is explained in detail.
Four-dimension fractional order chaotic model provided in an embodiment of the present invention are as follows:
Wherein, x, y, z, w are state variable, and a=0.63, b=0.1 are system parameter, and q=0.9 is fractional order order,
Under this group of parameter, system shows as hyperchaos behavior.
As shown in Figure 1, the circuit of four-dimension fractional order chaotic model provided in an embodiment of the present invention includes four channel circuits,
Contain a 0.9 rank fractional order circuit module in each channel circuit, is made of 62 original parts, including 12 TL082 operations are put
Big device, 2 multipliers, 12 capacitors and 36 resistance.It is specific as shown in Figure 1
In first channel circuit, 2 pin connecting resistance R4, resistance R5 and the resistance R6 of phase inverter U1, resistance R4's
The other end connect first passage output signal-x, resistance R5 the other end connection phase inverter U1 1 pin and resistance R6 one
The other end at end, resistance R6 connects previous stage output signal y；2 pins and 0.9 of the other end connection inverting integrator of resistance R7
The input terminal of rank fractional order circuit module；0.9 rank fractional order circuit module output end connection inverting integrator U2 1 pin and
One end of resistance R8；The other end of resistance R8 connects 2 pins of phase inverter U3 and one end of resistance R9, the other end connection of resistance R9
1 pin of phase inverter U3；3 pins of 3 pins of phase inverter U1,3 pins of inverting integrator U2 and phase inverter U3 are grounded；Reverse phase
4 pins, 4 pins of inverting integrator U2 and 4 pins of phase inverter U3 of device U1 connect VEE (negative voltage)；Draw the 8 of phase inverter U1
Foot, 8 pins of inverting integrator U2 and 8 pins of phase inverter U3 connect VCC (positive voltage)；The output end of phase inverter integrator U2 is
The output end of signal-x, phase inverter U3 are signal x；
In second channel circuit, the output signal-x of one of input terminal connection first passage of multiplier A1,
The output port of previous stage the output signal z, multiplier A1 of another input terminal connection third channel of multiplier A1 connect electricity
Hinder one end of R10；The previous stage output signal w of one end connection fourth lane of resistance R12；2 pins of phase inverter U4 connect electricity
Hinder the other end, one end of R11 and the other end of resistance R12 of R10；1 pin of the other end connection phase inverter U4 of resistance R11
With one end of resistance R13；2 pins and 0.9 rank fractional order circuit module of the other end connection inverting integrator U5 of resistance R13
Input terminal, 0.9 rank fractional order circuit module connect 1 pin of inverting integrator U5 and one end of resistance R14；Resistance R14's is another
One end connects 2 pins of phase inverter U6 and one end of resistance R15,1 pin of the other end connection phase inverter U5 of resistance R15；Instead
3 pins of 3 pins of phase device U4,3 pins of inverting integrator U5 and phase inverter U6 are grounded；4 pins of phase inverter U4, reverse phase product
4 pins of 4 pins and phase inverter U6 that divide device U5 connect VEE (negative voltage)；8 pins of phase inverter U4, the 8 of inverting integrator U5 are drawn
8 pins of foot and phase inverter U6 connect VCC (positive voltage)；The output signal of second channel phase inverter U6 is-y, second channel reverse phase
The output end of integrator is signal y；
In third channel circuit, the previous stage of one of input terminal connection first passage of multiplier A2 exports letter
The output end connection of previous stage the output signal y, multiplier A2 of another input terminal connection second channel of number x, multiplier A2
One end of resistance R16；One end of DC power supply DC is grounded, and the other end connects one end of resistance R18；2 pins of phase inverter U7 connect
The other end of the other end of the other end of connecting resistance R16, one end of resistance R17 and resistance R18, resistance R17 connects phase inverter
1 pin of U7 and one end of resistance R19；2 pins and 0.9 rank fractional order of the other end connection inverting integrator U8 of resistance R19
The input terminal of circuit module, 1 pin and resistance R20 of the output end connection inverting integrator of 0.9 rank fractional order circuit module
One end, 2 pins of the other end connection phase inverter U9 of resistance R20 and one end of resistance R21, the other end of R21 connect phase inverter
1 pin of U9；3 pins of 3 pins of phase inverter U7,3 pins of inverting integrator U8 and phase inverter U9 are grounded；Phase inverter U7's
4 pins, 4 pins of inverting integrator U8 and 4 pins of phase inverter U9 connect VEE (negative voltage)；8 pins of phase inverter U7, reverse phase
8 pins of integrator U8 and 8 pins of phase inverter U9 connect VCC (positive voltage)；The output signal of third channel phase inverter U9 is-z,
The output end of third channel inverting integrator is signal z；
In the 4th channel circuit, one end of 2 pin the connecting resistance R22 and R23 of phase inverter U10, resistance R22's is another
End connection second channel output signal-y, resistance R23 the other end connection phase inverter U10 1 pin and resistance R24 one
End, 2 pins of the other end connection inverting integrator U11 of resistance R24 and the input terminal of 0.9 rank fractional order circuit module, 0.9 rank
1 pin of the output end connection inverting integrator U11 of fractional order circuit module and one end of resistance R25, the other end of resistance R25
Connect 2 pins of phase inverter U12 and one end of resistance R26,1 pin of the other end connection phase inverter U12 of resistance R26；Reverse phase
3 pins of 3 pins of device U10,3 pins of inverting integrator U11 and phase inverter U12 are grounded；4 pins of phase inverter U10, reverse phase
4 pins of integrator U11 and 4 pins of phase inverter U12 connect VEE (negative voltage)；8 pins, the inverting integrator of phase inverter U10
8 pins of U11 and 8 pins of phase inverter U12 connect VCC (positive voltage)；The output signal of fourth lane phase inverter U9 be-w, the 4th
The output end of channel inverting integrator is signal w；
0.9 rank fractional order circuit module in each channel circuit is connected in parallel on the both ends of capacitor C1, resistance R2 by resistance R1
The both ends of capacitor C2 are connected in parallel on, resistance R3 is connected in parallel on the both ends of capacitor C3, and three parallel modules are followed in series to form again.
When component parameters are taken as resistance R1=62.84M Ω, capacitor C1=1.232uF, resistance R2=250K Ω, capacitor C2
=1.835uF, resistance R3=2.5K Ω, capacitor C3=1.1uF, resistance R4=10K Ω, resistance R5=10K Ω, resistance R6=
10K Ω, resistance R7=2K Ω, resistance R8=10K Ω, resistance R9=10K Ω, resistance R10=1K Ω, resistance R11=10K Ω,
Resistance R12=10K Ω, resistance R13=2K Ω, resistance R14=10K Ω, resistance R15=10K Ω, resistance R16=1K Ω, resistance
R17=10K Ω, resistance R18=10K Ω, the value of DC voltage source are 0.63V, resistance R19=2K Ω, resistance R20=10K Ω,
Resistance R21=10K Ω, resistance R22=10K Ω, resistance R23=10K Ω, resistance R24=2K Ω, resistance R25=10K Ω, electricity
When hindering R26=10K Ω, circuit shows hyperchaos behavior.
Application effect of the invention is explained in detail below with reference to analogue simulation figure and pictorial diagram.
Fig. 2 is the numerical simulation x-y plane phase diagram of fractional-order chaos circuit, and Fig. 3 is the numerical value of fractional-order chaos circuit
X-z-plane phase diagram is emulated, Fig. 4 is the numerical simulation y-z plane phase diagram of fractional-order chaos circuit, and Fig. 5 is fractional order chaos
The numerical simulation w-x plane phase figure of circuit, Fig. 6 are the full-scale investigation x-y plane phase diagram of fractional-order chaos circuit, and Fig. 7 is
The full-scale investigation x-z-plane phase diagram of fractional-order chaos circuit, Fig. 8 are the full-scale investigation y-z plane phase of fractional-order chaos circuit
Bitmap, Fig. 9 are the full-scale investigation w-x plane phase figure of fractional-order chaos circuit.The four-dimension of the invention it can be seen from this group picture
The hardware circuit result of fractional order chaotic model is consistent with Numerical Simulation Results, to demonstrate correctness of the invention and effectively
Property.
Claims (8)
1. a kind of four-dimension fractional order chaotic model, which is characterized in that the four-dimension fractional order chaotic model are as follows:
Wherein, x, y, z, w are state variable, and a=0.63, b=0.1 are system parameter, and q=0.9 is fractional order order.
2. a kind of four-dimension fractional order chaotic model circuit, which is characterized in that including first passage, second channel, third channel and
Fourth lane:
The signal input part of the signal input part of the output signal-x connection first passage of the first passage, second channel,
The signal input part of the previous stage output signal x connection third channel of first passage；Output signal-y the connection of second channel
The signal input part of four-way, signal input part, the multiplier of the previous stage output signal y connection first passage of second channel
A2；The previous stage output signal z connection multiplication A1 of third channel；The previous stage output signal w connection second channel of fourth lane
Signal input part.
3. a kind of four-dimensional chaotic systems with fractional order analog circuit according to claim 1, which is characterized in that described first
Channel includes phase inverter U1, the other end connection of 2 pin connecting resistance R4, the resistance R5 and resistance R6, resistance R4 of phase inverter U1
1 pin of the other end connection phase inverter U1 of the output signal-x of first passage, resistance R5 and one end of resistance R6, resistance R6's
The other end connects previous stage output signal y；2 pins of the other end connection inverting integrator of resistance R7 and 0.9 rank fractional order electricity
The input terminal of road module；0.9 rank fractional order circuit module output end connection inverting integrator U2 1 pin and resistance R8 one
End；The other end of resistance R8 connects 2 pins of phase inverter U3 and one end of resistance R9, the other end connection phase inverter U3's of resistance R9
1 pin；3 pins of 3 pins of phase inverter U1,3 pins of inverting integrator U2 and phase inverter U3 are grounded；Draw the 4 of phase inverter U1
Foot, 4 pins of inverting integrator U2 and 4 pins of phase inverter U3 connect VEE (negative voltage)；8 pins, the reverse phase integral of phase inverter U1
8 pins of device U2 and 8 pins of phase inverter U3 connect VCC (positive voltage)；The output end of phase inverter integrator U2 is signal-x, reverse phase
The output end of device U3 is signal x.
4. a kind of four-dimensional chaotic systems with fractional order analog circuit according to claim 1, which is characterized in that described second
Channel includes multiplier A1, and one of input terminal of multiplier A1 connects the output signal-x of first passage, multiplier A1's
Another input terminal connects the one of the output port connection resistance R10 of previous stage the output signal z, multiplier A1 of third channel
End；The previous stage output signal w of one end connection fourth lane of resistance R12；The 2 pins connection resistance R10's of phase inverter U4 is another
The other end of one end, one end of R11 and resistance R12；1 pin and resistance R13 of the other end connection phase inverter U4 of resistance R11
One end；2 pins of the other end connection inverting integrator U5 of resistance R13 and the input terminal of 0.9 rank fractional order circuit module,
0.9 rank fractional order circuit module connects 1 pin of inverting integrator U5 and one end of resistance R14；The other end of resistance R14 connects
Connect 2 pins of phase inverter U6 and one end of resistance R15,1 pin of the other end connection phase inverter U5 of resistance R15；Phase inverter U4
3 pins, inverting integrator U5 3 pins and phase inverter U6 3 pins be grounded；4 pins, the inverting integrator U5 of phase inverter U4
4 pins and 4 pins of phase inverter U6 connect VEE (negative voltage)；8 pins of phase inverter U4,8 pins of inverting integrator U5 and anti-
8 pins of phase device U6 connect VCC (positive voltage)；The output signal of second channel phase inverter U6 is-y, second channel inverting integrator
Output end be signal y.
5. a kind of four-dimensional chaotic systems with fractional order analog circuit according to claim 1, which is characterized in that the third
Channel includes multiplier A2, the previous stage output signal x of one of input terminal connection first passage of multiplier A2, multiplier
The one of the output end connection resistance R16 of previous stage the output signal y, multiplier A2 of another input terminal connection second channel of A2
End；One end of DC power supply DC is grounded, and the other end connects one end of resistance R18；The 2 pins connection resistance R16's of phase inverter U7
The other end of the other end, one end of resistance R17 and resistance R18, resistance R17 the other end connection phase inverter U7 1 pin and
One end of resistance R19；Resistance R19 the other end connection inverting integrator U8 2 pins and 0.9 rank fractional order circuit module it is defeated
Enter end, 1 pin of the output end connection inverting integrator of 0.9 rank fractional order circuit module and one end of resistance R20, resistance R20
The other end connection phase inverter U9 2 pins and resistance R21 one end, R21 the other end connection phase inverter U9 1 pin；Instead
3 pins of 3 pins of phase device U7,3 pins of inverting integrator U8 and phase inverter U9 are grounded；4 pins of phase inverter U7, reverse phase product
4 pins of 4 pins and phase inverter U9 that divide device U8 connect VEE (negative voltage)；8 pins of phase inverter U7, the 8 of inverting integrator U8 are drawn
8 pins of foot and phase inverter U9 connect VCC (positive voltage)；The output signal of third channel phase inverter U9 is-z, third channel reverse phase
The output end of integrator is signal z.
6. a kind of four-dimensional chaotic systems with fractional order analog circuit according to claim 1, which is characterized in that described the 4th
Channel includes phase inverter U10, one end of 2 pin the connecting resistance R22 and R23 of phase inverter U10, the other end connection of resistance R22 the
1 pin of the other end connection phase inverter U10 of the output signal-y in two channels, resistance R23 and one end of resistance R24, resistance R24
The other end connection inverting integrator U11 2 pins and 0.9 rank fractional order circuit module input terminal, 0.9 rank fractional order circuit
1 pin of the output end connection inverting integrator U11 of module and one end of resistance R25, the other end of resistance R25 connect phase inverter
2 pins of U12 and one end of resistance R26,1 pin of the other end connection phase inverter U12 of resistance R26；Draw the 3 of phase inverter U10
3 pins of foot, 3 pins of inverting integrator U11 and phase inverter U12 are grounded；4 pins, the inverting integrator U11 of phase inverter U10
4 pins and 4 pins of phase inverter U12 connect VEE (negative voltage)；8 pins of 8 pins of phase inverter U10, inverting integrator U11
VCC (positive voltage) is connect with 8 pins of phase inverter U12；The output signal of fourth lane phase inverter U9 is-w, fourth lane reverse phase product
The output end for dividing device is signal w.
7. a kind of four-dimensional chaotic systems with fractional order analog circuit according to claim 2, which is characterized in that the reverse phase
Device U1, inverting integrator U2, phase inverter U3, phase inverter U4, inverting integrator U5, phase inverter U6, phase inverter U7, inverting integrator
U8, phase inverter U9, phase inverter U10, inverting integrator U11, phase inverter U12 use transport and placing device TL082；Multiplier A1, multiplier
A2 uses multiplier AD633.
8. a kind of four-dimensional chaotic systems with fractional order analog circuit according to claim 2, which is characterized in that described first
Resistance R4=10K Ω in channel, resistance R5=10K Ω, resistance R6=10K Ω, resistance R7=2K Ω, resistance R8=10K Ω,
Resistance R9=10K Ω；Resistance R10=1K Ω in second channel, resistance R11=10K Ω, resistance R12=10K Ω, resistance R13
=2K Ω, resistance R14=10K Ω, resistance R15=10K Ω；Resistance R16=1K Ω, resistance R17=10K in third channel
Ω, resistance R18=10K Ω, the value of DC voltage source are 0.63V, resistance R19=2K Ω, resistance R20=10K Ω, resistance R21
=10K Ω；Resistance R22=10K Ω in fourth lane, resistance R23=10K Ω, resistance R24=2K Ω, resistance R25=10K
Ω, resistance R26=10K Ω, VCC=15V, VEE=-15V.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110113146A (en) * | 2019-06-04 | 2019-08-09 | 齐鲁理工学院 | A kind of analog circuit of chaotic systems with fractional order |
| CN111404660A (en) * | 2020-03-12 | 2020-07-10 | 华东交通大学 | Four-order memristor chaotic signal source circuit |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN203537406U (en) * | 2013-06-13 | 2014-04-09 | 周元贵 | New fractional order four-dimensional four-wing chaotic circuit |
| CN205265707U (en) * | 2015-12-12 | 2016-05-25 | 西京学院 | Chaos circuit of four -dimensional super T |
| US20170168987A1 (en) * | 2014-08-31 | 2017-06-15 | Zhonglin Wang | Four-dimensional non-equilibrium hyperchaotic system and analog circuit, based on five simplest chaotic systems |
| CN107124263A (en) * | 2017-06-30 | 2017-09-01 | 湘潭大学 | Nested type multiscroll chaotic circuit |
-
2018
- 2018-10-30 CN CN201811276339.9A patent/CN109302277A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN203537406U (en) * | 2013-06-13 | 2014-04-09 | 周元贵 | New fractional order four-dimensional four-wing chaotic circuit |
| US20170168987A1 (en) * | 2014-08-31 | 2017-06-15 | Zhonglin Wang | Four-dimensional non-equilibrium hyperchaotic system and analog circuit, based on five simplest chaotic systems |
| CN205265707U (en) * | 2015-12-12 | 2016-05-25 | 西京学院 | Chaos circuit of four -dimensional super T |
| CN107124263A (en) * | 2017-06-30 | 2017-09-01 | 湘潭大学 | Nested type multiscroll chaotic circuit |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110113146A (en) * | 2019-06-04 | 2019-08-09 | 齐鲁理工学院 | A kind of analog circuit of chaotic systems with fractional order |
| CN110113146B (en) * | 2019-06-04 | 2022-04-29 | 齐鲁理工学院 | Analog circuit of fractional order chaotic system |
| CN111404660A (en) * | 2020-03-12 | 2020-07-10 | 华东交通大学 | Four-order memristor chaotic signal source circuit |
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