CN108234106A - A kind of hiding L ü systems hyperchaos signal source circuit based on memristor - Google Patents
A kind of hiding L ü systems hyperchaos signal source circuit based on memristor Download PDFInfo
- Publication number
- CN108234106A CN108234106A CN201711021406.8A CN201711021406A CN108234106A CN 108234106 A CN108234106 A CN 108234106A CN 201711021406 A CN201711021406 A CN 201711021406A CN 108234106 A CN108234106 A CN 108234106A
- Authority
- CN
- China
- Prior art keywords
- memristor
- circuit
- hiding
- signal source
- systems
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/001—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols using chaotic signals
Landscapes
- Engineering & Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Amplifiers (AREA)
Abstract
The present invention discloses a kind of hiding L ü systems hyperchaos signal source circuit based on memristor, in the first equation addition memristor item, second equation addition linear feedback item and the external drive item of original L ü systems.The circuit system includes memristor equivalent implementation circuit and oscillatory system, after memristor equivalent implementation circuit and each identical port of oscillatory system are sequentially connected, equalization point is not present in the memristor system realized, an attractor can be generated, cycles limit ring, paracycle limit cycle, the hiding oscillatory occurences such as chaos attractor and Hyperchaotic Attractors, and phenomenon coexists in the hiding multi attractor that the different cycles limit ring of topological structure or weak chaos and cycles limit ring can be generated under different primary condition, show that signal caused by the signal source has more horn of plenty and the nonlinear dynamic characteristic of complexity.The circuit system is easy to circuit realization and experimental observation, is a kind of new chaotic secret communication Mi Keying signal generating circuits.
Description
Technical field
It is especially a kind of based on memristor the present invention relates to a kind of memristor hyperchaotic system containing hiding attractor
Hide L ü system hyperchaos signal source circuits.
Background technology
A kind of new two-terminal circuit element-memristor is proposed within 1971, and theoretically predicts memristor charge
With the existence of magnetic flux magnitude relation.2008, the researcher of hewlette-packard by memristor element, realized for the first time by circuit.
The researcher of Seagate Technology in 2009 has invented a kind of spin memristor system based on electro-magnetic again.In recent years, memristor
Element is pre- in the research of artificial neural network, secret communication, memory, biosimulation because it is with non-linear and Memorability
Show that there are wide application prospects.The appearance of memristor to continue Moore's Law, memory characteristic, nanoscale ruler
Very little, the features such as high-speed switch and power consumption are low, lays a solid foundation for the research of its various application.Also, with material
The development of the subjects such as material, electronics, system, automation, the research and application of memristor will become more and more popular research side
To.
Based on the non-linear of memristor, more and more scholars start to apply it in the generation of chaos circuit, thus
There are many applications in secret communication.Although the circuit realization side of memristor element has been invented in succession by Hewlett-Packard and Seagate Technology
Method, but its high cost and larger technology realize difficulty cause memristor element be also unable to reach commercially produce should
With level.This causes many researchers that can not also directly obtain relevant memristor element and carry out various scientific researches, therefore,
Using the discrete components such as resistance, capacitance, inductance, operational amplifier, analog multiplier realize a variety of memristor simulators or
Circuit of the person based on special topological form constructs several broad sense memristor simulators, is the modeling point of memristor and its application circuit
Analysis and Germicidal efficacy are made that significant contribution.
The present invention proposes a kind of hiding L ü systems hyperchaos signal source based on memristor, has further expanded and has recalled
Hinder the way of realization of simulator.Also, the present invention proposes the memristor hyperchaotic circuit obtained under the conditions of the four-dimension, does not balance
Point, and hyperchaos can be generated and hide attractor so that the system has increasingly complex kinetic characteristics, it is contemplated that the memristor
System has potential application value secret communication key generation etc..New system is generated novel and unusual
Attractor is hidden, different from traditional self-excitation attractor, because equalization point is not present in new system, attracts basin and any shakiness
Determine that equalization point is non-intersect, it is new discovery in recent years and a kind of attractor for newly defining, has obtained the extensive concern of academia simultaneously
Achieve lot of research.Therefore, it studies the implementation method of new memristor system and its existing hide or coexist attractor
There is important physical significance.
Invention content
To solve the prior art, there are original L ü systems, there are equalization points, attract what basin intersected with unstable equilibrium point
Defect, the present invention provide a kind of hiding L ü systems hyperchaos signal source circuit based on memristor, are easy to circuit realization and reality
Observation is tested, larger progradation can be played for the research and application communication coded signal source of memristor circuit attractor.
To achieve the above object, the present invention uses following technical proposals：
A kind of hiding L ü systems hyperchaos signal source circuit based on memristor, it is equivalent which includes memristor
Realize that circuit and oscillatory system, memristor equivalent implementation circuit are sequentially connected with identical port in three channels of oscillatory system.
Further, memristor equivalent implementation circuit is made of integrator and multiplier；
Memristor equivalent implementation circuit input end-vyV is exported after integral operationw、vwWith-vy, by multiplying
With output-gW (v after add operationw)vy；Two of which memristor inner parameter α=4 and β=0.18.
Further, three channels of oscillatory system are respectively first passage, second channel and third channel, and three
Channel is made of the cascade of multiplier, integrator module and inverter modules；
There are two input terminal v for first passagexWith-vy, by exporting v after integratorx, wherein system control parameters a=36；
There are four input terminal-μ, v for second channelx、v1With-vy, by exporting v after multiplier and integrator operationy, then pass through
Cross level-one phase inverter final output-vy, wherein system control parameters b=20, d=5 and μ=0.1, v1=vxvz；
There are two input terminal v for the third channel2And vz, by exporting v after multiplier and integrator operationz, wherein being
Control parameter of uniting c=3, v2=-vxvy；
The operational amplifier U of the first passage1, second channel operational amplifier U2And U3And the fortune of third channel
Calculate amplifier U4In-phase input end ground connection.
Further, which is such as following formula (2)：
(2) formula has five system control parameters of a, b, c, d and μ and α and two memristor inner parameters of β.
Advantageous effect：
The present invention is in the first equation addition memristor item, second equation addition linear feedback item and the outside of original L ü systems
Item is encouraged, realizes a kind of hiding L ü systems hyperchaos signal source circuit based on memristor.The circuit system is simple in structure,
Be easy to theory analysis and circuit integrate, can show an attractor, cycles limit ring, limit cycle paracycle, chaos attractor,
The hiding oscillatory occurences such as Hyperchaotic Attractors and multi attractor has preferable engineer application valency in fields such as chaotic secret communications
Value.
Description of the drawings
Fig. 1 is a kind of system of hiding one embodiment of L ü system hyperchaos signal source circuit based on memristor of the present invention
Circuit diagram；
Fig. 2 (a)-Fig. 2 (f) is a kind of hiding L ü systems hyperchaos signal source circuit numerical value based on memristor of the present invention
It emulates obtained typical case and hides the phase rail figure of attractor on x-z plane；
Wherein：(a) point attracts sub-track；(b) 2 limit loop orbit of period；(c) 3 limit loop orbit of period；(d) paracycle
Limit loop orbit；(e) chaotic orbit；(f) hyperchaotic orbits；
Fig. 3 (a)-Fig. 3 (b) is a kind of hiding L ü systems hyperchaos signal source circuit based on memristor of the present invention, first
Phase rail figure of the phenomenon in 2 phase planes coexists in the three limit cycle multi attractors that numerical simulation obtains under initial value different condition；
Wherein：(a) on x-z plane；(b) in x-w planes；
Fig. 4 (a)-Fig. 4 (b) is a kind of hiding L ü systems hyperchaos signal source circuit numerical value based on memristor of the present invention
Emulate the phase rail figure of obtained cycles limit ring and weak chaos attractors coexistence phenomenon in 2 phase planes；
Wherein：(a) on x-z plane；(b) in x-w planes；
Fig. 5 (a)-Fig. 5 (f) is a kind of hiding L ü system hyperchaos signal source circuit experiment based on memristor of the present invention
It measures the typical case captured and hides the phase rail figure of attractor on x-z plane；
Wherein：(a) point attracts sub-track；(b) 2 limit loop orbit of period；(c) 3 limit loop orbit of period；(d) paracycle
Limit loop orbit；(e) chaotic orbit；(f) hyperchaotic orbits；
Fig. 6 (a)-Fig. 6 (b) is a kind of hiding L ü system hyperchaos signal source circuit experiment based on memristor of the present invention
It measures the three limit cycle multi attractors captured and phase rail figure of the phenomenon in 2 phase planes coexists；
Wherein：(a) on x-z plane；(b) in x-w planes；
Fig. 7 (a)-Fig. 7 (b) is a kind of hiding L ü system hyperchaos signal source circuit experiment based on memristor of the present invention
Measure the phase rail figure of the cycles limit ring and weak chaos attractors coexistence phenomenon that capture in 2 phase planes；
Wherein：(a) on x-z plane；(b) in x-w planes.
Specific embodiment
The present invention is further described with reference to the accompanying drawings and examples.
A kind of hiding L ü systems hyperchaos signal source circuit based on memristor of the present invention, as shown in Fig. 1, it includes recalling
Hinder device equivalent implementation circuit 1 and oscillatory system 2；Wherein memristor equivalent implementation circuit 1 and each identical port of oscillatory system 2 according to
It is secondary be connected after, there is no equalization points for the memristor system of realization, can show cycles limit ring, limit cycle paracycle, chaos and attract
The hiding oscillatory occurences such as son, Hyperchaotic Attractors and multi attractor.
As shown in Figure 1, memristor equivalent implementation circuit 1 is made of integrator and multiplier etc.；Input terminal-vyBy product
Partite transport exports v after calculatingw、vwWith-vy, the output-gW (v after multiplying and add operationw)vy；System control parameters α is set
=4 and β=0.18.
As shown in Figure 1, oscillatory system 2 includes first passage, second channel and third channel；There are two defeated for first passage
Enter to hold vxWith-vy, by exporting v after integratorx；There are four input terminal-μ, v for second channelx、v1With-vy, by multiplier and
V is exported after integrator operationy, using level-one phase inverter final output-vy；There are two input terminal v for third channel2And vz, lead to
V is exported after crossing multiplier and integrator operationz；Operational amplifier U1、U2、U3And U4In-phase input end ground connection, set system control
Parameter a=36, b=20, c=3, d=5 and μ processed=0.1.Three channels are by multiplier, integrator module and inverter modules
Wait cascades composition；Three channels are sequentially connected with the node of all identical marks of 1 channel of memristor equivalent implementation circuit in Fig. 1
For a four-dimensional oscillatory system.After being sequentially connected with each identical port of 2 circuit of oscillatory system in Fig. 1, with memristor change in gain,
Achievable output cycles limit ring, limit cycle paracycle, chaos attractor, Hyperchaotic Attractors and multi attractor etc. are hiding to shake
Swing phenomenon.
As shown in Figure 1, there are two input terminals in first passage.Input terminal vxOne resistance (R/a) of series connection is followed by operation
Amplifier U1Inverting input, input terminal-vyOne resistance (R/a) of series connection is followed by operational amplifier U1Anti-phase input
End, input terminal-vyOne memristor of series connection is followed by operational amplifier U1Inverting input, U1Inverting input and output
Shunt capacitance C between end, at this time U1Output terminal output vx；Operational amplifier U1In-phase input end is grounded.Wherein a=36.
As shown in Figure 1, there are four input terminal-μ, v in second channelx、v1With-vy.Input terminal-μ one resistance of series connection
(2R) is followed by operational amplifier U2Inverting input, input terminal vxOne resistance (R/d) of series connection is followed by operational amplifier
U2Inverting input, input terminal v1One resistance (R/2) of series connection is followed by operational amplifier U2Inverting input, input
End-vyOne resistance (R/b) of series connection is followed by operational amplifier U2Inverting input, U2Inverting input and output terminal
Between shunt capacitance C, at this time U2Output terminal output vy；Operational amplifier U2Output terminal and U3Inverting input between go here and there
Join the resistance of a 36k Ω；Operational amplifier U3Inverting input and output terminal between one 36k Ω of parallel connection resistance, this
When U3Output terminal output-vy；Operational amplifier U2And U3In-phase input end be grounded.Wherein b=20, d=5, μ=0.1
And v1=vxvz。
As shown in Figure 1, there are two input terminal v in third channel2And vz.Input terminal v2One resistance (R/2) of series connection is followed by
In operational amplifier U4Inverting input, input terminal vzOne resistance (R/c) of series connection is followed by operational amplifier U4Reverse phase
Input terminal, U4Inverting input and output terminal between shunt capacitance C, at this time U4Output terminal output vz；Operational amplifier U4
In-phase input end ground connection.Wherein c=3 and v2=-vxvy。
System equation is containing there are four state variable x, y, z and w；Corresponding circuits state equation is containing there are four state variable vx、
vy、vzAnd vw。
The specific connection mode of memristor equivalent implementation circuit is：Input terminal-vySeries resistance (R/2) is followed by operation and puts
Big device UaInverting input, UaInverting input and output terminal between shunt capacitance C, at this time UaOutput terminal output vw；
Multiplier MaTwo input terminals all meet vw, MaOutput termination multiplier MbAn input terminal；MbAnother input terminal
Meet-vy, MbOutput terminal and memristor output terminal between series resistance (R/g β) ,-vyThe series resistance between memristor output terminal
(R/g α), the gW (v of memristor output terminal output at this timew)vx；Operational amplifier UaIn-phase input end ground connection.Wherein α=4 and β=
0.18。
A kind of hiding L ü systems hyperchaos signal source circuit based on memristor of the present invention is as shown in Fig. 1, wherein x, y, z
With four state variable v that w is systemx, vy, vzAnd vwFor system corresponding circuits four state variables and have following relationship：
Mathematical modeling is as follows：The present invention is based on the mathematical model of three-dimensional L ü systems, such as following formula (1)：
In formula, x, y, z is 3 state variables, and a, b and c are 3 control parameters.On the basis of (1) formula, the first equation adds
After adding memristor item, second equation addition linear feedback item and external drive item, a kind of hiding L ü systems based on memristor can be established
The Non-di-mensional equation of system hyperchaos signal source circuit is such as following formula (2)：
(2) formula has five system control parameters of a, b, c, d and μ and α and two memristor inner parameters of β.In following point
In analysis, setting a=36, b=20, c=3, d=5, μ=0.1, α=4 and β=0.18 select memristor gain g as memristor system
Unique control parameter.Because of the presence of external drive item μ, the memristor system of (2) formula description is there is no equalization point, therefore this is
The phase rail figure of system output belongs to hide attractor.
In formula (2), w is dimensionless state variable inside memristor, and W (w)=(alpha+beta w2).Based on operational amplifier and
The pure analog circuit of analog multiplier can realize the described Kind of Nonlinear Dynamical System of (2) formula, wherein, vx、vy、vz、vwPoint
The capacitance voltage state variable of 4 integrating circuit channels is not represented, wherein according to (2) formula Numerical Simulation Results state variable
Variation range is too big, it is contemplated that amplifier used in circuit realization and the limitation of the voltage range of multiplier, to the described electricity of (2) formula
Pressure condition variable has carried out certain scaling, such as following formula (3)：
X=2vx/ V, y=2vy/ V, z=2vz/ V, w=vw/V (3)
RC is integration time constant, and v1=vxvzAnd v2=-vxvy.Therefore, the memristor class L ü systems in (2) formula are super mixed
Ignorant hiding attractor generation circuit schematic diagram is as shown in Figure 1, the circuit state equation represents as follows, such as following formula (4)：
Wherein, the mathematical model of memristor that the present invention selects is such as following formula (5)：
In formula, α and β are 2 positive real constants, vwFor the internal state variable of memristor, vyFor the input voltage of memristor,
iyOutput for memristor and the reversed input for second integral channel integral operation amplifier.Based on operational amplifier and mould
The non-ideal memristor W (v that quasi-multiplication device is realizedw) pure analog circuit as shown in memristor equivalent implementation circuit 1 in Fig. 1, wherein
Integration time constant RC is consistent with oscillatory system in Fig. 12.So far, the present invention constructs a kind of based on memristor
Hide the circuit implementing scheme of L ü system hyperchaos signal sources.
Numerical simulation is as follows：Using MATLAB simulation Software Platforms, numerical value can be carried out to the described system of formula (2)
Simulation analysis.Runge-Kutta (ODE45) algorithm is selected to solve system equation, the phase of this memristor system state variables can be obtained
Rail figure.As memristor gain g=16, LE1=0, LE2=-2.982, LE3=-7.948, LE4=-8.077, can by Fig. 2 (a)
See, the hiding attractor of point is presented in memristor system；As memristor gain g=1.7, LE1=0, LE2=-0.06891, LE3=-
0.594、LE4=-18.29, by Fig. 2 (b) as it can be seen that the period two, which is presented, in memristor system hides limit cycle；As memristor gain g=
When 5.96, LE1=0, LE2=-0.2976, LE3=-0.299, LE4=-18.37, by Fig. 2 (c) as it can be seen that memristor system is presented
Period three hides limit cycle.As memristor gain g=7.95, LE1=0, LE2=0, LE3=-0.1347, LE4=-18.83,
By Fig. 2 (d) as it can be seen that memristor system, which is presented, hides limit cycle paracycle.As memristor gain g=2.55, LE1=0.6534,
LE2=0, LE3=-0.06931, LE4=-19.53, by Fig. 2 (e) as it can be seen that memristor system, which is presented, hides chaos attractor.When recalling
When hindering gain g=13.4, LE1=0.2411, LE2=0.1129, LE3=0, LE4=-19.32, by Fig. 2 (f) as it can be seen that memristor
System, which is presented, hides Hyperchaotic Attractors.
As memristor gain g=5.96, memristor system is the period, can show 3 hiding limit cycles and phenomenon coexists,
Shown in projection such as Fig. 3 (a), (b) in 2 phase planes, wherein including the operation set out from primary condition (1,3,1,1)
Track, the running orbit to set out from primary condition (1,0,1,0) and the operation rail to set out from primary condition (1,3,1,0)
Mark.
It is memristor system or weak chaos or the period as memristor gain g=6.936, depend entirely on memristor
The initial oscillation condition of system.The hiding weak chaos attractor coexisted and projection of the hiding cycles limit ring in 2 phase planes
As shown in Fig. 4 (a), (b), wherein including the running orbit to set out from primary condition (1,3,1,1) and from primary condition
(1,0,1,0) running orbit to set out.
The circuit can generate different chaotic signal by adjusting circuit memristor gain parameter value g, obtain a variety of having
The chaotic behavior of complex dynamic characteristics realizes a kind of hiding L ü systems hyperchaos signal source circuit based on memristor.
Experimental verification：Discrete component of the present invention selects metalfilmresistor, accurate adjustable resistance and monolithic capacitor, deviding device
It is the OP07CP operational amplifiers of ± 15V and AD633JNZ analog multipliers that part, which selects supply voltage,.In experimentation, by
Agilent Technologies DSO7054B digital storage oscilloscopes are completed experimental waveform and are captured.Wherein, reference resistance and ginseng
Capacitance is examined to be respectively selected as：R=36k Ω, C=100nF.In addition, resistance ReAnd RfIt is that linkage is adjustable, parameter value difference
For：Re=R/g α, Re=R/g β.When gain g changes, the parameter value for the adjustable resistance that links is fixed to：ReAnd Rf.Memristor
System or converge to point or the period or quasi-periodic or chaos or hyperchaos or more
A hiding attractor coexisted.
As gain g point, period, paracycle, chaos and the hyperchaos changed hide attractor in x-z phase planes
Projection is as shown in Fig. 5 (a)-(f).
As memristor gain g=5.96, memristor system is the period, can show being total to for three hiding cycles limit rings
Deposit cash as, shown in projection such as Fig. 6 (a), (b) in 2 phase planes, wherein include from 3 different primary condition (1,3,
1,1), the running orbit that (1,0,1,0) and (1,3,1,0) sets out, can be by constantly opening the electricity with turning off system circuit
Source powers to realize.
It is memristor system or weak chaos or the period as memristor gain g=6.936.Hiding for coexisting is weak mixed
Ignorant attractor and projection of the hiding cycles limit ring in 2 phase planes such as Fig. 7 (a), (b) are shown.
By Fig. 2 (a)-(f), 3 (a), (b) and 4 (a), (b) experimental measurements and Fig. 5 (a)-(f), 6 (a), (b) and 7
(a), (b) Numerical Simulation Results are made comparisons, it is possible to find the two has preferable consistency, thus demonstrates answering for memristor system
The existence of miscellaneous dynamic behavior.The result, which further demonstrates the system, can show stable point attractor, cycles limit
The correctness of the hiding oscillatory occurences analysis such as ring, limit cycle paracycle, chaos attractor, hyperchaos introduction and multi attractor, electricity
Realize a kind of hiding L ü systems hyperchaos signal source circuit based on memristor in road.
Comparing result can illustrate：The non-linear phenomena observed in experimental circuit has preferable one with simulation result
Cause property can analyze the correctness with numerical simulation with proof theory.Therefore, it is a kind of based on memristor constructed by the present invention
Theoretical foundation of the L ü system hyperchaos signal source circuit with science and realizability physically are hidden, it can be to chaotic secret
The related fields engineer applications such as communication play positive impetus.
Limiting the scope of the invention, those skilled in the art should understand that, in technical scheme of the present invention
On the basis of, the various modifications or variations that can be made by those skilled in the art with little creative work still in the present invention
Protection domain within.
Claims (4)
1. a kind of hiding L ü systems hyperchaos signal source circuit based on memristor, it is characterised in that：The circuit system includes
Three of memristor equivalent implementation circuit (1) and oscillatory system (2), memristor equivalent implementation circuit (1) and oscillatory system (2) are logical
Identical port is sequentially connected in road.
2. the hiding L ü systems hyperchaos signal source circuit according to claim 1 based on memristor, it is characterised in that：Institute
Memristor equivalent implementation circuit (1) is stated to be made of integrator and multiplier；
Memristor equivalent implementation circuit (1) input terminal-vyV is exported after integral operationw、vwWith-vy, by multiplying
With output-gW (v after add operationw)vy；Two of which memristor inner parameter α=4 and β=0.18.
3. the hiding L ü systems hyperchaos signal source circuit according to claim 1 based on memristor, it is characterised in that：Institute
Three channels for stating oscillatory system (2) are respectively first passage, second channel and third channel, and three channels are by multiplication
Device, integrator module and inverter modules cascade composition；
There are two input terminal v for the first passagexWith-vy, by exporting v after integratorx, wherein system control parameters a=36；
There are four input terminal-μ, v for the second channelx、v1With-vy, by exporting v after multiplier and integrator operationy, using
Level-one phase inverter final output-vy, wherein system control parameters b=20, d=5 and μ=0.1, v1=vxvz；
There are two input terminal v for the third channel2And vz, by exporting v after multiplier and integrator operationz, wherein system control
Parameter c=3, v2=-vxvy；
The operational amplifier U of the first passage1, second channel operational amplifier U2And U3And the operation of third channel is put
Big device U4In-phase input end ground connection.
4. the hiding L ü systems hyperchaos signal source circuit based on memristor according to claims 1 or 2 or 3, feature
It is：The circuit system Non-di-mensional equation is such as following formula (2)：
(2) formula has five system control parameters of a, b, c, d and μ and α and two memristor inner parameters of β.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711021406.8A CN108234106A (en) | 2017-10-27 | 2017-10-27 | A kind of hiding L ü systems hyperchaos signal source circuit based on memristor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711021406.8A CN108234106A (en) | 2017-10-27 | 2017-10-27 | A kind of hiding L ü systems hyperchaos signal source circuit based on memristor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN108234106A true CN108234106A (en) | 2018-06-29 |
Family
ID=62654700
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201711021406.8A Pending CN108234106A (en) | 2017-10-27 | 2017-10-27 | A kind of hiding L ü systems hyperchaos signal source circuit based on memristor |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN108234106A (en) |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109743154A (en) * | 2019-01-25 | 2019-05-10 | 杭州电子科技大学 | A kind of circuit model of memristor index chaos system |
| CN110896347A (en) * | 2019-12-13 | 2020-03-20 | 哈尔滨工程大学 | Multi-stability chaotic system with discrete bifurcation graph |
| CN110929215A (en) * | 2019-11-20 | 2020-03-27 | 常州大学 | Multi-stability reconstruction method of memristor system based on mixed state incremental integral transformation |
| CN111211885A (en) * | 2019-12-19 | 2020-05-29 | 哈尔滨工程大学 | Multi-stability chaotic system with impulse function form Lyapunov exponent |
| CN111294197A (en) * | 2020-03-20 | 2020-06-16 | 华东交通大学 | Double-vortex memory resistance hyperchaotic signal source circuit |
| CN111404660A (en) * | 2020-03-12 | 2020-07-10 | 华东交通大学 | Four-order memristor chaotic signal source circuit |
| CN111641492A (en) * | 2020-06-03 | 2020-09-08 | 华东交通大学 | Chaotic signal source circuit with hidden attractor |
| CN111859837A (en) * | 2019-04-24 | 2020-10-30 | 安顺学院 | Hidden attractor chaotic system and circuit based on voltage-controlled memristor |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105681020A (en) * | 2016-03-12 | 2016-06-15 | 常州大学 | Hyperchaotic hidden oscillation circuit based on balance-point-free memristor system |
| CN105827391A (en) * | 2016-03-31 | 2016-08-03 | 常州大学 | Hidden multi-attractor generation circuit based on balance-point-free memristor system |
| CN106656458A (en) * | 2016-10-18 | 2017-05-10 | 江苏理工学院 | Hyper-chaotic hidden attractor generating circuit and construction method thereof |
-
2017
- 2017-10-27 CN CN201711021406.8A patent/CN108234106A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105681020A (en) * | 2016-03-12 | 2016-06-15 | 常州大学 | Hyperchaotic hidden oscillation circuit based on balance-point-free memristor system |
| CN105827391A (en) * | 2016-03-31 | 2016-08-03 | 常州大学 | Hidden multi-attractor generation circuit based on balance-point-free memristor system |
| CN106656458A (en) * | 2016-10-18 | 2017-05-10 | 江苏理工学院 | Hyper-chaotic hidden attractor generating circuit and construction method thereof |
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109743154A (en) * | 2019-01-25 | 2019-05-10 | 杭州电子科技大学 | A kind of circuit model of memristor index chaos system |
| CN109743154B (en) * | 2019-01-25 | 2021-11-02 | 杭州电子科技大学 | Circuit model of memristive-index chaotic system |
| CN111859837A (en) * | 2019-04-24 | 2020-10-30 | 安顺学院 | Hidden attractor chaotic system and circuit based on voltage-controlled memristor |
| CN111859837B (en) * | 2019-04-24 | 2023-06-20 | 安顺学院 | Hidden attractor chaotic system and circuit based on voltage-controlled memristor |
| CN110929215A (en) * | 2019-11-20 | 2020-03-27 | 常州大学 | Multi-stability reconstruction method of memristor system based on mixed state incremental integral transformation |
| CN110896347A (en) * | 2019-12-13 | 2020-03-20 | 哈尔滨工程大学 | Multi-stability chaotic system with discrete bifurcation graph |
| CN110896347B (en) * | 2019-12-13 | 2024-02-09 | 哈尔滨工程大学 | Multi-stability chaotic system with discrete bifurcation diagram |
| CN111211885A (en) * | 2019-12-19 | 2020-05-29 | 哈尔滨工程大学 | Multi-stability chaotic system with impulse function form Lyapunov exponent |
| CN111404660A (en) * | 2020-03-12 | 2020-07-10 | 华东交通大学 | Four-order memristor chaotic signal source circuit |
| CN111294197A (en) * | 2020-03-20 | 2020-06-16 | 华东交通大学 | Double-vortex memory resistance hyperchaotic signal source circuit |
| CN111641492A (en) * | 2020-06-03 | 2020-09-08 | 华东交通大学 | Chaotic signal source circuit with hidden attractor |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN108234106A (en) | A kind of hiding L ü systems hyperchaos signal source circuit based on memristor | |
| CN106656458B (en) | Hyper-chaotic hidden attractor generating circuit and construction method thereof | |
| CN105827391A (en) | Hidden multi-attractor generation circuit based on balance-point-free memristor system | |
| CN105681020A (en) | Hyperchaotic hidden oscillation circuit based on balance-point-free memristor system | |
| CN105577355A (en) | Voltage controlled memristor chaotic circuit based on second-order active band-pass filter | |
| CN105846992A (en) | Three-order Wien bridge voltage-controlled memristor chaotic signal generator | |
| CN105530083A (en) | Voltage-controlled memristor chaotic circuit based on Wien bridge oscillator | |
| CN105450389A (en) | Four-order Wine bridge chaotic signal generator | |
| Singh et al. | New meminductor emulators using single operational amplifier and their application | |
| CN107124258A (en) | A kind of chaotic oscillating circuit based on excitation cycle memristor system | |
| CN110222451B (en) | Third-order absolute value local active memristor circuit model | |
| CN111859837A (en) | Hidden attractor chaotic system and circuit based on voltage-controlled memristor | |
| CN110830233B (en) | Fractional order multi-wing hidden attractor chaotic signal generation circuit | |
| CN110896347B (en) | Multi-stability chaotic system with discrete bifurcation diagram | |
| CN106877997A (en) | A kind of three-dimensional chaotic system that may result from sharp or hiding attractor | |
| CN108427843A (en) | It is a kind of that there is the three-dimensional memristor Hindmarsh-Rose precircuits hidden and asymmetric behavior coexists | |
| Aggarwal et al. | New memristor-less, resistor-less, two-OTA based grounded and floating meminductor emulators and their applications in chaotic oscillators | |
| CN109462467B (en) | Four-dimensional chaotic system containing hidden attractor and implementation circuit thereof | |
| CN111079365A (en) | Arc tangent trigonometric function memristor circuit model | |
| CN107017979A (en) | A kind of Generation of Chaotic Signals based on broad sense memristor simulator | |
| CN108768611A (en) | Fractional order memristor time-lag chaotic circuit | |
| CN105227293A (en) | A kind of noninductive chaos circuit only containing two amplifiers based on wien-bridge oscillator | |
| CN106921344A (en) | A kind of self-oscillation chaos system based on broad sense memristor | |
| CN109670221A (en) | A kind of cubic non-linearity magnetic control memristor circuit being made of fractional order capacitor | |
| CN110912675B (en) | Fractional order double-wing chaotic hidden attractor generating circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20180629 |
|
| RJ01 | Rejection of invention patent application after publication |