CN111641492A - Chaotic signal source circuit with hidden attractor - Google Patents
Chaotic signal source circuit with hidden attractor Download PDFInfo
- Publication number
- CN111641492A CN111641492A CN202010495047.5A CN202010495047A CN111641492A CN 111641492 A CN111641492 A CN 111641492A CN 202010495047 A CN202010495047 A CN 202010495047A CN 111641492 A CN111641492 A CN 111641492A
- Authority
- CN
- China
- Prior art keywords
- operational amplifier
- input terminal
- inverting input
- output
- signal source
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/001—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols using chaotic signals
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
Landscapes
- Engineering & Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Amplifiers (AREA)
Abstract
A chaotic signal source circuit with a hidden attractor is characterized in that an integral summation circuit, an inverting circuit and a multiplier are combined with each other to realize the output of chaotic signals. The whole signal source circuit comprises a first channel, a second channel, a third channel and a fourth channel. After the same ports of the four channels are all connected, the signal source circuit can output chaotic signals. The invention is easy for circuit simulation and experimental observation, has promotion effect on the development of hidden attractor research, can also be used for secret communication by the generated chaotic signal, and has certain theoretical significance and practical value.
Description
Technical Field
The invention relates to a chaotic signal source circuit with a hidden attractor, and belongs to the technical field of chaotic circuits.
Background
In chaotic systems, there are generally two categories of attractors, the self-excited attractor and the hidden attractor. The self-excited attractors are generated by unstable saddle focus balance points, and the positions of the self-excited attractors can be directly determined through a set of standard calculation procedures. This method is not suitable for calculating the position of the hidden attractor, which can only be determined by calculating the attraction field of the hidden attractor. The suction basin of the hidden attractor is not intersected with the neighborhood of any balance point. For a long time, the attractor of the chaotic system is considered to have close relation with the balance point, and the qualitative criterion of the chaotic judgment is also mainly carried out by Shilnikov's theorem, namely, the generation of the chaos needs at least one unstable balance point, and the unstable balance point also corresponds to one attractor in the chaotic system. However, since the learners Leonov and Kuznetsov discovered a hidden attractor based on the Chua system, the chaotic system with a hidden attractor has received great attention from researchers. Although the balance points of the hidden attractor chaotic system do not help to determine the position of the hidden attractor, the hidden attractor chaotic system can be divided into three types, namely a hidden attractor chaotic system with only one stable balance point, a hidden attractor chaotic system without balance points and a hidden attractor chaotic system with infinite balance points according to the number and the types of the balance points.
Disclosure of Invention
The invention aims to provide a chaotic signal source circuit with a hidden attractor, in order to realize a chaotic signal generating circuit with a non-balance point hidden attractor.
The technical scheme of the invention is that the chaotic signal source circuit with the hidden attractor comprises a first channel, a second channel, a third channel and a fourth channel; the four channels comprise an integral summation circuit, an inverting circuit or a multiplier; after the same ports in the four channels are connected in sequence, the realized signal source circuit can output chaotic signals; the signal source circuit has no balance point and is provided with a hidden attractor.
In the first channel, input terminal "vx' series resistance R1Rear-access operational amplifier U1The inverting input terminal of (1); input terminal "-vy' series resistance R2Rear-access operational amplifier U1The inverting input terminal of (1); input terminal "-vw' series resistance R3Rear-access operational amplifier U1The inverting input terminal of (1); operational amplifier U1Across a capacitor C between the inverting input and the output1(ii) a Operational amplifier U at this time1Output terminal of (v)x"; operational amplifier U1Non-inverting inputThe termination is "ground".
In the second channel, input end "-vy' series resistance R4Rear-access operational amplifier U2The inverting input terminal of (1); input terminal "vx"and" vz"Access multiplier A1An input terminal of (1); multiplier A1Output end of (3) is connected with a resistor R in series5Rear-access operational amplifier U2The inverting input terminal of (1); the positive pole of a DC power supply with the size of 10V is connected with the ground, and the negative pole is connected with a resistor R in series6Rear-access operational amplifier U2The inverting input terminal of (1); operational amplifier U2Across a capacitor C between the inverting input and the output2(ii) a Operational amplifier U at this time2Output terminal of (v)y"; operational amplifier U2The output end of the operational amplifier is connected with a 10k omega resistor in series to be connected into an operational amplifier Uf1The inverting input terminal of (1); operational amplifier Uf1A resistor of 10k omega is connected between the inverting input end and the output end in a bridging way; operational amplifier U at this timef1Output of "-vy"; operational amplifier U2And operational amplifier Uf1The non-inverting input is terminated with "ground".
In the third channel, the input terminal "vz' series resistance R7Rear-access operational amplifier U3The inverting input terminal of (1); input terminal "-vy"and" vx"Access multiplier A2An input terminal of (1); multiplier A2Output end of (3) is connected with a resistor R in series8Rear-access operational amplifier U3The inverting input terminal of (1); operational amplifier U3Across a capacitor C between the inverting input and the output3(ii) a Operational amplifier U at this time3Output terminal of (v)z"; operational amplifier U3The non-inverting input is terminated with "ground".
In the fourth channel, input end "-vy' series resistance R9Rear-access operational amplifier U4The inverting input terminal of (1); operational amplifier U4Across a capacitor C between the inverting input and the output4(ii) a Operational amplifier U at this time4Output terminal of (v)w"; fortuneComputing amplifier U4The output end of the operational amplifier is connected with an operational amplifier U after being connected with a 10k omega resistor in seriesf2The inverting input terminal of (1); operational amplifier Uf2Is connected across a 10k omega resistor between the inverting input terminal and the output terminal, and the operational amplifier U is connected with the output terminalf2Output of "-vw”。
The signal source circuit system has the advantages of simple structure and convenience for theoretical analysis and circuit simulation. The signal source circuit can generate the hidden chaotic attractor without balance points, and has certain theoretical significance for the research of the hidden attractor. The chaotic signal generated by the signal source circuit can also be used for secret communication, and has a great engineering application value.
Drawings
FIG. 1 is a circuit of a chaotic signal source with a hidden attractor; comprises a first channel, a second channel, a third channel and a fourth channel; FIG. 2 is a phase-track diagram of a chaotic attractor on 6 phase planes obtained by numerical simulation of a chaotic signal source circuit with a hidden attractor under initial conditions (1,1,1, 1);
FIG. 2(a) is in the x-y plane; FIG. 2(b) is in the x-z plane; FIG. 2(c) is in the x-w plane; FIG. 2(d) is in the y-z plane; FIG. 2(e) is in the y-w plane; FIG. 2(f) is in the z-w plane;
FIG. 3 is a phase trajectory diagram of a chaotic attractor on 6 phase planes obtained by experimental measurement of a chaotic signal source circuit with a hidden attractor;
FIG. 3(a) at vx-vyOn a plane; FIG. 3(b) at vx-vzOn a plane; FIG. 3(c) at vx-vwOn a plane; FIG. 3(d) at vy-vzOn a plane; FIG. 3(e) at vy-vwOn a plane; FIG. 3(f) at vz-vwOn a plane;
FIG. 4 is a graph of output time domain obtained by experimental measurement of a chaotic signal source circuit with a hidden attractor; FIG. 4(a) is t-x; FIG. 4(b) is t-y; FIG. 4(c) is t-z; FIG. 4(d) is t-w.
Detailed Description
The invention relates to a chaotic signal source circuit with a hidden attractor, which has the following specific implementation modes:
the mathematical model of the signal source circuit of the embodiment is as follows:
and x, y, z and w are system state variables.
In order to ensure that the output signal does not exceed the upper and lower output limits of the operational amplifier, the variable ratio transformation is carried out:
x＝10vx/V,y＝10vy/V,z＝10vz/V,w＝10vw/V (2)
the transformed mathematical model is:
wherein v isx,vy,vz,vwRespectively represent the voltage state variables of the capacitors in the integrating and summing circuit in fig. 1, and correspond to the system state variables x, y, z and w one to one.
Let t be τ t0For the formula (3), time scale transformation is performed, and the transformed mathematical model is a circuit oscillation equation corresponding to the signal source circuit in this embodiment:
according to the circuit shown in FIG. 1, in the first channel, the input terminal "vx' series resistance R1Rear-access operational amplifier U1Is inverted input, input "-vy' series resistance R2Rear-access operational amplifier U1Is inverted input, input "-vw' series resistance R3Rear-access operational amplifier U1Of the inverting input terminal of the operational amplifier U1Across a capacitor C between the inverting input and the output1At this time, the operational amplifier U1Output terminal of (v)x". Operational amplifier U1The non-inverting input terminal is connected with the ground”。
In the second channel, input end "-vy' series resistance R4Rear-access operational amplifier U2Of the inverting input terminal, input terminal "vx"and" vz"Access multiplier A1Input terminal of, multiplier A1Output end of (3) is connected with a resistor R in series5Rear-access operational amplifier U2The positive pole of the DC power supply with the size of 10V is connected with the ground, and the negative pole is connected with a resistor R in series6Rear-access operational amplifier U2Of the inverting input terminal of the operational amplifier U2Across a capacitor C between the inverting input and the output2At this time, the operational amplifier U2Output terminal of (v)y". Operational amplifier U2The output end of the operational amplifier is connected with a 10k omega resistor in series to be connected into an operational amplifier Uf1Of the inverting input terminal of the operational amplifier Uf1Is connected across a 10k omega resistor between the inverting input and the output, and the operational amplifier U is connected to the outputf1Output of "-vy". Operational amplifier U2And operational amplifier Uf1The non-inverting input is terminated with "ground".
In the third channel, the input terminal "vz' series resistance R7Rear-access operational amplifier U3Is inverted input, input "-vy"and" vx"Access multiplier A2Input terminal of, multiplier A2Output end of (3) is connected with a resistor R in series8Rear-access operational amplifier U3Of the inverting input terminal of the operational amplifier U3Across a capacitor C between the inverting input and the output3At this time, the operational amplifier U3Output terminal of (v)z". Operational amplifier U3The non-inverting input is terminated with "ground".
In the fourth channel, input terminal "-vy' series resistance R9Rear-access operational amplifier U4Of the inverting input terminal of the operational amplifier U4Across a capacitor C between the inverting input and the output4. Operational amplifier U at this time4Output terminal of (v)w". Operational amplifier U4Output of (2)The end is connected with a 10k omega resistor in series and then is connected with an operational amplifier Uf2Of the inverting input terminal of the operational amplifier Uf2Is connected across a 10k omega resistor between the inverting input terminal and the output terminal, and the operational amplifier U is connected with the output terminalf2Output of "-vw”。
The circuit expression synthesis column for each channel is written as:
comparing formula (4) with formula (5), and letting τ be 1000, R be 100k Ω, there is: c1＝C2＝C3＝C4＝10nF，R1＝R2＝2.857kΩ，R3＝R6＝100kΩ，R4＝3.57kΩ，
R5＝R8＝10kΩ，R7＝33.33kΩ，R9＝6.25kΩ。
Under the circuit parameters, the circuit shown in fig. 1 is set up in Multisim simulation software, 3554BM is selected as an operational amplifier, the working voltage is +/-10V, the same ports of the experimental circuit are connected with each other, the chaotic attractor shown in fig. 3 can be acquired on an oscilloscope, and the experimental result is consistent with the numerical simulation result shown in fig. 2.
Claims (6)
1. The chaotic signal source circuit with the hidden attractor is characterized in that the signal source circuit comprises a first channel, a second channel, a third channel and a fourth channel; the four channels comprise an integral summation circuit or an inverting circuit; after the same ports in the four channels are connected in sequence, the realized signal source circuit can output chaotic signals; the signal source circuit has no balance point and is provided with a hidden attractor.
2. The chaotic signal source circuit with a hidden attractor of claim 1, wherein in the first channel, the input terminal v isx' series resistance R1Rear-access operational amplifier U1The inverting input terminal of (1); input terminal "-vy' series resistance R2Rear-access operational amplifier U1The inverting input terminal of (1); input terminal "-vw' series resistance R3Rear-access operational amplifier U1The inverting input terminal of (1); operational amplifier U1Across a capacitor C between the inverting input and the output1(ii) a Operational amplifier U at this time1Output terminal of (v)x"; operational amplifier U1The non-inverting input is terminated with "ground".
3. The chaotic signal source circuit with a hidden attractor of claim 1, wherein in the second channel, the input terminal "-vy' series resistance R4Rear-access operational amplifier U2The inverting input terminal of (1); input terminal "vx"and" vz"Access multiplier A1An input terminal of (1); multiplier A1Output end of (3) is connected with a resistor R in series5Rear-access operational amplifier U2The inverting input terminal of (1); the positive pole of a DC power supply with the size of 10V is connected with the ground, and the negative pole is connected with a resistor R in series6Rear-access operational amplifier U2The inverting input terminal of (1); operational amplifier U2Across a capacitor C between the inverting input and the output2(ii) a Operational amplifier U at this time2Output terminal of (v)y"; operational amplifier U2The output end of the operational amplifier is connected with a 10k omega resistor in series to be connected into an operational amplifier Uf1The inverting input terminal of (1); operational amplifier Uf1A resistor of 10k omega is connected between the inverting input end and the output end in a bridging way; operational amplifier U at this timef1Output of "-vy"; operational amplifier U2And operational amplifier Uf1The non-inverting input is terminated with "ground".
4. The chaotic signal source circuit with a hidden attractor of claim 1, wherein in the third channel, the input terminal "v" isz' series resistance R7Rear-access operational amplifier U3The inverting input terminal of (1); input terminal "-vy"and" vx' AccessMultiplier A2An input terminal of (1); multiplier A2Output end of (3) is connected with a resistor R in series8Rear-access operational amplifier U3The inverting input terminal of (1); operational amplifier U3Across a capacitor C between the inverting input and the output3(ii) a Operational amplifier U at this time3Output terminal of (v)z"; operational amplifier U3The non-inverting input is terminated with "ground".
5. The chaotic signal source circuit with a hidden attractor of claim 1, wherein in the fourth channel, the input terminal "-vy' series resistance R9Rear-access operational amplifier U4The inverting input terminal of (1); operational amplifier U4Across a capacitor C between the inverting input and the output4(ii) a Operational amplifier U at this time4Output terminal of (v)w"; operational amplifier U4The output end of the operational amplifier is connected with an operational amplifier U after being connected with a 10k omega resistor in seriesf2The inverting input terminal of (1); operational amplifier Uf2Is connected across a 10k omega resistor between the inverting input terminal and the output terminal, and the operational amplifier U is connected with the output terminalf2Output of "-vw”。
6. The chaotic signal source circuit with a hidden attractor of claim 1, wherein the mathematical model of the signal source circuit is:
wherein x, y, z and w are system state variables;
in order to ensure that the output signal does not exceed the upper and lower output limits of the operational amplifier, the variable ratio transformation is carried out:
x＝10vx/V,y＝10vy/V,z＝10vz/V,w＝10vw/V；
the transformed mathematical model is:
the circuit oscillation equation corresponding to the signal source circuit is as follows:
wherein v isx,vy,vz,vwRespectively measuring the voltage state variable of a capacitor in an integral summation circuit in a signal source circuit;
the state variables x, y, z and w of the mathematical model corresponding to the signal source circuit are equal to the circuit state variables v in the circuit oscillation equation corresponding to the signal source circuitx,vy,vz,vwAnd correspond to each other.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010495047.5A CN111641492B (en) | 2020-06-03 | 2020-06-03 | Chaotic signal source circuit with hidden attractor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010495047.5A CN111641492B (en) | 2020-06-03 | 2020-06-03 | Chaotic signal source circuit with hidden attractor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN111641492A true CN111641492A (en) | 2020-09-08 |
| CN111641492B CN111641492B (en) | 2022-07-29 |
Family
ID=72332130
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202010495047.5A Active CN111641492B (en) | 2020-06-03 | 2020-06-03 | Chaotic signal source circuit with hidden attractor |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN111641492B (en) |
Citations (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20140064410A1 (en) * | 2011-12-07 | 2014-03-06 | Ashitosh Swarup | Chaotic communication systems and methods |
| CN105681020A (en) * | 2016-03-12 | 2016-06-15 | 常州大学 | Hyperchaotic hidden oscillation circuit based on balance-point-free memristor system |
| CN106656458A (en) * | 2016-10-18 | 2017-05-10 | 江苏理工学院 | Hyperchaotic hidden attractor generation circuit and construction method thereof |
| CN106850184A (en) * | 2017-03-31 | 2017-06-13 | 西京学院 | It is a kind of to contain four five dimension ultra-chaos circuits of quadratic term |
| CN107147485A (en) * | 2017-06-22 | 2017-09-08 | 郑州轻工业学院 | One specific admixture memristor 6 DOF chaos system and circuit |
| CN206775512U (en) * | 2017-06-08 | 2017-12-19 | 南京师范大学 | A kind of four wing chaos circuits of four-dimension |
| CN206977441U (en) * | 2017-05-27 | 2018-02-06 | 西京学院 | A kind of four-dimension seven plus three type T chaos circuits with permanent LE spectrums |
| CN108234106A (en) * | 2017-10-27 | 2018-06-29 | 江苏理工学院 | A kind of hiding L ü systems hyperchaos signal source circuit based on memristor |
| CN108418674A (en) * | 2018-04-19 | 2018-08-17 | 沈阳建筑大学 | A kind of five dimension chaos circuits containing series connection memristor |
| CN109302279A (en) * | 2018-12-11 | 2019-02-01 | 湘潭大学 | A kind of the memristor chaotic model and circuit of four-winged chaotic attractor rotation |
| CN110198212A (en) * | 2019-03-08 | 2019-09-03 | 天津大学 | A kind of changeable equalization point chaos signal source of width-adjustable |
| CN110830233A (en) * | 2019-12-01 | 2020-02-21 | 湖南科技大学 | Fractional order multi-wing hidden attractor chaotic signal generation circuit |
-
2020
- 2020-06-03 CN CN202010495047.5A patent/CN111641492B/en active Active
Patent Citations (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20140064410A1 (en) * | 2011-12-07 | 2014-03-06 | Ashitosh Swarup | Chaotic communication systems and methods |
| CN105681020A (en) * | 2016-03-12 | 2016-06-15 | 常州大学 | Hyperchaotic hidden oscillation circuit based on balance-point-free memristor system |
| CN106656458A (en) * | 2016-10-18 | 2017-05-10 | 江苏理工学院 | Hyperchaotic hidden attractor generation circuit and construction method thereof |
| CN106850184A (en) * | 2017-03-31 | 2017-06-13 | 西京学院 | It is a kind of to contain four five dimension ultra-chaos circuits of quadratic term |
| CN206977441U (en) * | 2017-05-27 | 2018-02-06 | 西京学院 | A kind of four-dimension seven plus three type T chaos circuits with permanent LE spectrums |
| CN206775512U (en) * | 2017-06-08 | 2017-12-19 | 南京师范大学 | A kind of four wing chaos circuits of four-dimension |
| CN107147485A (en) * | 2017-06-22 | 2017-09-08 | 郑州轻工业学院 | One specific admixture memristor 6 DOF chaos system and circuit |
| CN108234106A (en) * | 2017-10-27 | 2018-06-29 | 江苏理工学院 | A kind of hiding L ü systems hyperchaos signal source circuit based on memristor |
| CN108418674A (en) * | 2018-04-19 | 2018-08-17 | 沈阳建筑大学 | A kind of five dimension chaos circuits containing series connection memristor |
| CN109302279A (en) * | 2018-12-11 | 2019-02-01 | 湘潭大学 | A kind of the memristor chaotic model and circuit of four-winged chaotic attractor rotation |
| CN110198212A (en) * | 2019-03-08 | 2019-09-03 | 天津大学 | A kind of changeable equalization point chaos signal source of width-adjustable |
| CN110830233A (en) * | 2019-12-01 | 2020-02-21 | 湖南科技大学 | Fractional order multi-wing hidden attractor chaotic signal generation circuit |
Non-Patent Citations (2)
| Title |
|---|
| QIANG LAI ECT.: "An Extremely Simple ChaoticInfinitely Many Coexisting Attractors System With", 《IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: EXPRESS BRIEFS》 * |
| 包涵，包伯成，林毅，王将，武花干: "忆阻自激振荡系统的隐藏吸引子及其动力学特性", 《物理学报》 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN111641492B (en) | 2022-07-29 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN105681020A (en) | Hyperchaotic hidden oscillation circuit based on balance-point-free memristor system | |
| CN204425298U (en) | A kind of faint AC signal amplitude lock-in amplifier | |
| CN102903282A (en) | Integer-order and fractional-order multifunctional chaotic experiment instrument | |
| CN111641492B (en) | Chaotic signal source circuit with hidden attractor | |
| CN107124258A (en) | A kind of chaotic oscillating circuit based on excitation cycle memristor system | |
| CN113328738B (en) | General hyperbolic function memristor circuit model | |
| CN206460695U (en) | A kind of analog waveform generator experiment device for teaching | |
| Du et al. | Design and implement of a low cost control system of active magnetic bearings using LabVIEW Interface for Arduino | |
| CN111404660B (en) | Four-order memristor chaotic signal source circuit | |
| CN102946309A (en) | Hyperchaotic circuit | |
| CN104655111B (en) | Method and device for simulating laser detector | |
| CN203455977U (en) | Integer order fractional order multifunctional chaotic experimental instrument | |
| CN108337081A (en) | One kind containing constant term three-dimensional chaos circuit three times | |
| CN109033602B (en) | Quartic three-dimensional memristor circuit system and implementation circuit | |
| CN110611560B (en) | Three-dimensional non-autonomous chaotic model and circuit | |
| CN209046655U (en) | A kind of simple three-dimensional chaotic circuit containing constant term | |
| CN109474416B (en) | Hyperchaotic signal generating circuit with hidden attractor | |
| CN110912675B (en) | Fractional order double-wing chaotic hidden attractor generating circuit | |
| CN107086858A (en) | Using the signal generator of oscillator controls ripple fractal transform | |
| CN114611419A (en) | Flow calculation method, system, medium and terminal for water flow transportation channel | |
| CN112181039A (en) | Direct current standard power source with ripple superposition based on DMA and programmable time base | |
| CN106921344A (en) | A kind of self-oscillation chaos system based on broad sense memristor | |
| CN203104385U (en) | Multi-harmonic signal generating device applicable to power system | |
| Limin | Function signal generator | |
| CN111294197A (en) | Double-vortex memory resistance hyperchaotic signal source circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |