CN109302279A - A kind of the memristor chaotic model and circuit of four-winged chaotic attractor rotation - Google Patents
A kind of the memristor chaotic model and circuit of four-winged chaotic attractor rotation Download PDFInfo
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- CN109302279A CN109302279A CN201811512421.7A CN201811512421A CN109302279A CN 109302279 A CN109302279 A CN 109302279A CN 201811512421 A CN201811512421 A CN 201811512421A CN 109302279 A CN109302279 A CN 109302279A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/001—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols using chaotic signals
Abstract
The invention discloses the memristor chaotic models and circuit of a kind of rotation of four-winged chaotic attractor, construct four circuit pathways by resistance, capacitor, operational amplifier, multiplier.Input signal of the output signal in first, second, third channel as first channel；First, second, third channel, memristor input signal of the output signal as Article 2 channel；Input signal of the output signal in second, third channel as Article 3 channel；Input signal of the output signal in first channel as Article 4 channel；Input signal of the output signal in Article 4 channel as memristor.Due to the nonlinear characteristic and memory characteristic of memristor, and chaos system corresponding to four accesses constructed has numerous equalization point, so that system dynamics behavior is extremely abundant.It generates rotating suction of the states such as single-blade period, chaos, provides a set of more specifically code key for secret communication, so that chaotic secret is more difficult to crack, improves the safety of chaotic secret communication.
Description
Technical field
The invention belongs to chaos system technical fields, are related to a kind of Chaotic Systems of memristor, and in particular to a kind of
The chaos circuit model based on quadratic nonlinearity magnetic control memristor with physical realizability and abundant dynamic behavior.
Background technique
Chaology is that the front line science just rising to come recently in decades is theoretical, it is with quantum mechanics, the theory of relativity and claims
For three big important scientific discoveries of twentieth century.Chaos is one kind advanced dynamic row possessed by Kind of Nonlinear Dynamical System
For it is the intrinsic stochasticity of deterministic nonlinear systems, that is to say, that chaos is that occur in deterministic system similar to random
The phenomenon that, it has following main feature: to the extreme sensitivity of primary condition, boundedness, ergodic, interior randomness, dividing
Dimension property, aperiodic permanent step response.
Memristor is the 4th kind of basic double end converter element after resistance, capacitor and inductance.It has other three kinds
The all irreplaceable nonlinear characteristic of primary element any combination and memory characteristic can easily generate chaotic oscillation letter
Number.Therefore the idea for memristor being applied to chaos circuit and being studied, in recent years by the concern in non-linear field, memristor
The appearance of device provides new thinking and direction for the design and application of electronic circuit.Since memristor chaos circuit includes to have
The equalization point of mathematical model corresponding to special memory characteristic and nonlinear memristor and memristor chaos circuit is usually nothing
Several equalization points enable memristor chaos circuit to generate complicated dynamic behavior, such as limit multistability, complicated transient state
The complicated phenomenons such as transfer.For at present, the analog equivalent model in relation to secondary memristor is less, and memristor is applied to chaos
Can be generated in circuit coexist attractor rotation and continue chaos phenomenon memristor chaotic model be suggested not yet, this is
In place of the deficiencies in the prior art.Therefore, it is very valuable for designing the memristor chaos circuit of concise easily realization and attractor rotation
Value.
Summary of the invention
In view of the problems of the existing technology, the invention proposes the memristor chaotic models and its electricity of a kind of rotation of attractor
Road.
1. a kind of construction method of the memristor chaotic model of four-winged chaotic attractor rotation, which comprises the following steps:
(1) mathematical model of Liu&Chen chaos system:
Wherein x, y, z, u are state variable, and a, b, c is system parameter；
(2) the quadratic nonlinearity magnetic control memristor that the present invention uses:
Q (Φ)=α Φ+β Φ2 (ii)
Wherein q (Φ) indicates magnetic control memristor, and Φ indicates that magnetic flux, α, β are the memristor control parameter greater than zero；
(3) derivation is carried out to (ii) formula, then corresponding magnetic control recalls guided mode type are as follows:
Wherein W (Φ) expression magnetic control, which is recalled, leads, and Φ indicates that magnetic flux, α, β are the memristor control parameter greater than zero；
(4) magnetic control memristor is introduced into Liu&Chen system, four wing memristors for obtaining a kind of attractor rotation are mixed
Ignorant system:
Wherein x, y, z, u are state variable, and a=4, b=13, c=1, d=0.001 are system control parameters, α=0.3, β
=0.4 is memristor control parameter；
2. constructing a kind of memristor chaos circuit of attractor rotation based on system (iv), which is characterized in that including first
Channel circuit, second channel circuit, third channel circuit, fourth lane circuit, memristor simulating equivalent circuit:
First channel module is by multiplier A1, inverting integrator U1, phase inverter U2And resistance R1, resistance R2, resistance
R9, resistance R10, capacitor C1Composition.The output signal x connection phase inverter U of first access2It is logical as first to become-x signal
The input signal on road, the output signal-x is as multiplier A in Article 2 access2, multiplier A3Input signal all the way effect
In Article 2 access, the output signal-x is as multiplier A in Article 3 channel module4Input signal all the way act on
Three accesses, the resistance R in the output signal-x connection Article 4 access8As the input signal of Article 4 access.
Simulating equivalent circuit, multiplier A of the Article 2 access by memristor2, multiplier A3, inverting integrator U3、
Phase inverter U4And resistance R3, resistance R4, resistance R5, resistance R11, resistance R12, capacitor C2Composition.The output of the Article 2 access
Multiplier A in signal y first access of connection1Input signal all the way act on first access, output signal y connection
Resistance R in two accesses3As the input signal of Article 2 access, while in output signal y connection Article 3 access
Multiplier A4An input signal act on Article 3 access.
The Article 3 access is by multiplier A4, inverting integrator U5And resistance R6, resistance R7, capacitor C3Composition.Institute
State multiplier A in output signal z first access of connection of Article 3 access1Input signal all the way act on first it is logical
Road, multiplier A in output signal z connection Article 2 access2Input signal all the way act on Article 2 access, while this is defeated
Signal z passes through resistance R in connection Article 3 access out6As the input signal of Article 3 access.
The Article 4 access is by inverting integrator U6, resistance R8, capacitor C4Composition.The Article 4 access it is defeated
Resistance R in signal u connection memristor simulating equivalent circuit out14As the input signal of memristor.
The memristor simulating equivalent circuit is by reverse phase adder U7, phase inverter U8And resistance R13, resistance R14, resistance
R15, resistance R16, resistance R17Composition.In output signal W (u) the connection Article 2 access of the memristor simulating equivalent circuit
Multiplier A3An input signal act on Article 2 access.
A kind of memristor chaotic model circuit of attractor rotation described in 3., it is characterised in that: the inverting integrator
U1, phase inverter U2, inverting integrator U3, phase inverter U4, inverting integrator U5, inverting integrator U6Using operational amplifier UA741,
Multiplier A1, multiplier A2, multiplier A3, multiplier A4Using multiplier AD633JN.
The operational amplifier U1The 2nd pin pass through resistance R1 connection operational amplifier U2The 6th pin, pass through resistance
R2Connect multiplier A1The 7th pin, pass through capacitor C1Connect operational amplifier U1The 6th pin；6th pin passes through resistance R9Even
Meet operational amplifier U2The 2nd pin, pass through capacitor C1Connect operational amplifier U1The 2nd pin；3rd pin ground connection, the 4th draws
Foot connects negative voltage source VEE, and the 7th pin connects positive voltage source VCC；1st pin, the 5th pin, the 8th pin floating.
The operational amplifier U2The 2nd pin pass through resistance R9Connect operational amplifier U1The 6th pin, pass through resistance
R10Connect operational amplifier U2The 6th pin；6th pin passes through resistance R10Connect operational amplifier U2The 2nd pin, pass through electricity
Hinder R1Connect operational amplifier U1The 2nd pin, be directly connected to multiplier A2The 1st pin, be directly connected to multiplier A3The 1st
Pin is directly connected to multiplier A1The 1st pin, pass through resistance R8Connect operational amplifier U6The 2nd pin；3rd pin connects
Ground, the 4th pin connect negative voltage source VEE, and the 7th pin connects positive voltage source VCC；1st pin, the 5th pin, the 8th pin floating.
The operational amplifier U3The 2nd pin pass through resistance R3Connect operational amplifier U4The 6th pin, pass through resistance
R4Connect multiplier A2The 7th pin, pass through resistance R5Connect multiplier A3The 7th pin, pass through capacitor C2Connect operation amplifier
The 6th pin of device；6th pin passes through capacitor C2Connect operational amplifier U1The 2nd pin, pass through resistance R11Connect operational amplifier
U4The 2nd pin, be directly connected to multiplier A1The 1st pin, pass through resistance R3Connect operational amplifier U3The 2nd pin, directly
Connect multiplier A4The 2nd pin；3rd pin ground connection, the 4th pin connect negative voltage source VEE, and the 7th pin connects positive voltage source
VCC；1st pin, the 5th pin, the 8th pin floating.
The operational amplifier U4The 2nd pin pass through resistance connect operational amplifier U3The 6th pin, pass through resistance R12
Connect operational amplifier U4The 6th pin；3rd pin ground connection, the 4th pin connect negative voltage source VEE, and the 7th pin connects positive electricity
Potential source VCC；1st pin, the 5th pin, the 8th pin floating.
The operational amplifier U5The 2nd pin pass through resistance R6Connect operational amplifier U5The 6th pin, pass through resistance
R7Connect multiplier A4The 7th pin, pass through capacitor C3Connect operational amplifier U5The 6th pin；6th pin passes through resistance R6Even
Meet operational amplifier U5The 2nd pin, be directly connected to multiplier A1The 3rd pin, be directly connected to multiplier A2The 3rd pin；The
3 pins ground connection, the 4th pin connect negative voltage source VEE, and the 7th pin connects positive voltage source VCC；1st pin, the 5th pin, the 8th are drawn
Foot is hanging.
The operational amplifier U6The 2nd pin pass through resistance R8Connect operational amplifier U2The 6th pin, pass through capacitor
C4Connect operational amplifier U6The 6th pin；6th pin passes through capacitor C4Connect operational amplifier U6The 2nd pin, pass through electricity
Hinder R14Connect U7The 2nd pin；3rd pin ground connection, the 4th pin connect negative voltage source VEE, and the 7th pin connects positive voltage source
VCC；1st pin, the 5th pin, the 8th pin floating.
The operational amplifier U7The 2nd pin pass through resistance R14Connect operational amplifier U6The 2nd pin, pass through resistance
R13Connect DC power supply V1Anode, pass through resistance R15Connect operational amplifier U7The 6th pin；6th pin passes through resistance R15
Connect operational amplifier U7The 2nd pin, pass through resistance R16Connect operational amplifier U8The 2nd pin；3rd pin ground connection, the 4th
Pin connects negative voltage source VEE, and the 7th pin connects positive voltage source VCC；1st pin, the 5th pin, the 8th pin floating.
The operational amplifier U8The 2nd pin pass through resistance R16Connect operational amplifier U7The 6th pin, pass through resistance
R17Connect operational amplifier U8The 6th pin；6th pin is directly connected to multiplier A3The 3rd pin；3rd pin ground connection, the 4th
Pin connects negative voltage source VEE, and the 7th pin connects positive voltage source VCC；1st pin, the 5th pin, the 8th pin floating.
The multiplier A1The 1st pin be directly connected to operational amplifier U3The 6th pin；3rd pin is directly connected to operation
Amplifier U5The 6th pin；7th pin passes through resistance R2Connect operational amplifier U1The 2nd pin；2nd pin, the 4th pin,
6th pin ground connection, the 5th pin connect negative voltage source VEE, and the 8th pin connects positive voltage source VCC.
The multiplier A2The 1st pin be directly connected to operational amplifier U2The 6th pin；3rd pin is directly connected to operation
Amplifier U5The 6th pin；7th pin passes through resistance R4Connect operational amplifier U3The 2nd pin；2nd pin, the 4th pin,
6th pin ground connection, the 5th pin connect negative voltage source VEE, and the 8th pin connects positive voltage source VCC.
The multiplier A3The 1st pin be directly connected to operational amplifier U2The 6th pin；3rd pin is directly connected to operation
Amplifier U8The 6th pin；7th pin passes through resistance R5Connect operational amplifier U3The 2nd pin；2nd pin, the 4th pin,
6th pin ground connection, the 5th pin connect negative voltage source VEE, and the 8th pin connects positive voltage source VCC.
The multiplier A4The 1st pin be directly connected to operational amplifier U2The 6th pin；3rd pin is directly connected to operation
Amplifier U3The 6th pin；7th pin passes through resistance R7Connect operational amplifier U5The 2nd pin；2nd pin, the 4th pin,
6th pin ground connection, the 5th pin connect negative voltage source VEE, and the 8th pin connects positive voltage source VCC.
4. a kind of memristor chaotic model circuit of attractor rotation according to claim 3, it is characterised in that: described
First passage in resistance R1=25k, resistance R2=1k, resistance R9=10k, resistance R10=10k, capacitor C1=0.01uF；Second
Resistance R in channel3=7.69k, resistance R4=1k, resistance R5=10k, resistance R11=10k, resistance R12=10k, capacitor C2=
0.01uF；Resistance R in third channel6=100k, resistance R7=1k, capacitor C3=0.01uF；Resistance R in fourth lane8=
1000k, capacitor C4=10uF；Resistance R in memristor simulating equivalent circuit13=10k, resistance R14=0.375k, resistance R15=
3k, resistance R16=10k, resistance R17=10k, DC voltage source V1Value be 1V, the value of positive voltage source VCC be+15V, negative voltage
The value of source VEE is -15V.
The utility model has the advantages that the present invention has built four circuit paths using element.The nonlinear characteristic having due to memristor
And memory characteristic, along with the invention circuit correspondence system mathematical model has numerous equalization point, so that corresponding chaos system
Dynamic behavior it is more complicated, abundant.It can produce the attractor that coexists of countless complexity, single-blade monocycle, single-blade double weeks
Rotating suction of the states such as phase, single-blade chaos and double-vane provides a set of more novel, special code key for secret communication, makes
It obtains chaotic secret to be more difficult to crack, improves the safety of secret communication, be that application of the chaos system in secret communication mentions
Technical Reference is supplied.
Detailed description of the invention
Fig. 1 is four wing memristor chaos circuit connection schematic diagrams of attractor provided in an embodiment of the present invention rotation.
Fig. 2 is the first access output signal x and alternate path output signal y in circuit simulation provided in an embodiment of the present invention
The rotation of 4 single-blade monocycles the phase diagram of attractor coexists.
Fig. 3 is the first access output signal x and alternate path output signal y in circuit simulation provided in an embodiment of the present invention
The rotation of 4 single-blade binary cycles the phase diagram of attractor coexists.
Fig. 4 is the first access output signal x and alternate path output signal y in circuit simulation provided in an embodiment of the present invention
The rotation of 4 single-blade chaos the phase diagram of attractor coexists.
Fig. 5 is alternate path output signal y and third path output signal z in circuit simulation provided in an embodiment of the present invention
Lasting chaos phase diagram.
Fig. 6 is alternate path output signal y and third path output signal z in circuit simulation provided in an embodiment of the present invention
Lasting chaos phase diagram.
Fig. 7 is the first access output signal x and alternate path output signal y in circuit in kind provided in an embodiment of the present invention
1 single-blade monocycle attractor phase diagram.
Fig. 8 is the first access output signal x and alternate path output signal y in circuit in kind provided in an embodiment of the present invention
1 single-blade binary cycle attractor phase diagram.
Fig. 9 is the first access output signal x and alternate path output signal y in circuit in kind provided in an embodiment of the present invention
1 single-blade chaos attractor phase diagram.
Specific embodiment
In order to which the purpose of the present invention and technical solution is more clearly understood, below in conjunction with drawings and examples, to this hair
Bright application principle is explained in detail.
1. a kind of construction method of the memristor chaotic model of four-winged chaotic attractor rotation, which comprises the following steps:
(1) mathematical model based on Liu&Chen chaos system:
Wherein x, y, z, u are state variable, and a, b, c is system parameter；
(2) the quadratic nonlinearity magnetic control memristor that the present invention uses:
Q (Φ)=α Φ+β Φ2 (ii)
Wherein q (Φ) is magnetic control memristor, and Φ is magnetic flux, and α, β are the memristor control parameter greater than zero；
(3) derivation is carried out to (ii) formula, then corresponding magnetic control recalls guided mode type are as follows:
Wherein W (Φ) recalls for magnetic control and leads, and Φ is magnetic flux, and α, β are the memristor control parameter greater than zero；
(4) magnetic control memristor is introduced into Liu&Chen system, obtains a kind of four-dimensional memristor chaos of attractor rotation
System:
Wherein x, y, z, u are state variable, and a=4, b=13, c=1, d=0.001 are system control parameters, α=0.3, β
=0.4 is memristor control parameter；
2. constructing a kind of memristor chaos circuit of attractor rotation based on system (iv), which is characterized in that including first
Channel circuit, second channel circuit, third channel circuit, fourth lane circuit, memristor simulating equivalent circuit:
First channel module is by multiplier A1, inverting integrator U1, phase inverter U2And resistance R1, resistance R2, resistance
R9, resistance R10, capacitor C1Composition.The output signal x connection phase inverter U of first access2It is logical as first to become-x signal
The input signal on road, the output signal-x is as multiplier A in Article 2 access2, multiplier A3Input signal all the way effect
In Article 2 access, the output signal-x is as multiplier A in Article 3 channel module4Input signal all the way act on
Three accesses, the resistance R in the output signal-x connection Article 4 access8As the input signal of Article 4 access.
The Article 2 access is by memristor analog equivalent module, multiplier A2, multiplier A3, inverting integrator U3, it is anti-
Phase device U4And resistance R3, resistance R4, resistance R5, resistance R11, resistance R12, capacitor C2Composition.The output of the Article 2 access is believed
Multiplier A in number first access of y connection1Input signal all the way act on first access, output signal y connection second
Resistance R in access3Multiply as the input signal of Article 2 access, while in output signal y connection Article 3 access
Musical instruments used in a Buddhist or Taoist mass A4An input signal act on Article 3 access.
The Article 3 access is by multiplier A4, inverting integrator U5And resistance R6, resistance R7, capacitor C3Composition.Institute
State multiplier A in output signal z first access of connection of Article 3 access1Input signal all the way act on first it is logical
Road, multiplier A in output signal z connection Article 2 access2Input signal all the way act on Article 2 access, while this is defeated
Signal z passes through resistance R in connection Article 3 access out6As the input signal of Article 3 access.
The Article 4 access is by inverting integrator U6, resistance R8, capacitor C4Composition.The Article 4 access it is defeated
Resistance R in signal u connection memristor simulating equivalent circuit out14As the input signal of memristor.
The memristor simulating equivalent circuit is by reverse phase adder U7, phase inverter U8And resistance R13, resistance R14, resistance
R15, resistance R16, resistance R17Composition.In output signal W (u) the connection Article 2 access of the memristor simulating equivalent circuit
Multiplier A3An input signal act on Article 2 access.
A kind of memristor chaotic model circuit of attractor rotation described in 3., it is characterised in that: the inverting integrator
U1, phase inverter U2, inverting integrator U3, phase inverter U4, inverting integrator U5, inverting integrator U6Using operational amplifier UA741,
Multiplier A1, multiplier A2, multiplier A3, multiplier A4Using multiplier AD633JN.
The operational amplifier U1The 2nd pin pass through resistance R1 connection operational amplifier U2The 6th pin, pass through resistance
R2Connect multiplier A1The 7th pin, pass through capacitor C1Connect operational amplifier U1The 6th pin；6th pin passes through resistance R9Even
Meet operational amplifier U2The 2nd pin, pass through capacitor C1Connect operational amplifier U1The 2nd pin；3rd pin ground connection, the 4th draws
Foot connects negative voltage source VEE, and the 7th pin connects positive voltage source VCC；1st pin, the 5th pin, the 8th pin floating.
The operational amplifier U2The 2nd pin pass through resistance R9Connect operational amplifier U1The 6th pin, pass through resistance
R10Connect operational amplifier U2The 6th pin；6th pin passes through resistance R10Connect operational amplifier U2The 2nd pin, pass through electricity
Hinder R1Connect operational amplifier U1The 2nd pin, be directly connected to multiplier A2The 1st pin, be directly connected to multiplier A3The 1st
Pin is directly connected to multiplier A1The 1st pin, pass through resistance R8Connect operational amplifier U6The 2nd pin；3rd pin connects
Ground, the 4th pin connect negative voltage source VEE, and the 7th pin connects positive voltage source VCC；1st pin, the 5th pin, the 8th pin floating.
The operational amplifier U3The 2nd pin pass through resistance R3Connect operational amplifier U4The 6th pin, pass through resistance
R4Connect multiplier A2The 7th pin, pass through resistance R5Connect multiplier A3The 7th pin, pass through capacitor C2Connect operation amplifier
The 6th pin of device；6th pin passes through capacitor C2Connect operational amplifier U1The 2nd pin, pass through resistance R11Connect operational amplifier
U4The 2nd pin, be directly connected to multiplier A1The 1st pin, pass through resistance R3Connect operational amplifier U3The 2nd pin, directly
Connect multiplier A4The 2nd pin；3rd pin ground connection, the 4th pin connect negative voltage source VEE, and the 7th pin connects positive voltage source
VCC；1st pin, the 5th pin, the 8th pin floating.
The operational amplifier U4The 2nd pin pass through resistance connect operational amplifier U3The 6th pin, pass through resistance R12
Connect operational amplifier U4The 6th pin；3rd pin ground connection, the 4th pin connect negative voltage source VEE, and the 7th pin connects positive electricity
Potential source VCC；1st pin, the 5th pin, the 8th pin floating.
The operational amplifier U5The 2nd pin pass through resistance R6Connect operational amplifier U5The 6th pin, pass through resistance
R7Connect multiplier A4The 7th pin, pass through capacitor C3Connect operational amplifier U5The 6th pin；6th pin passes through resistance R6Even
Meet operational amplifier U5The 2nd pin, be directly connected to multiplier A1The 3rd pin, be directly connected to multiplier A2The 3rd pin；The
3 pins ground connection, the 4th pin connect negative voltage source VEE, and the 7th pin connects positive voltage source VCC；1st pin, the 5th pin, the 8th are drawn
Foot is hanging.
The operational amplifier U6The 2nd pin pass through resistance R8Connect operational amplifier U2The 6th pin, pass through capacitor
C4Connect operational amplifier U6The 6th pin；6th pin passes through capacitor C4Connect operational amplifier U6The 2nd pin, pass through electricity
Hinder R14Connect U7The 2nd pin；3rd pin ground connection, the 4th pin connect negative voltage source VEE, and the 7th pin connects positive voltage source
VCC；1st pin, the 5th pin, the 8th pin floating.
The operational amplifier U7The 2nd pin pass through resistance R14Connect operational amplifier U6The 2nd pin, pass through resistance
R13Connect DC power supply V1Anode, pass through resistance R15Connect operational amplifier U7The 6th pin；6th pin passes through resistance R15
Connect operational amplifier U7The 2nd pin, pass through resistance R16Connect operational amplifier U8The 2nd pin；3rd pin ground connection, the 4th
Pin connects negative voltage source VEE, and the 7th pin connects positive voltage source VCC；1st pin, the 5th pin, the 8th pin floating.
The operational amplifier U8The 2nd pin pass through resistance R16Connect operational amplifier U7The 6th pin, pass through resistance
R17Connect operational amplifier U8The 6th pin；6th pin is directly connected to multiplier A3The 3rd pin；3rd pin ground connection, the 4th
Pin connects negative voltage source VEE, and the 7th pin connects positive voltage source VCC；1st pin, the 5th pin, the 8th pin floating.
The multiplier A1The 1st pin be directly connected to operational amplifier U3The 6th pin；3rd pin is directly connected to operation
Amplifier U5The 6th pin；7th pin passes through resistance R2Connect operational amplifier U1The 2nd pin；2nd pin, the 4th pin,
6th pin ground connection, the 5th pin connect negative voltage source VEE, and the 8th pin connects positive voltage source VCC.
The multiplier A2The 1st pin be directly connected to operational amplifier U2The 6th pin；3rd pin is directly connected to operation
Amplifier U5The 6th pin；7th pin passes through resistance R4Connect operational amplifier U3The 2nd pin；2nd pin, the 4th pin,
6th pin ground connection, the 5th pin connect negative voltage source VEE, and the 8th pin connects positive voltage source VCC.
The multiplier A3The 1st pin be directly connected to operational amplifier U2The 6th pin；3rd pin is directly connected to operation
Amplifier U8The 6th pin；7th pin passes through resistance R5Connect operational amplifier U3The 2nd pin；2nd pin, the 4th pin,
6th pin ground connection, the 5th pin connect negative voltage source VEE, and the 8th pin connects positive voltage source VCC.
The multiplier A4The 1st pin be directly connected to operational amplifier U2The 6th pin；3rd pin is directly connected to operation
Amplifier U3The 6th pin；7th pin passes through resistance R7Connect operational amplifier U5The 2nd pin；2nd pin, the 4th pin,
6th pin ground connection, the 5th pin connect negative voltage source VEE, and the 8th pin connects positive voltage source VCC.
The memristor chaotic model circuit of a kind of four-winged chaotic attractor rotation described in 4., it is characterised in that: described first is logical
Resistance R in road1=25k, resistance R2=1k, resistance R9=10k, resistance R10=10k, capacitor C1=0.01uF；It is electric in second channel
Hinder R3=7.69k, resistance R4=1k, resistance R5=10k, resistance R11=10k, resistance R12=10k, capacitor C2=0.01uF；Third
Resistance R in channel6=100k, resistance R7=1k, capacitor C3=0.01uF；Resistance R in fourth lane8=1000k, capacitor C4=
10uF；Resistance R in memristor simulating equivalent circuit13=10k, resistance R14=0.375k, resistance R15=3k, resistance R16=10k,
Resistance R17=10k, DC voltage source V1Value be 1V, the value of positive voltage source VCC is+15V, the value of negative voltage source VEE is -15V.
5. the memristor chaos circuit for the attractor rotation that circuit of the present invention is realized, by the additional memristor module group in four channels
Conjunction obtains four road signals, is verified using Multisim simulation software, by adjusting capacitor C4Initial value obtain list
Wing monocycle, single-blade binary cycle, the rotational trajectory of single-blade chaos attractor on the x-y plane are as shown in Figure 2, Figure 3, Figure 4, different
The lasting chaos of original state is as shown in Figure 5, Figure 6.And using the primary elements such as operational amplifier and resistance, capacitor in bread board
On build circuit, the single-blade that Fig. 7, Fig. 8, Fig. 9 are shown attracts sub-trajectory to demonstrate the correctness of emulation experiment.
Claims (4)
1. a kind of the memristor chaotic model and circuit of four-winged chaotic attractor rotation, which comprises the following steps:
(1) mathematical model of Liu&Chen chaos system:
Wherein x, y, z, u are state variable, and a, b, c is system parameter；
(2) the quadratic linear magnetic control memristor that the present invention uses are as follows:
Q (Φ)=α Φ+β Φ2 (ii)
Wherein q (Φ) indicates magnetic control memristor, and Φ indicates that magnetic flux, α, β are the memristor control parameter greater than zero；
(3) derivation is carried out to (ii) formula, then corresponding magnetic control recalls guided mode type are as follows:
Wherein W (Φ) expression magnetic control, which is recalled, leads, and Φ indicates that magnetic flux, α, β are the memristor control parameter greater than zero；
(4) memristor is introduced into Liu&Chen system, obtains a kind of four wing memristor chaos systems of attractor rotation:
Wherein x, y, z, u are state variable, a=4, b=13, and c=1, d=0.001 are system control parameters, α=0.3, β=
0.4 is memristor control parameter.
2. constructing a kind of memristor chaotic model circuit of attractor rotation based on system (iv), which is characterized in that including first
Channel circuit, second channel circuit, third channel circuit, fourth lane circuit, memristor simulating equivalent circuit:
First channel module is by multiplier A1, inverting integrator U1, phase inverter U2And resistance R1, resistance R2, resistance R9、
Resistance R10, capacitor C1Composition.The output signal x connection phase inverter U of first access2Become-x signal as the first access
Input signal, the output signal-x is as multiplier A in Article 2 access2, multiplier A3Input signal all the way act on
Article 2 access, the output signal-x is as multiplier A in Article 3 channel module4Input signal all the way act on third
Access, the resistance R in the output signal-x connection Article 4 access8As the input signal of Article 4 access.
The Article 2 access is by memristor analog equivalent module, multiplier A2, multiplier A3, inverting integrator U3, phase inverter
U4And resistance R3, resistance R4, resistance R5, resistance R11, resistance R12, capacitor C2Composition.The output signal y of the Article 2 access
Connect multiplier A in first access1Input signal all the way act on first access, output signal y connection Article 2
Resistance R in access3As the input signal of Article 2 access, while multiplication in output signal y connection Article 3 access
Device A4An input signal act on Article 3 access.
The Article 3 access is by multiplier A4, inverting integrator U5And resistance R6, resistance R7, capacitor C3Composition.Described
Multiplier A in output signal z first access of connection of three accesses1Input signal all the way act on first access, should
Multiplier A in output signal z connection Article 2 access2Input signal all the way act on Article 2 access, while the output is believed
Number z passes through resistance R in connection Article 3 access6As the input signal of Article 3 access.
The Article 4 access is by inverting integrator U6, resistance R8, capacitor C4Composition.The output of the Article 4 access is believed
Resistance R in number u connection memristor simulating equivalent circuit14As the input signal of memristor.
The memristor simulating equivalent circuit is by reverse phase adder U7, phase inverter U8And resistance R13, resistance R14, resistance R15、
Resistance R16, resistance R17Composition.Multiplication in output signal W (u) the connection Article 2 access of the memristor simulating equivalent circuit
Device A3An input signal act on Article 2 access.
3. a kind of memristor chaotic model circuit of attractor rotation according to claim 2, it is characterised in that: described is anti-
Phase integral device U1, phase inverter U2, inverting integrator U3, phase inverter U4, inverting integrator U5, inverting integrator U6Just use operation amplifier
Device UA741, multiplier A1, multiplier A2, multiplier A3, multiplier A4Using multiplier AD633JN.
4. a kind of memristor chaotic model circuit of attractor rotation according to claim 3, it is characterised in that: described the
Resistance R in one channel1=25k, resistance R2=1k, resistance R9=10k, resistance R10=10k, capacitor C1=0.01uF；Second channel
Middle resistance R3=7.69k, resistance R4=1k, resistance R5=10k, resistance R11=10k, resistance R12=10k, capacitor C2=0.01uF；
Resistance R in third channel6=100k, resistance R7=1k, capacitor C3=0.01uF；Resistance R in fourth lane8=1000k, capacitor
C4=10uF；Resistance R in the simulating equivalent circuit of memristor13=10k, resistance R14=0.375k, resistance R15=3k, resistance R16
=10k, resistance R17=10k, DC voltage source V1 value be 1V.
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