CN112422260B - Construction method of non-Hamilton system with three-dimensional 2 x 2 cluster conservative chaotic stream - Google Patents
Construction method of non-Hamilton system with three-dimensional 2 x 2 cluster conservative chaotic stream Download PDFInfo
- Publication number
- CN112422260B CN112422260B CN201910782054.0A CN201910782054A CN112422260B CN 112422260 B CN112422260 B CN 112422260B CN 201910782054 A CN201910782054 A CN 201910782054A CN 112422260 B CN112422260 B CN 112422260B
- Authority
- CN
- China
- Prior art keywords
- operational amplifier
- channel circuit
- multiplier
- output
- auxiliary channel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/001—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols using chaotic signals
Abstract
The invention relates to a non-Hamilton system with three-dimensional 2 multiplied by 2 cluster conservative chaotic stream and a circuit realization thereof, wherein the circuit consists of three main channel circuits and three auxiliary channel circuits: the first main channel circuit and the second main channel circuit are composed of a direct current voltage source, an operational amplifier, a resistor and a capacitor; the third main channel circuit consists of a direct-current voltage source, a battery pack, an operational amplifier, a resistor and a capacitor; the three auxiliary channel circuits are composed of multipliers. The invention provides a non-Hamilton system with three-dimensional 2 multiplied by 2 cluster conservative chaotic stream and provides a circuit implementation of the system. The system has a complex topological structure, and the topological structure of the system presents a conservative chaotic stream with a2 x 2 cluster structure on a spatial coordinate axis under given parameters and initial conditions. The system has complex dynamics characteristics, is more advantageous in encryption algorithm and key construction, and provides an attractive scheme for chaos-based information encryption technology.
Description
Technical Field
The invention relates to a three-dimensional non-Hamilton system and a circuit implementation, in particular to a non-Hamilton system with three-dimensional 2 multiplied by 2 cluster conservative chaotic streams and a circuit implementation thereof.
Background
Chaos theory has begun to be applied gradually to various fields of information security since the first time Matthews proposed the use of chaos for cryptographic research in 1989. When the chaos theory is applied to the field of information security, the characteristic that the chaos system can generate a complex pseudo-random sequence is widely adopted. Chaos can be divided into dissipative chaos and conservative chaos, the dissipative chaos theory has been widely researched in the past decades, but the conservative chaos research is relatively less, and is especially not common in a non-Hamilton system. For dissipative systems, if the time goes to infinity, the system will tend to a more stable mode, the attractor being the form in which the system is ultimately fixed in a state in phase space. Therefore, an attacker can carry out phase space reconstruction according to the set of continuous small sections of points in the chaotic sequence, so that the encryption system is cracked, and potential safety hazards are caused. However, the conservative chaos does not have an attractor and cannot be broken by the method, so that the conservative chaos is more attractive in encryption application. The invention provides a three-dimensional non-Hamilton system which can generate 2 multiplied by 2 cluster conservative chaotic streams and provides an attractive scheme for chaotic-based information encryption technology.
Disclosure of Invention
The invention aims to solve the technical problem of providing a non-Hamilton system with three-dimensional 2 multiplied by 2 cluster conservative chaotic streams and a circuit implementation thereof, and the invention adopts the following technical means to realize the purpose of the invention:
1. a construction method of a non-Hamilton system with three-dimensional 2 x 2 cluster conservative chaotic stream is characterized by comprising the following steps:
(1) the non-Hamiltonian system (i) with three-dimensional 2 x 2 cluster conservative chaotic streams is as follows:
in the formula, X, Y and Z are state variables, and the projections of a three-dimensional phase diagram of the system on X-Y, X-Z and Y-Z planes are respectively 2 multiplied by 2 cluster conservative chaotic streams.
(2) A circuit constructed in accordance with system (i), characterized in that: the circuit consists of three main channel circuits and three auxiliary channel circuits: the first main channel circuit comprises a direct current voltage source VCC, a direct current voltage source VDD, an operational amplifier U1A, an operational amplifier U1B, a resistor R1, a resistor R2, a resistor R3, a resistor R4 and a capacitor C1, the second main channel circuit comprises a direct current voltage source VCC, a direct current voltage source VDD, an operational amplifier U2 1, a resistor R1 and a capacitor C1, the third main channel circuit comprises a direct current voltage source VCC, a direct current voltage source VDD, a battery pack V1, an operational amplifier U3 1, a resistor R1 and a capacitor C1, the first auxiliary channel circuit comprises a multiplier A1, a multiplier A1 and a multiplier A1, the second auxiliary channel circuit comprises a multiplier A1, a multiplier A1 and a multiplier A1, and the second auxiliary channel circuit comprises a multiplier A1, Multiplier A4, multiplier A5.
2. The output of the multiplier A2 in the first auxiliary channel circuit is connected with the negative input end of the operational amplifier U1A in the first main channel circuit through a resistor R2; the output of the operational amplifier U1A is connected to the negative input of the operational amplifier U1A through a capacitor C1; the output of the operational amplifier U1A is connected with two input ends of a multiplier A7 in the second auxiliary channel circuit; the output of the operational amplifier U1A is connected to one input of the multiplier A8 in the second auxiliary channel circuit; the output of the operational amplifier U1A is connected to the negative input of the operational amplifier U1B in the first main channel circuit through a resistor R3; the positive input end of the operational amplifier U1A is grounded; the output of the operational amplifier U1B is connected to the negative input of the operational amplifier U1B through a resistor R4; the output of the operational amplifier U1B is connected to the negative input of the operational amplifier U2A in the second main channel circuit through a resistor R12; the positive input end of the operational amplifier U1B is grounded; the negative power supply end of the operational amplifier U1B is connected with a direct-current voltage source VDD; the positive power supply of the operational amplifier U1B is connected to a DC voltage source VCC.
3. The output of the multiplier A3 in the third auxiliary channel circuit is connected with the negative input end of the operational amplifier U2A in the second main channel circuit through a resistor R10; the output of the multiplier A5 in the third auxiliary channel circuit is connected with the negative input end of the operational amplifier U2A in the second main channel circuit through a resistor R11; the output of the multiplier A8 in the second auxiliary channel circuit is connected with the negative input end of the operational amplifier U2A in the second main channel circuit through a resistor R16; the output of the operational amplifier U2A is connected to the negative input of the operational amplifier U2A through a capacitor C2; the output of the operational amplifier U2A is connected to the negative input of the operational amplifier U1A in the first main channel circuit through a resistor R1; the output of the operational amplifier U2A is connected to one input of the multiplier A1 in the first auxiliary channel circuit; the output of the operational amplifier U2A is connected to one input of the multiplier A2 in the first auxiliary channel circuit; the output of the operational amplifier U2A is connected to one input of the multiplier A3 in the third auxiliary channel circuit; the output of the operational amplifier U2A is connected with the negative input end of the operational amplifier U2B in the second main channel circuit through a resistor R6; the positive input end of the operational amplifier U2A is grounded; the output of the operational amplifier U2B is connected to the negative input of the operational amplifier U2B through a resistor R5; (ii) a The output of the operational amplifier U2B is connected to one input of the multiplier A1 in the first auxiliary channel circuit; the positive input end of the operational amplifier U2B is grounded; the negative power supply end of the operational amplifier U2B is connected with a direct-current voltage source VDD; the positive power supply of the operational amplifier U2B is connected to a DC voltage source VCC.
4. The output of the multiplier A1 in the first auxiliary channel circuit is connected with the negative input end of the operational amplifier U3A in the third main channel circuit through a resistor R14; the output of the multiplier A6 in the first auxiliary channel circuit is connected with the negative input end of the operational amplifier U3A in the third main channel circuit through a resistor R15; the negative electrode of the battery pack V1 is connected with the negative input end of an operational amplifier U3A in the third main channel circuit through a resistor R13; the positive electrode of the battery pack V1 is grounded; the output of the operational amplifier U3A is connected to the negative input of the operational amplifier U3A through a capacitor C3; the output of the operational amplifier U3A is connected to one input of the multiplier A3 in the third auxiliary channel circuit; the output of the operational amplifier U3A is connected to one input of the multiplier A4 in the third auxiliary channel circuit; the output of the operational amplifier U3A is connected to the negative input of the operational amplifier U3B in the third main channel circuit through a resistor R8; the positive input end of the operational amplifier U3A is grounded; the output of the operational amplifier U3B is connected to the negative input of the operational amplifier U3B through a resistor R7; the output of the operational amplifier U3B is connected to one input of the multiplier A5 in the third auxiliary channel circuit; the positive input end of the operational amplifier U3B is grounded; the positive power supply end of the operational amplifier U3B is connected with a direct-current voltage source VCC; the negative power supply of the operational amplifier U3B is connected to the DC voltage source VDD.
5. The output of the multiplier A1 in the first auxiliary channel circuit is connected to one input of the multiplier A2 in the first auxiliary channel circuit; the output of multiplier a1 in the first auxiliary channel circuit is connected to both inputs of multiplier a6 in the first auxiliary channel circuit.
6. The output of multiplier a7 in the second auxiliary channel circuit is connected to one input of multiplier A8 in the second auxiliary channel circuit.
7. The output of the multiplier A3 in the third auxiliary channel circuit is connected with one input end of a multiplier A4 in the third auxiliary channel circuit; the output of multiplier a4 in the third auxiliary channel circuit is connected to one input of multiplier a5 in the third auxiliary channel circuit.
Drawings
Fig. 1 is a schematic diagram of a circuit connection structure according to a preferred embodiment of the present invention.
FIG. 2 is an X-Y plan phase diagram of the present invention.
FIG. 3 is a phase diagram in the X-Z plane of the present invention.
FIG. 4 is a Y-Z planar phase diagram of the present invention.
Detailed Description
The invention will be described in further detail below with reference to the drawings and preferred embodiments, and with reference to fig. 1-4.
1. A construction method of a non-Hamilton system with three-dimensional 2 x 2 cluster conservative chaotic stream is characterized by comprising the following steps:
(1) the non-Hamiltonian system (i) with three-dimensional 2 x 2 cluster conservative chaotic streams is as follows:
in the formula, X, Y and Z are state variables, and the projections of a three-dimensional phase diagram of the system on X-Y, X-Z and Y-Z planes are respectively 2 multiplied by 2 cluster conservative chaotic streams.
(2) A circuit constructed in accordance with system (i), characterized in that: the circuit consists of three main channel circuits and three auxiliary channel circuits: the first main channel circuit comprises a direct current voltage source VCC, a direct current voltage source VDD, an operational amplifier U1A, an operational amplifier U1B, a resistor R1, a resistor R2, a resistor R3, a resistor R4 and a capacitor C1, the second main channel circuit comprises a direct current voltage source VCC, a direct current voltage source VDD, an operational amplifier U2 1, a resistor R1 and a capacitor C1, the third main channel circuit comprises a direct current voltage source VCC, a direct current voltage source VDD, a battery pack V1, an operational amplifier U3 1, a resistor R1 and a capacitor C1, the first auxiliary channel circuit comprises a multiplier A1, a multiplier A1 and a multiplier A1, the second auxiliary channel circuit comprises a multiplier A1, a multiplier A1 and a multiplier A1, and the second auxiliary channel circuit comprises a multiplier A1, Multiplier A4, multiplier A5.
2. The output of the multiplier A2 in the first auxiliary channel circuit is connected with the negative input end of the operational amplifier U1A in the first main channel circuit through a resistor R2; the output of the operational amplifier U1A is connected to the negative input of the operational amplifier U1A through a capacitor C1; the output of the operational amplifier U1A is connected with two input ends of a multiplier A7 in the second auxiliary channel circuit; the output of the operational amplifier U1A is connected to one input of the multiplier A8 in the second auxiliary channel circuit; the output of the operational amplifier U1A is connected to the negative input of the operational amplifier U1B in the first main channel circuit through a resistor R3; the positive input end of the operational amplifier U1A is grounded; the output of the operational amplifier U1B is connected to the negative input of the operational amplifier U1B through a resistor R4; the output of the operational amplifier U1B is connected to the negative input of the operational amplifier U2A in the second main channel circuit through a resistor R12; the positive input end of the operational amplifier U1B is grounded; the negative power supply end of the operational amplifier U1B is connected with a direct-current voltage source VDD; the positive power supply of the operational amplifier U1B is connected to a DC voltage source VCC.
3. The output of the multiplier A3 in the third auxiliary channel circuit is connected with the negative input end of the operational amplifier U2A in the second main channel circuit through a resistor R10; the output of the multiplier A5 in the third auxiliary channel circuit is connected with the negative input end of the operational amplifier U2A in the second main channel circuit through a resistor R11; the output of the multiplier A8 in the second auxiliary channel circuit is connected with the negative input end of the operational amplifier U2A in the second main channel circuit through a resistor R16; the output of the operational amplifier U2A is connected to the negative input of the operational amplifier U2A through a capacitor C2; the output of the operational amplifier U2A is connected with the negative input end of the operational amplifier U1A in the first main channel circuit through a resistor R1; the output of the operational amplifier U2A is connected to one input of the multiplier A1 in the first auxiliary channel circuit; the output of the operational amplifier U2A is connected to one input of the multiplier A2 in the first auxiliary channel circuit; the output of the operational amplifier U2A is connected to one input of the multiplier A3 in the third auxiliary channel circuit; the output of the operational amplifier U2A is connected with the negative input end of the operational amplifier U2B in the second main channel circuit through a resistor R6; the positive input end of the operational amplifier U2A is grounded; the output of the operational amplifier U2B is connected to the negative input of the operational amplifier U2B through a resistor R5; (ii) a The output of the operational amplifier U2B is connected to one input of the multiplier A1 in the first auxiliary channel circuit; the positive input end of the operational amplifier U2B is grounded; the negative power supply end of the operational amplifier U2B is connected with a direct-current voltage source VDD; the positive power supply of the operational amplifier U2B is connected to a DC voltage source VCC.
4. The output of the multiplier A1 in the first auxiliary channel circuit is connected with the negative input end of the operational amplifier U3A in the third main channel circuit through a resistor R14; the output of the multiplier A6 in the first auxiliary channel circuit is connected with the negative input end of the operational amplifier U3A in the third main channel circuit through a resistor R15; the negative electrode of the battery pack V1 is connected with the negative input end of an operational amplifier U3A in the third main channel circuit through a resistor R13; the positive electrode of the battery pack V1 is grounded; the output of the operational amplifier U3A is connected to the negative input of the operational amplifier U3A through a capacitor C3; the output of the operational amplifier U3A is connected to one input of the multiplier A3 in the third auxiliary channel circuit; the output of the operational amplifier U3A is connected to one input of the multiplier A4 in the third auxiliary channel circuit; the output of the operational amplifier U3A is connected to the negative input of the operational amplifier U3B in the third main channel circuit through a resistor R8; the positive input end of the operational amplifier U3A is grounded; the output of the operational amplifier U3B is connected to the negative input of the operational amplifier U3B through a resistor R7; the output of the operational amplifier U3B is connected to one input of the multiplier A5 in the third auxiliary channel circuit; the positive input end of the operational amplifier U3B is grounded; the positive power supply end of the operational amplifier U3B is connected with a direct-current voltage source VCC; the negative power supply of the operational amplifier U3B is connected to the DC voltage source VDD.
5. The output of the multiplier A1 in the first auxiliary channel circuit is connected with one input end of the multiplier A2 in the first auxiliary channel circuit; the output of multiplier a1 in the first auxiliary channel circuit is connected to both inputs of multiplier a6 in the first auxiliary channel circuit.
6. The output of multiplier a7 in the second auxiliary channel circuit is connected to one input of multiplier A8 in the second auxiliary channel circuit.
7. The output of the multiplier A3 in the third auxiliary channel circuit is connected with one input end of a multiplier A4 in the third auxiliary channel circuit; the output of multiplier a4 in the third auxiliary channel circuit is connected to one input of multiplier a5 in the third auxiliary channel circuit.
It is to be understood that the above description is not intended to limit the invention, and the invention is not limited to the above examples, and that various changes, modifications, additions and substitutions which may be made by one skilled in the art within the spirit and scope of the invention are included therein.
Claims (1)
1. A construction method of a non-Hamilton system with three-dimensional 2 x 2 cluster conservative chaotic stream is characterized by comprising the following steps:
(1) the non-Hamiltonian system (i) with three-dimensional 2 x 2 cluster conservative chaotic streams is as follows:
in the formula, X, Y and Z are state variables, and the projections of a three-dimensional phase diagram of the system on X-Y, X-Z and Y-Z planes are respectively 2 multiplied by 2 cluster conservative chaotic streams;
(2) the circuit constructed based on the system (i) consists of three main channel circuits and three auxiliary channel circuits: the first main channel circuit comprises a direct current voltage source VCC, a direct current voltage source VDD, an operational amplifier U1A, an operational amplifier U1B, a resistor R1, a resistor R2 and a capacitor C2, the second main channel circuit comprises a direct current voltage source VCC, a direct current voltage source VDD, an operational amplifier U2 2, a resistor R2 and a capacitor C2, the third main channel circuit comprises a direct current voltage source VCC, a direct current voltage source VDD, a battery pack V2, an operational amplifier U3 2, a resistor R2 and a capacitor C2, the first auxiliary channel circuit comprises a multiplier A2, a multiplier A2 and a multiplier A2, the second auxiliary channel circuit comprises a multiplier A2, a multiplier A2 and a multiplier A2, and a multiplier A2, A multiplier A5;
the output of the multiplier A2 in the first auxiliary channel circuit is connected with the negative input end of the operational amplifier U1A in the first main channel circuit through a resistor R2; the output of the operational amplifier U1A is connected to the negative input of the operational amplifier U1A through a capacitor C1; the output of the operational amplifier U1A is connected with two input ends of a multiplier A7 in the second auxiliary channel circuit; the output of the operational amplifier U1A is connected to one input of the multiplier a8 in the second auxiliary channel circuit; the output of the operational amplifier U1A is connected to the negative input of the operational amplifier U1B in the first main channel circuit through a resistor R3; the positive input end of the operational amplifier U1A is grounded; the output of the operational amplifier U1B is connected to the negative input of the operational amplifier U1B through a resistor R4; the output of the operational amplifier U1B is connected to the negative input of the operational amplifier U2A in the second main channel circuit through a resistor R12; the positive input end of the operational amplifier U1B is grounded; the negative power supply end of the operational amplifier U1B is connected with a direct-current voltage source VDD; the positive power supply end of the operational amplifier U1B is connected with a direct-current voltage source VCC;
the output of the multiplier A3 in the third auxiliary channel circuit is connected with the negative input end of the operational amplifier U2A in the second main channel circuit through a resistor R10; the output of the multiplier A5 in the third auxiliary channel circuit is connected with the negative input end of the operational amplifier U2A in the second main channel circuit through a resistor R11; the output of the multiplier A8 in the second auxiliary channel circuit is connected with the negative input end of the operational amplifier U2A in the second main channel circuit through a resistor R16; the output of the operational amplifier U2A is connected to the negative input of the operational amplifier U2A through a capacitor C2; the output of the operational amplifier U2A is connected to the negative input of the operational amplifier U1A in the first main channel circuit through a resistor R1; the output of the operational amplifier U2A is connected to one input of the multiplier A1 in the first auxiliary channel circuit; the output of the operational amplifier U2A is connected to one input of the multiplier A2 in the first auxiliary channel circuit; the output of the operational amplifier U2A is connected to one input of the multiplier A3 in the third auxiliary channel circuit; the output of the operational amplifier U2A is connected with the negative input end of the operational amplifier U2B in the second main channel circuit through a resistor R6; the positive input end of the operational amplifier U2A is grounded; the output of the operational amplifier U2B is connected to the negative input of the operational amplifier U2B through a resistor R5; the output of the operational amplifier U2B is connected to one input of the multiplier A1 in the first auxiliary channel circuit; the positive input end of the operational amplifier U2B is grounded; the negative power supply end of the operational amplifier U2B is connected with a direct-current voltage source VDD; the positive power supply end of the operational amplifier U2B is connected with a direct-current voltage source VCC;
the output of the multiplier A1 in the first auxiliary channel circuit is connected with the negative input end of the operational amplifier U3A in the third main channel circuit through a resistor R14; the output of the multiplier A6 in the first auxiliary channel circuit is connected with the negative input end of the operational amplifier U3A in the third main channel circuit through a resistor R15; the negative electrode of the battery pack V1 is connected with the negative input end of an operational amplifier U3A in the third main channel circuit through a resistor R13; the positive electrode of the battery pack V1 is grounded; the output of the operational amplifier U3A is connected to the negative input of the operational amplifier U3A through a capacitor C3; the output of the operational amplifier U3A is connected to one input of the multiplier A3 in the third auxiliary channel circuit; the output of the operational amplifier U3A is connected to one input of the multiplier A4 in the third auxiliary channel circuit; the output of the operational amplifier U3A is connected to the negative input of the operational amplifier U3B in the third main channel circuit through a resistor R8; the positive input end of the operational amplifier U3A is grounded; the output of the operational amplifier U3B is connected to the negative input of the operational amplifier U3B through a resistor R7; the output of the operational amplifier U3B is connected to one input of the multiplier A5 in the third auxiliary channel circuit; the positive input end of the operational amplifier U3B is grounded; the positive power supply end of the operational amplifier U3B is connected with a direct-current voltage source VCC; the negative power supply end of the operational amplifier U3B is connected with a direct-current voltage source VDD;
the output of the multiplier A1 in the first auxiliary channel circuit is connected with one input end of the multiplier A2 in the first auxiliary channel circuit; the output of the multiplier A1 in the first auxiliary channel circuit is connected with two input ends of a multiplier A6 in the first auxiliary channel circuit;
the output of the multiplier A7 in the second auxiliary channel circuit is connected with one input end of a multiplier A8 in the second auxiliary channel circuit;
the output of the multiplier A3 in the third auxiliary channel circuit is connected with one input end of a multiplier A4 in the third auxiliary channel circuit; the output of multiplier a4 in the third auxiliary channel circuit is connected to one input of multiplier a5 in the third auxiliary channel circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910782054.0A CN112422260B (en) | 2019-08-23 | 2019-08-23 | Construction method of non-Hamilton system with three-dimensional 2 x 2 cluster conservative chaotic stream |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910782054.0A CN112422260B (en) | 2019-08-23 | 2019-08-23 | Construction method of non-Hamilton system with three-dimensional 2 x 2 cluster conservative chaotic stream |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN112422260A CN112422260A (en) | 2021-02-26 |
| CN112422260B true CN112422260B (en) | 2022-08-02 |
Family
ID=74779309
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910782054.0A Active CN112422260B (en) | 2019-08-23 | 2019-08-23 | Construction method of non-Hamilton system with three-dimensional 2 x 2 cluster conservative chaotic stream |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN112422260B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113872750B (en) * | 2021-09-29 | 2024-03-15 | 南开大学 | System with dissipation term and 2 clusters of conserved chaotic streams |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2016029619A1 (en) * | 2014-08-30 | 2016-03-03 | 李敏 | Rikitake system-based four-dimensional super-chaotic system having no equilibrium point, and analog circuit |
| CN105681021A (en) * | 2016-04-06 | 2016-06-15 | 仓诗建 | Three-dimensional generalized dissipative Hamilton system chaotic circuit |
| CN109039581A (en) * | 2016-04-28 | 2018-12-18 | 王志 | A kind of simple chaos system circuit of output Lorenz type switching attractor |
| CN109302279A (en) * | 2018-12-11 | 2019-02-01 | 湘潭大学 | A kind of the memristor chaotic model and circuit of four-winged chaotic attractor rotation |
-
2019
- 2019-08-23 CN CN201910782054.0A patent/CN112422260B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2016029619A1 (en) * | 2014-08-30 | 2016-03-03 | 李敏 | Rikitake system-based four-dimensional super-chaotic system having no equilibrium point, and analog circuit |
| CN105681021A (en) * | 2016-04-06 | 2016-06-15 | 仓诗建 | Three-dimensional generalized dissipative Hamilton system chaotic circuit |
| CN109039581A (en) * | 2016-04-28 | 2018-12-18 | 王志 | A kind of simple chaos system circuit of output Lorenz type switching attractor |
| CN109302279A (en) * | 2018-12-11 | 2019-02-01 | 湘潭大学 | A kind of the memristor chaotic model and circuit of four-winged chaotic attractor rotation |
Non-Patent Citations (1)
| Title |
|---|
| 基于Duffing振子混沌和随机共振特性的微弱信号检测方法研究;赖志慧;《中国优秀博士论文全文数据库-工程科技II辑》;20160815(第8期);全文 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN112422260A (en) | 2021-02-26 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| Fateev et al. | Expectation values of local fields in the Bullough-Dodd model and integrable perturbed conformal field theories | |
| Sun | Chaotic secure communication: principles and technologies | |
| CN105681021B (en) | A kind of chaos circuit of Three Dimensional Generalized dissipation Hamilton system | |
| Loos | Internal Holonomy Groups of Yang‐Mills Fields | |
| CN105490801B (en) | Four-dimensional fractional order chaotic system circuit containing memristor | |
| CN103248473B (en) | A kind of autonomous hyperchaotic system of the four-dimension of Dual-parameter constant-Lyapunov-exfour-dimensional | |
| CN106685662B (en) | A kind of whitepack software implementation method of the close SM2 Encryption Algorithm of quotient based on residue number system | |
| CN107819566B (en) | Method for realizing chaotic oscillating circuit | |
| CN112422260B (en) | Construction method of non-Hamilton system with three-dimensional 2 x 2 cluster conservative chaotic stream | |
| CN112422263B (en) | Generalized Sprott-A system with three-dimensional 3 x 2 cluster conservative chaotic stream and circuit implementation thereof | |
| CN112152573B (en) | Conservative system with four clusters of chaotic streams and circuit implementation thereof | |
| CN113242117A (en) | Conservative chaotic system with dissipative term and circuit | |
| En-Zeng et al. | A novel four-wing chaotic attractor generated from a three-dimensional quadratic autonomous system | |
| CN112422258B (en) | Construction method of improved Sprott-A system with single cluster of conservative chaotic streams | |
| CN112422261B (en) | Generalized Sprotet-A system with four cluster conservative chaotic streams and construction method thereof | |
| CN112422766B (en) | Generalized Sprott-A system with three-dimensional 2 x 1 cluster conservative chaotic stream and circuit implementation thereof | |
| Wulfman | Dynamical symmetry | |
| CN109462467A (en) | A kind of four dimensional chaos system containing hiding attractor and its realize circuit | |
| Wang et al. | An exponential chaotic oscillator design and its dynamic analysis | |
| CN112152773B (en) | Three-dimensional improved Sprott-A chaotic system and circuit implementation thereof | |
| CN112152774B (en) | Construction method of non-Hamilton system capable of generating four-scroll chaotic stream | |
| CN206807464U (en) | A kind of wing chaos circuit of three-dimensional four containing multi-parameter | |
| CN112152983B (en) | non-Hamilton system with six clusters of chaotic streams and construction method thereof | |
| CN112422264B (en) | Generalized Sprott-A system with three clusters of conservative chaotic streams and circuit implementation thereof | |
| CN112422262B (en) | Generalized Sprott-A system with double cluster conservative chaotic streams and construction method thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |