CN112422262B - Generalized Sprott-A system with double cluster conservative chaotic streams and construction method thereof - Google Patents
Generalized Sprott-A system with double cluster conservative chaotic streams and construction method thereof Download PDFInfo
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- CN112422262B CN112422262B CN201910782096.4A CN201910782096A CN112422262B CN 112422262 B CN112422262 B CN 112422262B CN 201910782096 A CN201910782096 A CN 201910782096A CN 112422262 B CN112422262 B CN 112422262B
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- 230000000739 chaotic effect Effects 0.000 title claims abstract description 16
- 238000010276 construction Methods 0.000 title claims abstract description 7
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- 238000004891 communication Methods 0.000 abstract description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000010587 phase diagram Methods 0.000 description 2
- 238000007792 addition Methods 0.000 description 1
- 238000005291 chaos (dynamical) Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/001—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols using chaotic signals
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/34—Negative-feedback-circuit arrangements with or without positive feedback
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/68—Combinations of amplifiers, e.g. multi-channel amplifiers for stereophonics
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
- H04L2209/12—Details relating to cryptographic hardware or logic circuitry
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Abstract
The invention relates to a generalized Sprott-A system with double cluster conservative chaotic streams and a circuit, wherein the circuit consists of three main channel circuits and an auxiliary channel circuit: the first main channel circuit consists of a direct current voltage source, an operational amplifier, a resistor and a capacitor; the second main channel circuit consists of a direct current voltage source, an operational amplifier, a resistor and a capacitor; the third main channel circuit consists of a direct-current voltage source, a battery pack, an operational amplifier, a resistor and a capacitor; the auxiliary channel circuit is composed of a multiplier. The invention provides a generalized Sprott-A system with double cluster conservative chaotic streams and a circuit implementation of the system. The new system has a conservative phase volume and can generate a complex dynamic characteristic with double cluster conservative chaotic streams, and the new system is more advantageous in encryption algorithm and key construction. The system has potential application value in the field of secret communication.
Description
Technical Field
The invention relates to a system capable of generating conservative chaotic streams and a circuit implementation thereof, in particular to a generalized Sprott-A system with double cluster conservative chaotic streams and a circuit implementation thereof.
Background
With the rapid development of computer science and propagation media, thousands of information is transmitted between computer terminals through the internet, and in order to ensure the security of the information, information encryption schemes based on various technologies are proposed, such as wavelet transform, hash function, chaos, and the like. The chaos has the characteristics of unpredictability, state ergodicity, initial value sensitivity and the like, so that the information encryption based on the chaos theory has good performance, a dissipative chaos system is mainly adopted in the current chaos information encryption, but a conservative chaos system can generate a more complex random sequence, and the method has higher safety and is more suitable for information encryption. The invention provides a generalized Sprott-A system with double cluster conservative chaotic streams, which can generate double cluster conservative chaotic streams and has more advantages in encryption algorithm and key construction. The system has potential application value in the field of secret communication.
Disclosure of Invention
The invention aims to provide a generalized Sprott-A system with double cluster conservative chaotic streams and a circuit thereof, wherein the generalized Sprott-A system comprises:
1. a construction method of a generalized Sprotet-A system with double cluster conservative chaotic streams is characterized by comprising the following steps:
(1) a generalized Sprott-A system with double cluster conservative chaotic streams (i) is as follows:
wherein x, y and z are state variables;
(2) a circuit constructed in accordance with system (i) wherein the circuit is comprised of three main channel circuits and one auxiliary channel circuit: the first main channel circuit consists of a direct-current voltage source VCC, a direct-current voltage source VDD, an operational amplifier U1A, an operational amplifier U1B, a resistor R1, a resistor R2, a resistor R3, a resistor R4 and a capacitor C1; the second main channel circuit consists of a direct-current voltage source VCC, a direct-current voltage source VDD, an operational amplifier U2A, an operational amplifier U2B, a resistor R5, a resistor R6, a resistor R7, a resistor R8 and a capacitor C2; the third main channel circuit consists of a direct-current voltage source VCC, a direct-current voltage source VDD, a battery pack V1, an operational amplifier U3A, an operational amplifier U3B, a resistor R9, a resistor R10, a resistor R11, a resistor R12, a resistor R13 and a capacitor C3; the auxiliary channel circuit is composed of a multiplier A1, a multiplier A2, a multiplier A3 and a multiplier A4.
2. The output of the operational amplifier U1A in the first main channel circuit is connected with the negative input end of the operational amplifier U1A through a capacitor C1; the output of the operational amplifier U1A is connected to the negative input of the operational amplifier U1B through a resistor R3; the output of the operational amplifier U1A is connected to the negative input of the operational amplifier U2A in the second main channel circuit through a resistor R6; the positive input end of the operational amplifier U1A is grounded; the output of the operational amplifier U1B is connected to the negative input of the operational amplifier U1B through a resistor R4; the positive input end of the operational amplifier U1B is grounded; the positive power supply end of the operational amplifier U1B is connected with a direct-current voltage source VCC; the negative power supply of the operational amplifier U1B is connected to the DC voltage source VDD.
3. The output of the operational amplifier U2A in the second main channel circuit is connected with the negative input end of the operational amplifier U2A through a capacitor C2; the output of the operational amplifier U2A is connected to the negative input of the operational amplifier U2B through a resistor R7; the output of the operational amplifier U2A is connected with the negative input end of the operational amplifier U1A in the first main channel circuit through a resistor R2; the output of the operational amplifier U2A is connected to one input of the multiplier A2 in the auxiliary channel circuit; the output of the operational amplifier U2A is connected to one input of the multiplier A3 in the auxiliary channel circuit; the positive input end of the operational amplifier U2A is grounded; the output of the operational amplifier U2B is connected to the negative input of the operational amplifier U2B through a resistor R8; the output of the operational amplifier U2B is connected to one input of the multiplier A1 in the auxiliary channel circuit; the output of the operational amplifier U2B is connected to one input of the multiplier A2 in the auxiliary channel circuit; the output of the operational amplifier U2B is connected to one input of the multiplier A4 in the auxiliary channel circuit; the positive input end of the operational amplifier U2B is grounded; the positive power supply end of the operational amplifier U2B is connected with a direct-current voltage source VCC; the negative power supply of the operational amplifier U2B is connected to the DC voltage source VDD.
4. The output of the operational amplifier U3A in the third main channel circuit is connected with the negative input end of the operational amplifier U3A through a capacitor C3; the output of the operational amplifier U3A is connected to the negative input of the operational amplifier U3B through a resistor R12; the output of the operational amplifier U3A is connected to one input of the multiplier A1 in the auxiliary channel circuit; the positive input end of the operational amplifier U3A is grounded; the negative electrode of the battery pack V1 is connected with the negative input end of the operational amplifier U3A through a resistor R11; the positive electrode of the battery pack V1 is grounded; the output of the operational amplifier U3B is connected to the negative input of the operational amplifier U3B through a resistor R13; the positive input end of the operational amplifier U3B is grounded; the positive power supply end of the operational amplifier U3B is connected with a direct-current voltage source VCC; the negative power supply of the operational amplifier U3B is connected to the DC voltage source VDD.
5. The output of the multiplier A1 in the auxiliary channel circuit is connected with the negative input end of an operational amplifier U2A in the second main channel circuit through a resistor R5; the output of the multiplier A2 is connected with the negative input end of an operational amplifier U3A in the third main channel circuit through a resistor R10; the output of multiplier a2 is connected to one input of multiplier A3; the output of the multiplier A3 is connected with the negative input end of the operational amplifier U1A in the first main channel circuit through a resistor R1; the output of multiplier A3 is connected to one input of multiplier a 4; the output of multiplier a4 is connected through resistor R9 to the negative input of operational amplifier U3A in the third main channel circuit.
Drawings
Fig. 1 is a schematic diagram of a circuit connection structure according to a preferred embodiment of the present invention.
FIG. 2 is an X-Y phase diagram of the present invention.
FIG. 3 is a Y-Z phase diagram of the present invention.
Detailed Description
The modifications to the invention will be described in further detail below with reference to the drawings and preferred embodiments, see fig. 1-3.
1. A construction method of a generalized Sprotet-A system with double cluster conservative chaotic streams is characterized by comprising the following steps:
(1) a generalized Sprott-A system with double cluster conservative chaotic streams (i) is as follows:
wherein x, y and z are state variables;
(2) a circuit constructed in accordance with system (i) wherein the circuit is comprised of three main channel circuits and one auxiliary channel circuit: the first main channel circuit consists of a direct-current voltage source VCC, a direct-current voltage source VDD, an operational amplifier U1A, an operational amplifier U1B, a resistor R1, a resistor R2, a resistor R3, a resistor R4 and a capacitor C1; the second main channel circuit consists of a direct-current voltage source VCC, a direct-current voltage source VDD, an operational amplifier U2A, an operational amplifier U2B, a resistor R5, a resistor R6, a resistor R7, a resistor R8 and a capacitor C2; the third main channel circuit consists of a direct-current voltage source VCC, a direct-current voltage source VDD, a battery pack V1, an operational amplifier U3A, an operational amplifier U3B, a resistor R9, a resistor R10, a resistor R11, a resistor R12, a resistor R13 and a capacitor C3; the auxiliary channel circuit is composed of a multiplier A1, a multiplier A2, a multiplier A3 and a multiplier A4.
2. The output of the operational amplifier U1A in the first main channel circuit is connected with the negative input end of the operational amplifier U1A through a capacitor C1; the output of the operational amplifier U1A is connected to the negative input of the operational amplifier U1B through a resistor R3; the output of the operational amplifier U1A is connected to the negative input of the operational amplifier U2A in the second main channel circuit through a resistor R6; the positive input end of the operational amplifier U1A is grounded; the output of the operational amplifier U1B is connected to the negative input of the operational amplifier U1B through a resistor R4; the positive input end of the operational amplifier U1B is grounded; the positive power supply end of the operational amplifier U1B is connected with a direct-current voltage source VCC; the negative power supply of the operational amplifier U1B is connected to the DC voltage source VDD.
3. The output of the operational amplifier U2A in the second main channel circuit is connected with the negative input end of the operational amplifier U2A through a capacitor C2; the output of the operational amplifier U2A is connected to the negative input of the operational amplifier U2B through a resistor R7; the output of the operational amplifier U2A is connected to the negative input of the operational amplifier U1A in the first main channel circuit through a resistor R2; the output of the operational amplifier U2A is connected to one input of the multiplier A2 in the auxiliary channel circuit; the output of the operational amplifier U2A is connected to one input of the multiplier A3 in the auxiliary channel circuit; the positive input end of the operational amplifier U2A is grounded; the output of the operational amplifier U2B is connected to the negative input of the operational amplifier U2B through a resistor R8; the output of the operational amplifier U2B is connected to one input of the multiplier A1 in the auxiliary channel circuit; the output of the operational amplifier U2B is connected to one input of the multiplier A2 in the auxiliary channel circuit; the output of the operational amplifier U2B is connected to one input of the multiplier A4 in the auxiliary channel circuit; the positive input end of the operational amplifier U2B is grounded; the positive power supply end of the operational amplifier U2B is connected with a direct current voltage source VCC; the negative power supply of the operational amplifier U2B is connected to the DC voltage source VDD.
4. The output of the operational amplifier U3A in the third main channel circuit is connected with the negative input end of the operational amplifier U3A through a capacitor C3; the output of the operational amplifier U3A is connected to the negative input of the operational amplifier U3B through a resistor R12; the output of the operational amplifier U3A is connected to one input of the multiplier A1 in the auxiliary channel circuit; the positive input end of the operational amplifier U3A is grounded; the negative electrode of the battery pack V1 is connected with the negative input end of the operational amplifier U3A through a resistor R11; the positive electrode of the battery pack V1 is grounded; the output of the operational amplifier U3B is connected to the negative input of the operational amplifier U3B through a resistor R13; the positive input end of the operational amplifier U3B is grounded; the positive power supply end of the operational amplifier U3B is connected with a direct-current voltage source VCC; the negative power supply of the operational amplifier U3B is connected to the DC voltage source VDD.
5. The output of the multiplier A1 in the auxiliary channel circuit is connected with the negative input end of an operational amplifier U2A in the second main channel circuit through a resistor R5; the output of the multiplier A2 is connected with the negative input end of an operational amplifier U3A in the third main channel circuit through a resistor R10; the output of multiplier a2 is connected to one input of multiplier A3; the output of the multiplier A3 is connected with the negative input end of the operational amplifier U1A in the first main channel circuit through a resistor R1; the output of multiplier A3 is connected to one input of multiplier a 4; the output of multiplier a4 is connected through resistor R9 to the negative input of operational amplifier U3A in the third main channel circuit.
It is to be understood that the above description is not intended to limit the invention, and the invention is not limited to the above examples, and that various changes, modifications, additions and substitutions which may be made by one skilled in the art within the spirit and scope of the invention are included therein.
Claims (1)
1. A construction method of a generalized Sprotet-A system with double cluster conservative chaotic streams is characterized by comprising the following steps:
(1) a generalized Sprott-A system with double cluster conservative chaotic streams (i) is as follows:
wherein x, y and z are state variables;
(2) the circuit constructed based on system (i) consists of three main channel circuits and one auxiliary channel circuit: the first main channel circuit consists of a direct-current voltage source VCC, a direct-current voltage source VDD, an operational amplifier U1A, an operational amplifier U1B, a resistor R1, a resistor R2, a resistor R3, a resistor R4 and a capacitor C1; the second main channel circuit consists of a direct-current voltage source VCC, a direct-current voltage source VDD, an operational amplifier U2A, an operational amplifier U2B, a resistor R5, a resistor R6, a resistor R7, a resistor R8 and a capacitor C2; the third main channel circuit consists of a direct-current voltage source VCC, a direct-current voltage source VDD, a battery pack V1, an operational amplifier U3A, an operational amplifier U3B, a resistor R9, a resistor R10, a resistor R11, a resistor R12, a resistor R13 and a capacitor C3; the auxiliary channel circuit consists of a multiplier A1, a multiplier A2, a multiplier A3 and a multiplier A4;
the output of the operational amplifier U1A in the first main channel circuit is connected with the negative input end of the operational amplifier U1A through a capacitor C1; the output of the operational amplifier U1A is connected to the negative input of the operational amplifier U1B through a resistor R3; the output of the operational amplifier U1A is connected to the negative input of the operational amplifier U2A in the second main channel circuit through a resistor R6; the positive input end of the operational amplifier U1A is grounded; the output of the operational amplifier U1B is connected to the negative input of the operational amplifier U1B through a resistor R4; the positive input end of the operational amplifier U1B is grounded; the positive power supply end of the operational amplifier U1B is connected with a direct-current voltage source VCC; the negative power supply end of the operational amplifier U1B is connected with a direct-current voltage source VDD;
the output of the operational amplifier U2A in the second main channel circuit is connected with the negative input end of the operational amplifier U2A through a capacitor C2; the output of the operational amplifier U2A is connected to the negative input of the operational amplifier U2B through a resistor R7; the output of the operational amplifier U2A is connected to the negative input of the operational amplifier U1A in the first main channel circuit through a resistor R2; the output of the operational amplifier U2A is connected to one input of the multiplier A2 in the auxiliary channel circuit; the output of the operational amplifier U2A is connected to one input of the multiplier A3 in the auxiliary channel circuit; the positive input end of the operational amplifier U2A is grounded; the output of the operational amplifier U2B is connected to the negative input of the operational amplifier U2B through a resistor R8; the output of the operational amplifier U2B is connected to one input of the multiplier A1 in the auxiliary channel circuit; the output of the operational amplifier U2B is connected to one input of the multiplier A2 in the auxiliary channel circuit; the output of the operational amplifier U2B is connected to one input of the multiplier A4 in the auxiliary channel circuit; the positive input end of the operational amplifier U2B is grounded; the positive power supply end of the operational amplifier U2B is connected with a direct-current voltage source VCC; the negative power supply end of the operational amplifier U2B is connected with a direct-current voltage source VDD;
the output of the operational amplifier U3A in the third main channel circuit is connected with the negative input end of the operational amplifier U3A through a capacitor C3; the output of the operational amplifier U3A is connected to the negative input of the operational amplifier U3B through a resistor R12; the output of the operational amplifier U3A is connected to one input of the multiplier A1 in the auxiliary channel circuit; the positive input end of the operational amplifier U3A is grounded; the negative electrode of the battery pack V1 is connected with the negative input end of the operational amplifier U3A through a resistor R11; the positive electrode of the battery pack V1 is grounded; the output of the operational amplifier U3B is connected to the negative input of the operational amplifier U3B through a resistor R13; the positive input end of the operational amplifier U3B is grounded; the positive power supply end of the operational amplifier U3B is connected with a direct-current voltage source VCC; the negative power supply of the operational amplifier U3B is connected with a direct-current voltage source VDD;
the output of the multiplier A1 in the auxiliary channel circuit is connected with the negative input end of an operational amplifier U2A in the second main channel circuit through a resistor R5; the output of the multiplier A2 is connected with the negative input end of an operational amplifier U3A in the third main channel circuit through a resistor R10; the output of multiplier a2 is connected to one input of multiplier A3; the output of the multiplier A3 is connected with the negative input end of the operational amplifier U1A in the first main channel circuit through a resistor R1; the output of multiplier A3 is connected to one input of multiplier a 4; the output of multiplier a4 is connected through resistor R9 to the negative input of operational amplifier U3A in the third main channel circuit.
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- 2019-08-23 CN CN201910782096.4A patent/CN112422262B/en not_active Expired - Fee Related
Patent Citations (5)
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| CN103066922A (en) * | 2012-12-17 | 2013-04-24 | 常州大学 | Memory system chaotic signal generator |
| WO2016029616A1 (en) * | 2014-08-31 | 2016-03-03 | 王忠林 | Non-equilibrium four-dimensional hyperchaotic system and analog circuit, based on five simplest chaotic systems |
| WO2016033917A1 (en) * | 2014-09-02 | 2016-03-10 | 王忠林 | Circuit design for universal chaotic system |
| CN107359980A (en) * | 2017-07-31 | 2017-11-17 | 哈尔滨理工大学 | A kind of sextuple Fractional Order Hyperchaotic system and chaos signal generator design |
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