CN112422766B - Generalized Sprott-A system with three-dimensional 2 x 1 cluster conservative chaotic stream and circuit implementation thereof - Google Patents
Generalized Sprott-A system with three-dimensional 2 x 1 cluster conservative chaotic stream and circuit implementation thereof Download PDFInfo
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- CN112422766B CN112422766B CN201910782053.6A CN201910782053A CN112422766B CN 112422766 B CN112422766 B CN 112422766B CN 201910782053 A CN201910782053 A CN 201910782053A CN 112422766 B CN112422766 B CN 112422766B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
- H04N1/44—Secrecy systems
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/34—Negative-feedback-circuit arrangements with or without positive feedback
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/68—Combinations of amplifiers, e.g. multi-channel amplifiers for stereophonics
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/001—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols using chaotic signals
Abstract
The invention relates to a generalized Sprotet-A system and a circuit with three-dimensional 2 x 1 cluster conservative chaotic streams, wherein the circuit consists of three main channel circuits and two auxiliary channel circuits: the first main channel circuit consists of a direct current voltage source, an operational amplifier, a resistor and a capacitor; the second main channel circuit consists of a direct current voltage source, an operational amplifier, a resistor and a capacitor; the third main channel circuit consists of a direct-current voltage source, a battery pack, an operational amplifier, a resistor and a capacitor; the first auxiliary channel circuit is composed of a multiplier; the second auxiliary channel circuit is composed of a multiplier. The invention provides a generalized Sprott-A system with three-dimensional 2 x 1 cluster conservative chaotic streams and a circuit implementation of the system. The new system has the complex dynamics of phase volume conservation, and has more advantages in encryption algorithm and key construction. The system has potential application value in the field of secret communication.
Description
Technical Field
The invention relates to a system capable of generating chaotic streams and a circuit implementation thereof, in particular to a generalized Sprott-A system with three-dimensional 2 x 1 cluster conservative chaotic streams and a circuit implementation thereof.
Background
Chaotic encryption is a new subject in the research of the field of image encryption, and with the deep research of the chaotic theory, the image encryption technology based on a chaotic system is continuously emerging, and the existing chaotic encryption technology can be divided into: chaos covering, chaos parameter modulation, chaos spread spectrum and chaos keying. However, most of the chaotic systems applied to encryption are dissipative chaotic systems, and due to the fact that the dissipative systems have chaotic attractors and the like, an attacker can steal a small segment of a chaotic sequence to carry out phase space reconstruction, so that deciphering is realized, and potential safety hazards exist. The conservative chaotic system has no attractor in the general sense, has stronger randomness, is more difficult to predict and is safer. The invention provides a generalized Sprott-A system with three-dimensional 2 x 1 cluster conservative chaotic streams. The new system has a conservative phase volume and can generate complex dynamics with 2 multiplied by 1 cluster of conservative chaotic streams, and has more advantages in encryption algorithm and key construction. The system has potential application value in the field of secret communication.
Disclosure of Invention
The invention aims to provide a generalized Sprotet-A system and a circuit with three-dimensional 2 x 1 cluster conservative chaotic current, wherein the generalized Sprotet-A system comprises:
1. A construction method of a generalized Sprotet-A system with a three-dimensional 2 x 1 cluster conservative chaotic stream is characterized by comprising the following steps of:
(1) generalized Sprotet-A system (i) with three-dimensional 2X 1 cluster conservative chaotic stream
In the formula, X, Y and Z are state variables, the projection of a three-dimensional phase diagram of the system on an X-Y plane is 2 multiplied by 2 cluster conservative chaotic streams, and the projection on the X-Z, Y-Z plane is 2 multiplied by 1 cluster conservative chaotic streams.
(2) A circuit constructed in accordance with system (i) wherein the circuit is comprised of three main channel circuits and two auxiliary channel circuits: the first main channel circuit consists of a direct-current voltage source VCC, a direct-current voltage source VDD, an operational amplifier U1A, an operational amplifier U1B, a resistor R1, a resistor R2, a resistor R3, a resistor R4 and a capacitor C1; the second main channel circuit consists of a direct current voltage source VCC, a direct current voltage source VDD, an operational amplifier U2A, an operational amplifier U2B, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R14 and a capacitor C2; the third main channel circuit consists of a direct-current voltage source VCC, a direct-current voltage source VDD, a battery pack V1, an operational amplifier U3A, an operational amplifier U3B, a resistor R9, a resistor R10, a resistor R11, a resistor R12, a resistor R13 and a capacitor C3; the first auxiliary channel circuit is composed of a multiplier A1, a multiplier A2, a multiplier A3 and a multiplier A4; the second auxiliary channel circuit is composed of multiplier a5 and multiplier a 6.
2. The output of the operational amplifier U1A in the first main channel circuit is connected with the negative input end of the operational amplifier U1A through a capacitor C1; the output of the operational amplifier U1A is connected to the negative input of the operational amplifier U1B through a resistor R3; the output of the operational amplifier U1A is respectively connected with two input ends of a multiplier A5 in the second auxiliary channel circuit; the output of the operational amplifier U1A is connected to one input of the multiplier A6 in the second auxiliary channel circuit; the positive input end of the operational amplifier U1A is grounded; the output of the operational amplifier U1B is connected to the negative input of the operational amplifier U1B through a resistor R4; the output of the operational amplifier U1B is connected to the negative input of the operational amplifier U2A in the second main channel circuit through a resistor R6; the positive input end of the operational amplifier U1B is grounded; the positive power supply end of the operational amplifier U1B is connected with a direct-current voltage source VCC; the negative power supply of the operational amplifier U1B is connected to the DC voltage source VDD.
3. The output of the operational amplifier U2A in the second main channel circuit is connected with the negative input end of the operational amplifier U2A through a capacitor C2; the output of the operational amplifier U2A is connected to the negative input of the operational amplifier U2B through a resistor R7; the output of the operational amplifier U2A is connected to the negative input of the operational amplifier U1A in the first main channel circuit through a resistor R2; the output of the operational amplifier U2A is connected to one input of the multiplier A2 in the first auxiliary channel circuit; the output of the operational amplifier U2A is connected to one input of the multiplier A3 in the first auxiliary channel circuit; the positive input end of the operational amplifier U2A is grounded; the output of the operational amplifier U2B is connected to the negative input of the operational amplifier U2B through a resistor R8; the output of the operational amplifier U2B is connected to one input of the multiplier A1 in the first auxiliary channel circuit; the output of the operational amplifier U2B is connected to one input of the multiplier A2 in the first auxiliary channel circuit; the output of the operational amplifier U2B is connected to one input of the multiplier A4 in the first auxiliary channel circuit; the positive input end of the operational amplifier U2B is grounded; the positive power supply end of the operational amplifier U2B is connected with a direct-current voltage source VCC; the negative power supply of the operational amplifier U2B is connected to the DC voltage source VDD.
4. The output of the operational amplifier U3A in the third main channel circuit is connected with the negative input end of the operational amplifier U3A through a capacitor C3; the output of the operational amplifier U3A is connected to the negative input of the operational amplifier U3B through a resistor R12; the output of the operational amplifier U3A is connected to one input of the multiplier A1 in the first auxiliary channel circuit; the positive input end of the operational amplifier U3A is grounded; the negative electrode of the battery pack V1 is connected with the negative input end of the operational amplifier U3A through a resistor R11; the positive electrode of the battery pack V1 is grounded; the output of the operational amplifier U3B is connected to the negative input of the operational amplifier U3B through a resistor R13; the positive input end of the operational amplifier U3B is grounded; the positive power supply end of the operational amplifier U3B is connected with a direct-current voltage source VCC; the negative power supply of the operational amplifier U3B is connected to the DC voltage source VDD.
5. The output of the multiplier A1 in the first auxiliary channel circuit is connected with the negative input end of the operational amplifier U2A in the second main channel circuit through a resistor R5; the output of the multiplier A2 in the first auxiliary channel circuit is connected with the negative input end of the operational amplifier U3A in the third main channel circuit through a resistor R10; the output of the multiplier a2 in the first auxiliary channel circuit is connected to one input of the multiplier A3 in the first auxiliary channel circuit; the output of the multiplier A3 in the first auxiliary channel circuit is connected with the negative input end of the operational amplifier U1A in the first main channel circuit through a resistor R1; the output of the multiplier A3 in the first auxiliary channel circuit is connected to one input of the multiplier a4 in the first auxiliary channel circuit; the output of the multiplier a4 in the first auxiliary channel circuit is connected to the negative input of the operational amplifier U3A in the third main channel circuit through resistor R9.
6. The output of the multiplier A5 in the second auxiliary channel circuit is connected to one input of the multiplier A6 in the second auxiliary channel circuit; the output of the multiplier a6 in the second auxiliary channel circuit is connected to the negative input of the operational amplifier U2A in the second main channel circuit through resistor R14.
Drawings
Fig. 1 is a schematic diagram of a circuit connection structure according to a preferred embodiment of the present invention.
FIG. 2 is an X-Y phase diagram of the present invention.
FIG. 3 is an X-Z phase diagram of the present invention.
FIG. 4 is a Y-Z phase diagram of the present invention.
Detailed Description
The modifications to the invention will be described in further detail below with reference to the drawings and preferred embodiments, and with reference to fig. 1-4.
1. A construction method of a generalized Sprotet-A system with three-dimensional 2 x 1 cluster conservative chaotic streams is characterized by comprising the following steps:
(1) generalized Sprott-A system (i) with three-dimensional 2 x 1 cluster conservative chaotic stream
In the formula, X, Y and Z are state variables, the projection of a three-dimensional phase diagram of the system on an X-Y plane is 2 multiplied by 2 cluster conservative chaotic streams, and the projection on the X-Z, Y-Z plane is 2 multiplied by 1 cluster conservative chaotic streams.
(2) A circuit constructed in accordance with system (i) wherein the circuit is comprised of three main channel circuits and two auxiliary channel circuits: the first main channel circuit consists of a direct-current voltage source VCC, a direct-current voltage source VDD, an operational amplifier U1A, an operational amplifier U1B, a resistor R1, a resistor R2, a resistor R3, a resistor R4 and a capacitor C1; the second main channel circuit consists of a direct current voltage source VCC, a direct current voltage source VDD, an operational amplifier U2A, an operational amplifier U2B, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R14 and a capacitor C2; the third main channel circuit consists of a direct-current voltage source VCC, a direct-current voltage source VDD, a battery pack V1, an operational amplifier U3A, an operational amplifier U3B, a resistor R9, a resistor R10, a resistor R11, a resistor R12, a resistor R13 and a capacitor C3; the first auxiliary channel circuit is composed of a multiplier A1, a multiplier A2, a multiplier A3 and a multiplier A4; the second auxiliary channel circuit is composed of multiplier a5 and multiplier a 6.
2. The output of the operational amplifier U1A in the first main channel circuit is connected with the negative input end of the operational amplifier U1A through a capacitor C1; the output of the operational amplifier U1A is connected to the negative input of the operational amplifier U1B through a resistor R3; the output of the operational amplifier U1A is respectively connected with two input ends of a multiplier A5 in the second auxiliary channel circuit; the output of the operational amplifier U1A is connected to one input of the multiplier A6 in the second auxiliary channel circuit; the positive input end of the operational amplifier U1A is grounded; the output of the operational amplifier U1B is connected to the negative input of the operational amplifier U1B through a resistor R4; the output of the operational amplifier U1B is connected to the negative input of the operational amplifier U2A in the second main channel circuit through a resistor R6; the positive input end of the operational amplifier U1B is grounded; the positive power supply end of the operational amplifier U1B is connected with a direct-current voltage source VCC; the negative power supply of the operational amplifier U1B is connected to the DC voltage source VDD.
3. The output of the operational amplifier U2A in the second main channel circuit is connected with the negative input end of the operational amplifier U2A through a capacitor C2; the output of the operational amplifier U2A is connected to the negative input of the operational amplifier U2B through a resistor R7; the output of the operational amplifier U2A is connected to the negative input of the operational amplifier U1A in the first main channel circuit through a resistor R2; the output of the operational amplifier U2A is connected to one input of the multiplier A2 in the first auxiliary channel circuit; the output of the operational amplifier U2A is connected to one input of the multiplier A3 in the first auxiliary channel circuit; the positive input end of the operational amplifier U2A is grounded; the output of the operational amplifier U2B is connected to the negative input of the operational amplifier U2B through a resistor R8; the output of the operational amplifier U2B is connected to one input of the multiplier A1 in the first auxiliary channel circuit; the output of the operational amplifier U2B is connected to one input of the multiplier A2 in the first auxiliary channel circuit; the output of the operational amplifier U2B is connected to one input of the multiplier A4 in the first auxiliary channel circuit; the positive input end of the operational amplifier U2B is grounded; the positive power supply end of the operational amplifier U2B is connected with a direct-current voltage source VCC; the negative power supply of the operational amplifier U2B is connected to the DC voltage source VDD.
4. The output of the operational amplifier U3A in the third main channel circuit is connected with the negative input end of the operational amplifier U3A through a capacitor C3; the output of the operational amplifier U3A is connected to the negative input of the operational amplifier U3B through a resistor R12; the output of the operational amplifier U3A is connected to one input of the multiplier a1 in the first auxiliary channel circuit; the positive input end of the operational amplifier U3A is grounded; the negative electrode of the battery pack V1 is connected with the negative input end of the operational amplifier U3A through a resistor R11; the positive electrode of the battery pack V1 is grounded; the output of the operational amplifier U3B is connected to the negative input of the operational amplifier U3B through a resistor R13; the positive input end of the operational amplifier U3B is grounded; the positive power supply end of the operational amplifier U3B is connected with a direct-current voltage source VCC; the negative power supply of the operational amplifier U3B is connected to the DC voltage source VDD.
5. The output of the multiplier A1 in the first auxiliary channel circuit is connected with the negative input end of the operational amplifier U2A in the second main channel circuit through a resistor R5; the output of the multiplier A2 in the first auxiliary channel circuit is connected with the negative input end of the operational amplifier U3A in the third main channel circuit through a resistor R10; the output of the multiplier a2 in the first auxiliary channel circuit is connected to one input of the multiplier A3 in the first auxiliary channel circuit; the output of the multiplier A3 in the first auxiliary channel circuit is connected with the negative input end of the operational amplifier U1A in the first main channel circuit through a resistor R1; the output of the multiplier A3 in the first auxiliary channel circuit is connected to one input of the multiplier a4 in the first auxiliary channel circuit; the output of the multiplier a4 in the first auxiliary channel circuit is connected to the negative input of the operational amplifier U3A in the third main channel circuit through resistor R9.
6. The output of the multiplier A5 in the second auxiliary channel circuit is connected with one input end of a multiplier A6 in the second auxiliary channel circuit; the output of the multiplier a6 in the second auxiliary channel circuit is connected to the negative input of the operational amplifier U2A in the second main channel circuit through resistor R14.
It is to be understood that the above description is not intended to limit the invention, and the invention is not limited to the above examples, and that various changes, modifications, additions and substitutions which may be made by one skilled in the art within the spirit and scope of the invention are included therein.
Claims (1)
1. A construction method of a generalized Sprotet-A system with three-dimensional 2 x 1 cluster conservative chaotic streams is characterized by comprising the following steps:
(1) a generalized Sprotet-A system (i) with three-dimensional 2 x 1 cluster conservative chaotic streams is as follows:
in the formula, X, Y and Z are state variables, the projection of a three-dimensional phase diagram of the system on an X-Y plane is 2 multiplied by 2 cluster conservative chaotic streams, and the projection on the X-Z, Y-Z plane is 2 multiplied by 1 cluster conservative chaotic streams;
(2) the circuit constructed based on system (i) consists of three main channel circuits and two auxiliary channel circuits: the first main channel circuit consists of a direct-current voltage source VCC, a direct-current voltage source VDD, an operational amplifier U1A, an operational amplifier U1B, a resistor R1, a resistor R2, a resistor R3, a resistor R4 and a capacitor C1; the second main channel circuit consists of a direct current voltage source VCC, a direct current voltage source VDD, an operational amplifier U2A, an operational amplifier U2B, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R14 and a capacitor C2; the third main channel circuit consists of a direct-current voltage source VCC, a direct-current voltage source VDD, a battery pack V1, an operational amplifier U3A, an operational amplifier U3B, a resistor R9, a resistor R10, a resistor R11, a resistor R12, a resistor R13 and a capacitor C3; the first auxiliary channel circuit is composed of a multiplier A1, a multiplier A2, a multiplier A3 and a multiplier A4; the second auxiliary channel circuit consists of a multiplier A5 and a multiplier A6;
The output of the operational amplifier U1A in the first main channel circuit is connected with the negative input end of the operational amplifier U1A through a capacitor C1; the output of the operational amplifier U1A is connected to the negative input of the operational amplifier U1B through a resistor R3; the output of the operational amplifier U1A is respectively connected with two input ends of a multiplier A5 in the second auxiliary channel circuit; the output of the operational amplifier U1A is connected to one input of the multiplier A6 in the second auxiliary channel circuit; the positive input end of the operational amplifier U1A is grounded; the output of the operational amplifier U1B is connected to the negative input of the operational amplifier U1B through a resistor R4; the output of the operational amplifier U1B is connected to the negative input of the operational amplifier U2A in the second main channel circuit through a resistor R6; the positive input end of the operational amplifier U1B is grounded; the positive power supply end of the operational amplifier U1B is connected with a direct-current voltage source VCC; the negative power supply end of the operational amplifier U1B is connected with a direct-current voltage source VDD;
the output of the operational amplifier U2A in the second main channel circuit is connected with the negative input end of the operational amplifier U2A through a capacitor C2; the output of the operational amplifier U2A is connected to the negative input of the operational amplifier U2B through a resistor R7; the output of the operational amplifier U2A is connected to the negative input of the operational amplifier U1A in the first main channel circuit through a resistor R2; the output of the operational amplifier U2A is connected to one input of the multiplier A2 in the first auxiliary channel circuit; the output of the operational amplifier U2A is connected to one input of the multiplier A3 in the first auxiliary channel circuit; the positive input end of the operational amplifier U2A is grounded; the output of the operational amplifier U2B is connected to the negative input of the operational amplifier U2B through a resistor R8; the output of the operational amplifier U2B is connected to one input of the multiplier A1 in the first auxiliary channel circuit; the output of the operational amplifier U2B is connected to one input of the multiplier A2 in the first auxiliary channel circuit; the output of the operational amplifier U2B is connected to one input of the multiplier A4 in the first auxiliary channel circuit; the positive input end of the operational amplifier U2B is grounded; the positive power supply end of the operational amplifier U2B is connected with a direct-current voltage source VCC; the negative power supply end of the operational amplifier U2B is connected with a direct-current voltage source VDD;
The output of the operational amplifier U3A in the third main channel circuit is connected with the negative input end of the operational amplifier U3A through a capacitor C3; the output of the operational amplifier U3A is connected to the negative input of the operational amplifier U3B through a resistor R12; the output of the operational amplifier U3A is connected to one input of the multiplier A1 in the first auxiliary channel circuit; the positive input end of the operational amplifier U3A is grounded; the negative electrode of the battery pack V1 is connected with the negative input end of the operational amplifier U3A through a resistor R11; the positive electrode of the battery pack V1 is grounded; the output of the operational amplifier U3B is connected to the negative input of the operational amplifier U3B through a resistor R13; the positive input end of the operational amplifier U3B is grounded; the positive power supply end of the operational amplifier U3B is connected with a direct-current voltage source VCC; the negative power supply end of the operational amplifier U3B is connected with a direct-current voltage source VDD;
the output of the multiplier A1 in the first auxiliary channel circuit is connected with the negative input end of the operational amplifier U2A in the second main channel circuit through a resistor R5; the output of the multiplier A2 in the first auxiliary channel circuit is connected with the negative input end of the operational amplifier U3A in the third main channel circuit through a resistor R10; the output of the multiplier a2 in the first auxiliary channel circuit is connected to one input of the multiplier A3 in the first auxiliary channel circuit; the output of the multiplier A3 in the first auxiliary channel circuit is connected with the negative input end of the operational amplifier U1A in the first main channel circuit through a resistor R1; the output of the multiplier A3 in the first auxiliary channel circuit is connected to one input of the multiplier a4 in the first auxiliary channel circuit; the output of the multiplier A4 in the first auxiliary channel circuit is connected with the negative input end of the operational amplifier U3A in the third main channel circuit through a resistor R9;
The output of the multiplier A5 in the second auxiliary channel circuit is connected with one input end of a multiplier A6 in the second auxiliary channel circuit; the output of the multiplier a6 in the second auxiliary channel circuit is connected to the negative input of the operational amplifier U2A in the second main channel circuit through resistor R14.
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| WO2016029616A1 (en) * | 2014-08-31 | 2016-03-03 | 王忠林 | Non-equilibrium four-dimensional hyperchaotic system and analog circuit, based on five simplest chaotic systems |
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| WO2016029616A1 (en) * | 2014-08-31 | 2016-03-03 | 王忠林 | Non-equilibrium four-dimensional hyperchaotic system and analog circuit, based on five simplest chaotic systems |
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