CN107958848B - Method for manufacturing laminated chip - Google Patents

Method for manufacturing laminated chip Download PDF

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Publication number
CN107958848B
CN107958848B CN201710945668.7A CN201710945668A CN107958848B CN 107958848 B CN107958848 B CN 107958848B CN 201710945668 A CN201710945668 A CN 201710945668A CN 107958848 B CN107958848 B CN 107958848B
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wafer
chip
chips
thickness
grinding
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CN107958848A (en
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中村胜
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Disco Corp
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Disco Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/52—Mounting semiconductor bodies in containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10—Measuring as part of the manufacturing process
    • H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Grinding Of Cylindrical And Plane Surfaces (AREA)
  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
  • Dicing (AREA)

Abstract

Provided is a method for manufacturing a laminated chip, which can manufacture a laminated chip with a prescribed thickness. A method for manufacturing a laminated chip, which is formed by laminating a plurality of chips, includes the steps of: a chip forming step of grinding the back surface of the wafer to thin the wafer and dividing the wafer into a plurality of chips; a measurement step of measuring the thickness of each chip obtained by the chip forming step; and a chip stacking step of selecting a plurality of chips to be stacked so as to have a predetermined thickness when the plurality of chips are stacked, based on the thickness of each chip measured in the measuring step.

Description

Method for manufacturing laminated chip
Technical Field
The present invention relates to a method for manufacturing a laminated chip formed by laminating a plurality of chips.
Background
In order to further reduce the size and increase the integration of semiconductor devices, three-dimensional mounting techniques have been put into practical use in which a plurality of semiconductor chips are stacked in the thickness direction and connected by through-electrodes (TSV Through Silicon Via: through-silicon via) or the like. In the present technique, the number of steps taken in the process, in order to suppress the thickness of the finally manufactured laminated chip, a semiconductor chip thinned by grinding or the like is used.
However, when there is a variation in the thickness of the semiconductor chips constituting the stacked chip, it is difficult to form the stacked chip in conformity with a predetermined thickness. Thus, the following method is proposed: before a wafer as a semiconductor chip is thinned by a method such as grinding, a resin layer on the front side is planarized to suppress variation in thickness due to grinding (for example, refer to patent document 1).
Patent document 1: japanese patent laid-open No. 2008-182015
However, in the above-described method, since a cutting device (tool cutting device) for cutting a tool is required to be prepared separately from the grinding device, the manufacturing cost is liable to be high. Also, the thickness variation cannot be completely suppressed by this method.
Disclosure of Invention
The present invention has been made in view of the above-described problems, and an object thereof is to provide a method for manufacturing a laminated chip, which can manufacture a laminated chip having a thickness consistent with a predetermined thickness.
According to one aspect of the present invention, there is provided a method for manufacturing a laminated chip including a plurality of chips, the method including: a chip forming step of grinding the back surface of the wafer to thin the wafer and dividing the wafer into a plurality of chips; a measurement step of measuring the thickness of each chip obtained by the chip forming step; and a chip stacking step of selecting a plurality of chips to be stacked so as to have a predetermined thickness when the plurality of chips are stacked, based on the thickness of each chip measured by the measuring step.
In one embodiment of the present invention, in the chip forming step, after the dividing structure is formed in the wafer along the intersecting plural dividing lines, the wafer is thinned by grinding the back surface of the wafer, thereby dividing the wafer into the plural chips.
In the method for manufacturing a laminated chip according to one embodiment of the present invention, a plurality of chips to be laminated are selected and laminated so as to have a predetermined thickness when the plurality of chips are laminated, so that a laminated chip having a thickness corresponding to the predetermined thickness can be manufactured.
Drawings
Fig. 1 is a perspective view schematically showing a structural example of a wafer.
Fig. 2 (a) is a partially cross-sectional side view schematically showing a case where grooves for dicing are formed on the front side of the wafer in the chip forming step, and fig. 2 (B) is a partially cross-sectional side view schematically showing a case where the back side of the wafer is ground in the chip forming step.
Fig. 3 (a) is a perspective view schematically showing a wafer divided into a plurality of chips, and fig. 3 (B) is a partially cross-sectional side view schematically showing a case where the thickness of each chip is measured in a measurement step.
Fig. 4 (a) is a side view schematically showing a plurality of chips selected in the chip stacking step, and fig. 4 (B) is a side view schematically showing a case where a plurality of chips are stacked in the chip stacking step.
Description of the reference numerals
11: a wafer; 11a: a front face; 11b: a back surface; 13: dividing the predetermined line (spacer); 15: a device; 17: a groove for division (a structure for division); 19. 19a, 19b, 19c: a chip; 21: a protection member; 21a: a front face; 21b: a back surface; 31: laminating the chips; 2: a cutting device; 4: a chuck table; 4a: a holding surface; 6: a cutting unit; 8: a main shaft; 10: a cutting tool; 22: a grinding device; 24: a chuck table; 24a: a holding surface; 26: a grinding unit; 28: a main shaft; 30: a mounting base; 32: grinding the grinding wheel; 34: a grinding wheel base; 36: grinding tool; 38: thickness measurer.
Detailed Description
An embodiment of the present invention will be described with reference to the drawings. The method for manufacturing a laminated chip according to the present embodiment includes a chip forming step (see fig. 2 a, 2B, and 3 a), a measuring step (see fig. 3B), and a chip laminating step (see fig. 4a and 4B).
In the chip forming step, the back surface of the wafer is ground to thin the wafer, and the wafer is divided into a plurality of chips. In the measurement step, the thickness of each chip obtained by the chip forming step is measured. In the chip stacking step, a plurality of chips to be stacked are selected according to the thickness of each chip and stacked. Hereinafter, a method for manufacturing the laminated chip according to the present embodiment will be described in detail.
Fig. 1 is a perspective view schematically showing a configuration example of a wafer used in the present embodiment. As shown in fig. 1, a wafer 11 according to the present embodiment is formed into a disk shape using a semiconductor material such as silicon (Si). The front surface 11a side of the wafer 11 is divided into a plurality of regions by dividing lines (streets) 13 arranged in a lattice pattern, and devices 15 such as ICs and LSIs are formed in each region.
In the present embodiment, the disk-shaped wafer 11 made of a semiconductor material such as silicon is used, but the material, shape, size, structure, and the like of the wafer 11 are not limited. For example, a wafer 11 made of a material such as ceramic, resin, or metal may be used. Also, the kind, number, size, configuration, etc. of the devices 15 are not limited.
In the method of manufacturing a laminated chip according to the present embodiment, first, a chip forming step is performed, and the wafer 11 is divided into a plurality of chips. Fig. 2 (a) is a partially cross-sectional side view schematically showing a case where a groove for dicing (a structure for dicing) is formed on the front side of the wafer in the chip forming step. For example, a groove for dividing is formed using the cutting device 2 shown in fig. 2 (a).
The cutting device 2 has a chuck table 4 for sucking and holding a wafer 11. The chuck table 4 is coupled to a rotation driving source (not shown) such as a motor, and rotates about a rotation axis substantially parallel to the vertical direction. A machining feed mechanism (not shown) is provided below the chuck table 4, and the chuck table 4 is moved in a machining feed direction (horizontal 1 st direction) by the machining feed mechanism.
A part of the upper surface of the chuck table 4 serves as a holding surface 4a for sucking and holding the back surface 11b side of the wafer 11. The holding surface 4a is connected to a suction source (not shown) through a suction path (not shown) formed inside the chuck table 4. By applying negative pressure of the suction source to the holding surface 4a, the wafer 11 is sucked and held on the chuck table 4.
A cutting unit 6 for cutting the wafer 11 is disposed above the chuck table 4. The cutting unit 6 has a main shaft 8 as a rotation axis substantially parallel to the horizontal direction. An annular cutting tool 10 is attached to one end side of the spindle 8. The other end side of the spindle 8 is coupled to a rotary drive source (not shown) such as a motor, and the cutting tool 10 mounted on the spindle 8 is rotated by a force transmitted from the rotary drive source.
The cutting unit 6 is supported by a lifting mechanism (not shown) and an indexing mechanism (not shown), and is moved (lifted) in a vertical direction by the lifting mechanism, and is moved in an indexing direction (horizontal 2 nd direction) perpendicular to the machining feeding direction by the indexing mechanism.
When forming the grooves for dicing by using the cutting device 2, first, the back surface 11b side of the wafer 11 is brought into contact with the holding surface 4a of the chuck table 4, and the negative pressure of the suction source is applied. Thereby, the wafer 11 is held on the chuck table 4 with the front surface 11a exposed upward. In addition, dicing tape or the like may be attached to the back surface 11b of the wafer 11 in advance.
Subsequently, the chuck table 4 is rotated so that the arbitrary line 13 for dividing is parallel to the machine feed direction. Further, the chuck table 4 and the cutting unit 6 are relatively moved to align the cutting tool 10 with an extension line of an arbitrary line 13. Then, the lower end of the rotating cutting tool 10 is lowered to a position lower than the front surface 11a and higher than the rear surface 11b of the wafer 11, and the chuck table 4 is moved in the process feed direction.
Thereby, the cutting tool 10 can be cut into the wafer 11 to form the grooves (structures for division) 17 for division along the lines 13 for dividing the object (half-cut). The above operation is repeated until the grooves 17 for division are formed along all the lines 13 for division.
After the grooves 17 for dicing are formed, the back surface 11b is ground to thin the wafer 11, and the wafer 11 is diced into a plurality of chips. Fig. 2 (B) is a partially cross-sectional side view schematically showing a case where the back surface of the wafer is ground in the chip forming step. For example, the grinding of the rear surface 11B is performed using the grinding device 22 shown in fig. 2 (B).
The grinding device 22 has a chuck table 24 for sucking and holding the wafer 11. The chuck table 24 is coupled to a rotation driving source (not shown) such as a motor, and rotates about a rotation axis substantially parallel to the vertical direction. A moving mechanism (not shown) is provided below the chuck table 24, and the chuck table 24 is moved in the horizontal direction by the moving mechanism.
A part of the upper surface of the chuck table 24 serves as a holding surface 24a for sucking and holding the front surface 11a side of the wafer 11. The holding surface 24a is connected to a suction source (not shown) through a suction path (not shown) formed inside the chuck table 24. By applying negative pressure of the suction source to the holding surface 24a, the wafer 11 is sucked and held on the chuck table 24.
A grinding unit 26 is disposed above the chuck table 24. The grinding unit 26 has a spindle housing (not shown) supported by a lifting mechanism (not shown). A spindle 28 is accommodated in the spindle case, and a disk-shaped mount 30 is fixed to a lower end portion of the spindle 28.
A grinding wheel 32 having substantially the same diameter as the mount 30 is mounted on the lower surface of the mount 30. The grinding wheel 32 has a wheel base 34 formed of a metallic material such as stainless steel, aluminum, or the like. A plurality of grinding tools 36 are annularly arranged on the lower surface of the grinding wheel base 34.
The upper end side (base end side) of the spindle 28 is coupled to a rotation drive source (not shown) such as a motor, and the grinding wheel 32 rotates about a rotation axis substantially parallel to the vertical direction by a force transmitted from the rotation drive source. A nozzle (not shown) for supplying a grinding fluid such as pure water to the wafer 11 or the like is provided in or near the grinding unit 26.
Before the back surface 11b of the wafer 11 is ground by the grinding device 22, a protective member is attached to the front surface 11a side of the wafer 11. The protective member 21 is, for example, a circular film (tape) having the same diameter as the wafer 11, and a paste layer having adhesive force is provided on the front surface 21a side thereof.
Therefore, if the front surface 21a side of the protective member 21 is brought into close contact with the front surface 11a side of the workpiece 11, the protective member 21 can be attached to the front surface 11a side of the workpiece 11. By attaching the protection member 21 to the front surface 11a side of the workpiece 11, the impact applied during grinding or the like can be relaxed, and the device 15 or the like formed on the front surface 11a side of the wafer 11 can be protected. In addition, in the case where dicing tape or the like is attached to the back surface 11b of the wafer 11, they are removed in advance.
After the protective member 21 is attached to the front surface 11a side of the wafer 11, the back surface 21b of the protective member 21 attached to the wafer 11 is brought into contact with the holding surface 24a of the chuck table 24, and negative pressure of the suction source is applied. Thus, the wafer 11 is sucked and held on the chuck table 24 with the back surface 11b exposed upward.
Next, the chuck table 24 is moved below the grinding unit 26. Then, as shown in fig. 2B, the chuck table 24 and the grinding wheel 32 are rotated, and the spindle housing (spindle 28, grinding wheel 32) is lowered while supplying the grinding fluid to the back surface 11B of the wafer 11 or the like.
The lowering speed (lowering amount) of the spindle housing is adjusted to such an extent that the lower surface of the grinding wheel 36 is pushed against the back surface 11b side of the wafer 11. This makes it possible to grind the back surface 11b side and thin the wafer 11. For example, while the thickness of the wafer 11 is measured by the non-contact thickness measuring device 38 (see fig. 3B), the grinding is continued until the wafer 11 is thinned to a predetermined thickness (finished thickness). Instead of the noncontact thickness measuring instrument 38, a contact thickness measuring instrument may be used.
When the wafer 11 is thinned to a predetermined thickness (finished thickness), the dividing grooves 17 are exposed on the back surface 11b side, and the wafer 11 is divided into a plurality of chips by the dividing grooves 17. Fig. 3 (a) is a perspective view schematically showing a wafer 11 divided into a plurality of chips. As shown in fig. 3 (a), when the wafer 11 is divided to obtain a plurality of chips 19, the chip forming step is ended.
After the chip forming step, a measuring step for measuring the thickness of each chip 19 is performed. Fig. 3 (B) is a partially cross-sectional side view schematically showing a case where the thickness of each chip 19 is measured in the measuring step. The grinding device 22 continues to be used to perform this measurement step.
As described above, the non-contact thickness measuring device 38 using light is disposed above the chuck table 24. The thickness measuring device 38 has a light source (not shown) that emits light for measurement. The light source is, for example, an SLD (superluminescent diode), an LED, a halogen lamp, or the like, and emits light having an intensity distribution in a predetermined wavelength range that is transmitted through the wafer 11.
As described above, since the measuring light is transmitted through the wafer 11, a part of the measuring light irradiated to the wafer 11 is reflected on the back surface 11b side of the wafer 11, and another part of the measuring light irradiated to the wafer 11 is reflected on the front surface 11a side of the wafer 11. Therefore, the interference light between the light reflected on the back surface 11b side and the light reflected on the front surface 11a side is intensified at a plurality of wavelengths according to the optical path difference between the back surface 11b and the front surface 11a (corresponding to the thickness of the wafer 11).
The interference light is incident on a spectroscopic unit (not shown) formed of, for example, a diffraction grating, and the spectroscopic unit is provided inside the thickness measuring device 38. A line sensor (not shown) for detecting the intensity distribution of the light split by the spectroscopic unit is disposed in the vicinity of the spectroscopic unit. Information on the intensity distribution of the interference light acquired by the line sensor is transmitted to a control unit (not shown) of the thickness measuring device 38, for example.
The information acquired by the line sensor as described above includes information corresponding to the spectrum of the interference light intensified at a plurality of wavelengths. Therefore, for example, information about the height of the back surface 11b relative to the front surface 11a (i.e., the thickness of the wafer 11) can be acquired by performing fourier transform (typically, fast fourier transform) or the like on the information acquired by the line sensor (spectroscopic spectrum of the interference light).
When measuring the thickness of the chip 19 using the thickness measuring instrument 38, for example, the chuck table 24 and the thickness measuring instrument 38 are moved relatively while light for measurement is irradiated from the thickness measuring instrument 38 toward the back surface 11b of the wafer 11. This allows each chip 19 to be irradiated with light for measurement and the thickness thereof to be measured. In addition, a contact thickness measuring device, a non-contact thickness measuring device having a different measuring principle from that of the thickness measuring device 38, or the like may be used. For example, the measurement step ends when the thickness of the entire chip 19 is measured and recorded.
After the measurement step, a chip stacking step is performed, and a plurality of chips 19 to be stacked are selected according to the thickness of each chip 19 and stacked. Fig. 4 (a) is a side view schematically showing a plurality of chips selected in the chip stacking step, and fig. 4 (B) is a side view schematically showing a case where a plurality of chips are stacked in the chip stacking step.
In the present embodiment, the case where the stacked chips 31 are manufactured by stacking 3 chips 19a, 19b, and 19c in the thickness direction is described, but the number of stacked chips 19 is not limited. That is, two chips 19 may be stacked to produce a stacked chip, or 4 or more chips 19 may be stacked to produce a stacked chip.
For example, in the case where the thickness of the stacked chip 31 is set to T, as shown in fig. 4 (a), 3 chips 19a, 19b, 19c each having a sum of T of the thicknesses T1, T2, T3 are selected according to the thickness of each chip 19 measured and recorded in the measuring step. By overlapping and fixing these 3 chips 19a, 19B, 19c, as shown in fig. 4 (B), a laminated chip 31 having a thickness T can be manufactured.
In the present embodiment, the description has been made taking into consideration only the thickness of the chips 19a, 19b, and 19c, but when the stacked chips include components other than the chips (for example, an adhesive or the like for connecting the chips), a plurality of chips to be stacked are selected in consideration of the thickness of the components.
As described above, in the method for manufacturing a laminated chip according to the present embodiment, the plurality of chips 19a, 19b, and 19c to be laminated are selected and laminated so as to have the predetermined thickness T when the plurality of chips 19 are laminated, and therefore the laminated chip 31 can be manufactured to match the predetermined thickness T.
The present invention is not limited to the description of the above embodiments, and various modifications can be made. For example, in the chip forming step of the above embodiment, the dividing groove 17 is formed on the front surface 11a side of the wafer 11, and then the wafer 11 is thinned by grinding the rear surface 11b of the wafer 11 and the wafer 11 is divided into the plurality of chips 19, but the wafer may be divided into the plurality of chips by other methods.
For example, a modified layer (a structure for dicing) may be formed by condensing a laser beam having a permeability inside a wafer as a starting point of dicing, and then the wafer may be thinned by grinding the back surface of the wafer and diced into a plurality of chips by a force applied at the time of grinding.
Similarly, a modified layer may be formed by condensing a laser beam having a permeability inside a wafer as a starting point of division, and then the wafer may be divided into a plurality of chips by applying a force by a method other than grinding. In this case, the wafer may be thinned by grinding the back surface of the wafer before forming the modified layer as the start point of division.
The wafer may be cut into a plurality of chips by using an absorptive laser beam or a cutting tool. In this case, the wafer may be thinned by grinding the back surface of the wafer before the wafer is cut and divided into a plurality of chips.
The structure, method, and the like of the above-described embodiment can be appropriately modified within a range not departing from the object of the present invention.

Claims (2)

1. A method for manufacturing a laminated chip, which is formed by laminating a plurality of chips, is characterized by comprising the following steps:
a chip forming step of continuously grinding the back surface of the wafer by a grinding device while measuring the thickness of the wafer by a thickness measuring instrument to thin the wafer, and dividing the wafer into a plurality of chips;
a measuring step of continuing the measuring step using the grinding device and the thickness measuring instrument, and measuring the thickness of each chip obtained by the chip forming step using the thickness measuring instrument; and
and a chip stacking step of selecting a plurality of chips to be stacked so as to have a predetermined thickness when the plurality of chips are stacked, based on the thickness of each chip measured in the measuring step.
2. The method of manufacturing a laminated chip according to claim 1, wherein,
in this chip forming step, after a dividing structure is formed in the wafer along a plurality of intersecting lines, the wafer is thinned by grinding the back surface of the wafer, thereby dividing the wafer into a plurality of chips.
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