CN107910379A - A kind of SiC junction barrel Schottky diode and preparation method thereof - Google Patents
A kind of SiC junction barrel Schottky diode and preparation method thereof Download PDFInfo
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
- H01L29/0623—Buried supplementary region, e.g. buried guard ring
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/402—Field plates
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66053—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
- H01L29/6606—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
Abstract
A kind of SiC junction barrel Schottky diode, it is characterised in that including：The SiC substrate of first conduction type；The SiC epitaxial layer of first conduction type, on the first surface of substrate, wherein, the doping concentration of epitaxial layer is less than the doping concentration of substrate；Junction barrier area, extends into epitaxial layer, junction barrier area includes the ring-type or list structure of multiple second conduction types from the surface of the remote substrate of epitaxial layer；The SiC knot terminals expansion area of second conduction type, is extended, doping concentration is gradually reduced from the knot terminal of junction barrier to both sides from the knot terminal in junction barrier area to the both sides away from junction barrier area；Dielectric layer, is arranged on the surface of remote substrate of epitaxial layer, and dielectric layer has ramp structure, is formed and is open in part corresponding with junction barrier area；First electrode layer, is arranged on the second surface of substrate；And the second electrode lay, including cover the Schottky contact region of opening and extend to the field plate structure on dielectric layer.
Description
Technical field
The present invention relates to semiconductor applications.More particularly, to a kind of SiC junction barrel Schottky diode and its making side
Method.
Background technology
In SiC diodes, junction barrier schottky structure (JBS) is be combined together Schottky and PiN structures one
Kind device architecture, the advantages of excluding limitation of the tunnelling current to highest blocking voltage by PN junction potential barrier, combine both so that
JBS structure is compared to schottky device, and leakage current is lower under reverse mode, and blocking voltage is high.Therefore, in high speed, high voltage
SiC diodes field there is very big advantage.
The edge highfield caused by the breakdown voltage of device depends greatly on knot curvature, in order to slow
The electric field for solving the knot edge of surface termination is concentrated, and improves the actual breakdown voltage of device, it is necessary to carry out knot terminal knot to device
The design of structure.Junction termination structures mainly include field plate (FP), field limiting ring (FLR), knot terminal extension (JTE) etc..
There is a very typical contradictory relation in single area JTE：When JTE dosage is very high, can be formed in JTE edges
One new electric field spike so that device punctures herein；When JTE dosage is too low, and can weaken to main knot edge
Protection so that device punctures here.It is exactly the JTE structures using gradual change to solve this method to contradictory relation.On the other hand,
Breakdown voltage can only be brought up to 1500V or so by simple traditional field plate termination structure, in order to make the semiconductor depletion region of lower section
Big voltage is undertaken as far as possible, it is necessary to the electric field strength in the region is maintained near critical electric field.
Accordingly, it is desirable to provide a kind of SiC junction barrel Schottky diode and preparation method thereof, is improving the breakdown potential of device
Can also simplification of flowsheet, reduction technology difficulty and process costs while pressure.
The content of the invention
It is an object of the invention to provide a kind of SiC junction barrel Schottky diode of high voltage and preparation method thereof.
To reach above-mentioned purpose, the present invention uses following technical proposals：
A kind of SiC junction barrel Schottky diode, it is characterised in that including：
The SiC substrate of first conduction type；The SiC epitaxial layer of first conduction type, on the first surface of substrate, its
In, the doping concentration of epitaxial layer is less than the doping concentration of substrate；Junction barrier area, extends into from the surface of the remote substrate of epitaxial layer
Enter epitaxial layer, junction barrier area includes the ring-type or list structure of multiple second conduction types；The knot terminal of second conduction type
Expansion area, is extended from the knot terminal in junction barrier area to the both sides away from junction barrier area, and doping concentration is whole from the knot of junction barrier
Hold to both sides and be gradually reduced；Dielectric layer, is arranged on the surface of remote substrate of epitaxial layer, and dielectric layer has ramp structure, and
And ramp structure is gradually thickeied from the knot terminal of barrier region to two side directions, formed and opened in part corresponding with junction barrier area
Mouthful；First electrode layer, is arranged on the second surface of substrate；And the second electrode lay, include the Schottky contacts that covering is open
Area and extend to the field plate structure on dielectric layer.
Preferably, dielectric layer is made of SiO2 materials.
Alternatively, the first conduction type is N-type and the second conduction type is p-type.
Alternatively, the first conduction type is p-type and the second conduction type is N-type.
Preferably, in the second electrode lay, field plate structure extends on dielectric layer 5-50 μm.
A kind of method for being used to make the SiC junction barrel Schottky diode in above claim, comprises the following steps：
The SiC substrate of first conduction type is provided；The SiC epitaxial layer of the first conduction type is formed on the first surface of substrate, wherein,
The doping concentration of epitaxial layer is less than the doping concentration of substrate；Junction barrier area is formed, from the surface extension of the remote substrate of epitaxial layer
Into epitaxial layer, junction barrier area includes the ring-type or list structure of multiple second conduction types；Form the second conduction type
Knot terminal expansion area, is extended from the knot terminal in junction barrier area to the both sides away from junction barrier area, and doping concentration is from junction barrier
Knot terminal be gradually reduced to both sides；Dielectric layer is formed on the surface of the remote substrate of epitaxial layer, dielectric layer is tied with slope
Structure, the ramp structure are gradually thickeied from the knot terminal of barrier region to two side directions, are formed in part corresponding with junction barrier area
Opening；First electrode layer is formed on the second surface of substrate；And the second electrode lay is formed, the second electrode lay is opened including covering
Mouthful Schottky contact region and extend to the field plate structure on dielectric layer.
Preferably, junction barrier area, SiC terminating ends expansion area and medium are formed using the first mask and the second mask
Layer, wherein, the first mask and the second mask include multiple masked areas with different transmittancies, multiple masked area bags
Include：Complete transparent area, gradual change transparent area and light tight area, printing opacity is controlled on gradual change transparent area formed with multiple diaphanous spots
Degree.
Preferably, the step of forming the SiC epitaxial layer with the first conduction type includes：Substrate is pre-processed；With
And pass through SiC epitaxial layer of the CVD method growth with the first conduction type on substrate.
Preferably, the doping concentration of the epitaxial layer with the first conduction type SiC is 1.0 × 1015~1.0 × 1016cm-3。
Preferably, the thickness of the SiC epitaxial layer with the first conduction type is 5~100 μm.
Preferably, the doping concentration of the SiC epitaxial layer with the first conduction type is 8.0 × 1015cm-3, thickness is 12 μ
m。
Preferably, the step of forming dielectric layer is to grow SiO by PECVD methods2Material.
Preferably, in the step of forming first electrode layer, metal Ti, Ni or Pt are grown using electron beam evaporation, 900
DEG C~1100 DEG C of temperature ranges in, rapid thermal annealing, the first electrode of formation are carried out in vacuum environment or atmosphere of inert gases
Layer is cathode electrode.
Preferably, in the step of forming the second electrode lay, metal Ti, Ni or Al is grown using electron beam evaporation, is formed
The second electrode lay be anode electrode.
Alternatively, the first conduction type is N-type and the second conduction type is p-type.
Alternatively, the first conduction type is p-type and the second conduction type is N-type.
Preferably, in the step of forming the second electrode lay, field plate structure extends on dielectric layer 5-50 μm.
Beneficial effects of the present invention are as follows：
Technical solution of the present invention provides a kind of knot terminal of the field plate structure by ramped shaped and concentration gradient
The pressure-resistant SiC junction barrel Schottky diode of device is improved in expansion area, not only increases pressure-resistant, and solves knot terminal expansion
Structure is opened up to doping level and dosage excessively sensitive issue.The SiC junction barrier schottkies are manufactured using the preparation method of the disclosure
Diode, simplifies the technological process of element manufacturing, reduces technology difficulty and process costs.
Brief description of the drawings
The embodiment of the present invention is described in further detail below in conjunction with the accompanying drawings；
Fig. 1 is the sectional view according to the SiC junction barrel Schottky diode of embodiment of the disclosure；
Fig. 2A is the top view of the first mask in the production method according to embodiment of the disclosure；
Fig. 2 B are the top view of the second mask in the production method according to embodiment of the disclosure；And
Fig. 3 A to Fig. 3 F are the sectional view for the technological process for showing production method in accordance with an embodiment of the present disclosure.
Embodiment
In order to illustrate more clearly of the present invention, the present invention is done further with reference to preferred embodiments and drawings
It is bright.Similar component is indicated with identical reference numeral in attached drawing.It will be appreciated by those skilled in the art that institute is specific below
The content of description is illustrative and be not restrictive, and should not be limited the scope of the invention with this.
It is to be understood that ordinal number first, second described in specification etc. is intended merely to the clear of description, rather than in order to limit
The order of element, component or component processed etc., i.e. be described as the first element, component and component and the second element, component or component
It can also be expressed as the second element, component and component and the first element, component or component.
Present embodiments provide a kind of SiC junction barrel Schottky diode and make the SiC junction barrel Schottky diode
Method.
Fig. 1 is the sectional view according to the SiC junction barrel Schottky diode 10 of embodiment of the disclosure.
As shown in the figure, the SiC junction barrel Schottky diode 10 of embodiment of the disclosure includes：First electrode layer 101, lining
Bottom 103, epitaxial layer 105, junction barrier area 107, terminating end expansion area 109, dielectric layer 111 and the second electrode lay 113.
In the structure of the exemplary SiC junction barrel Schottky diode 10 shown in Fig. 1, substrate 103 has first surface
And second surface, i.e., the upper and lower surface in the direction shown in figure, describes for convenience, will hereinafter use upper surface with
Surface is stated.Substrate 103 is made of the SiC material of the first conduction type.It is N-type in the present embodiment.It is to be understood that the disclosure
It is not limited to this, the conduction type for forming the SiC material of substrate 103 can also be p-type.Epitaxial layer 105 is arranged on substrate 103
On upper surface.The doping concentration of epitaxial layer 105 is less than the doping concentration of substrate 103.In order to represent apparent simplicity, in this implementation
Being described below for example, uses N+- SiC substrate 103 represents the substrate 103 that N-type SiC material is formed, and uses N-105 table of-SiC epitaxial layer
Show the epitaxial layer 105 being made of the doping concentration N-type SiC material smaller than doping concentration in substrate.It is to be understood that this is exemplary
, it is not limited to the disclosure.In the example being described below, N-type can be converted into p-type accordingly and p-type is converted into N
Type.
In N-Close to the position of upper surface in-SiC epitaxial layer 105, junction barrier area 107 and knot terminal expansion area are provided with
109, in the present embodiment, by with N-The P-type material that the conduction type of-SiC epitaxial layer 105 is opposite is formed.Junction barrier area 107 is wrapped
Include a ring-types of n (n >=1) or list structure of uniform doping.Doping concentration in knot terminal expansion area 109 is from junction barrier area
The terminal organ of 107 knots is gradually reduced laterally.
In N-Dielectric layer 111 is provided with-SiC epitaxial layer 105, as shown in the figure, there is ramp structure in dielectric layer 111,
Therefore there is inverted trapezoidal opening, N-- SiC epitaxial layer 105 is exposed by the opening, and the second electrode lay 113 is arranged at medium
Layer 111 and the N exposed by above-mentioned opening-In-SiC epitaxial layer 105, the second electrode lay 113 includes Schottky contact region
113-1 and field plate structure 113-2, field plate structure 113-2 are located on dielectric layer 111 a simultaneously part for blanket dielectric layer 111, separately
Outside, first electrode layer 101 is arranged at N+The lower surface of-SiC substrate 103.
The SiC junction barrel Schottky diode of the disclosure, because the dielectric layer with ramp structure, so as to form slope
The field plate structure of type and the knot terminal expansion area with concentration gradient so that the due to voltage spikes of junction barrier terminal is eliminated,
The pressure-resistant performance of device is significantly increased, improves breakdown voltage, solves knot terminal expansion structure to doping level and dosage mistake
In sensitive issue.
With reference to Fig. 2A to Fig. 2 B and Fig. 3 A to Fig. 3 F, description makes the work of the SiC junction barrel Schottky diode
Skill flow.
Fig. 2A is the top view of the first mask 20-1 in the production method according to embodiment of the disclosure；According to Fig. 2 B
The top view of second mask 20-2 in the production method of embodiment of the disclosure；And Fig. 3 A to Fig. 3 F are to show according to this public affairs
The sectional view of the technological process of the production method for the embodiment opened.
Step 1：
In N+The upper surface growth N of-SiC substrate 103-- SiC epitaxial layer 105, as shown in Figure 3A.Specifically, to N+-SiC
Substrate 103 is pre-processed；In N+103 upper surface of-SiC substrate passes through CVD (Chemical Vapor Deposition, chemistry
Vapor phase deposition technique) method growth N-- SiC epitaxial layer 105；N-105 thickness of-SiC epitaxial layer is 5~100 μm, and doping concentration is
1.0×1015~1.0 × 1016cm-3, it is preferable that N-105 thickness of-SiC epitaxial layer is 12 μm, and doping concentration is 8.0 × 1015cm-3.It is to be understood that the disclosure is not limited to this, because in p-type doping, in the number of particles and same concentrations n-type doping that participate in conduction
Participation it is conductive number of particles it is identical, therefore be changed to the concentration of p-type doping and thickness parameter and need not all change.
Step 2：
Making includes the mask 20-1 and 20-2 of multiple masked areas with different transmittancies.Such as Fig. 2A and Fig. 2 B institutes
Show, each in mask 20-1 and 20-2 includes complete transparent area 201, gradual change transparent area 203 and light tight area 205.
For mask 20-1, gradual change transparent area 203 is opposite with the position of the knot terminal expansion area 109 of doping concentration gradual change
Should, complete transparent area 201 is corresponding with the position in junction barrier area 107.Outermost in mask 20-1 is light tight area 203,
Light tight area 203 surrounds gradual change transparent area 203, complete to the center position of mask 20-1 from the inner side of gradual change transparent area 203
Full transparent area 201 and light tight area 205 are arranged alternately, and therefore, complete transparent area 201 is located at the center of mask 20-1, and position
Complete transparent area 201 in center is solid shape.Therefore, the quantity of complete transparent area 201 and the quantity phase in light tight area 205
Deng.The quantity in light tight area 205 is more than or equal to 2.In addition, in the complete transparent area 201 being alternately arranged and light tight area 205, no
The width of transparent area 205 can be the same or different.
For mask 20-2, gradual change transparent area 203 is corresponding with the ramp structure in dielectric layer 111, complete transparent area
201 is corresponding with the position of Schottky contact region 113-1 in the second electrode lay 113.Mask 20-2 includes a complete printing opacity
201, one, area gradual change transparent area 203 and a light tight area 205.Wherein, the middle position of mask 20-2 is complete printing opacity
Area 201, gradual change transparent area 203 are surrounded around complete transparent area 201 and by light tight area 205.
The area of complete transparent area 201 in mask 20-2 is surrounded with gradual change transparent area 203 in mask 20-1
Complete transparent area 201 is equal with the gross area in light tight area 205, and the peripheral shape of the complete transparent area 201 in mask 20-2
Shape is consistent with the inner circumferential shape of gradual change transparent area 203 in mask 20-1.
In addition, in the present embodiment, in mask 20-1 and 20-2, gradual change transparent area 203 includes being used to control printing opacity
Multiple diaphanous spots of rate.The shape of diaphanous spot is circular, square, triangle or other light-permeable shapes, according to required light transmittance
Determine the Density Distribution of diaphanous spot, so as to control the dosage of injection doping particle (that is, Al ions), printing opacity dot density is from junction barrier
107 edge of area gradually reduces laterally.
It should be understood that the disclosure is not limited to such form, i.e. when it is other structures to need junction barrier area 107, mask
The structure of version 20-1 correspondingly changes.
Step 3：
In N-105 surface of-SiC epitaxial layer coats one layer of photoresist 115, and carries out photoetching, development using mask 20-1
And carbonization treatment.There is the characteristic of different transmittancies based on mask 20-1 different zones, 115 corresponding region of photoresist layer
Depth of exposure is different.Develop to the photoresist after exposure, different zones tool in photoresist layer different based on depth of exposure
There is different corrosive effects.As shown in Figure 3B, in photoresist layer 115, with the region corresponding to complete transparent area 201 by complete rotten
Eating away；With the region corresponding to gradual change transparent area 203, the thickness retained after development is gradual laterally from 107 edge of junction barrier area
Increase；Region corresponding to light tight area 205, photoresist layer 115 are fully retained；Photoresist layer 115 after exposure is carried out
Barrier layer (as remaining photoresist layer, therefore not label) of the high temperature cabonization as ion implanting.
Step 4：
To N-- SiC epitaxial layer 105 carries out p-type injection, and the junction barrier area 107 of acquisition p-type doping and p-type doping concentration are gradually
The knot terminal expansion area 109 of change, as shown in Figure 3 C.Wherein, the junction barrier area 107 of p-type doping includes the ring-type of n p-type doping
Structure, wherein n >=1.The cyclic structure and a solid cylindrical structure of n p-type are formed by ion implanting, p-type cyclic structure
Equally or not equidistantly distributed, the shape of p-type cyclic structure can be square, U-shaped, V-type or other tubular shapes.P-type
The junction barrier area 107 of doping can also be the list structure of n p-type doping.107 doping concentration of junction barrier area of p-type doping is big
In or equal to p-type doping concentration gradual change knot terminal expansion area 109 doping concentration.Adulterate dense in the junction barrier area 107 of p-type doping
Degree is greater than or equal to 1.0 × 1018cm-3, 109 doping concentration of knot terminal expansion area of p-type doping concentration gradual change is less than or equal to
1.0×1018cm-3。
The Al ion implantings of different-energy and dosage combination are carried out at a temperature of 300~500 DEG C, Implantation Energy scope is：
10~700KeV, implantation dosage scope are 1 × 1013~1 × 1015cm-2.Preferably, different-energy is carried out at a temperature of 400 DEG C
With the multiple Al ion implantings of dosage combination so that the doping concentration finally obtained is uniform.Implantation Energy can be respectively：
500KeV, 280KeV, 30KeV, correspondingly, implantation dosage can be respectively 7.8 × 1014cm-2、5.2×1014cm-2、8.6×
1013cm-2.Then, in 1500 DEG C~1700 DEG C temperature ranges, the Al that 10~30min is carried out in ar gas environment is ion-activated
Annealing, obtains the knot terminal expansion area 109 of p-type doping concentration gradual change and the junction barrier area 107 of p-type doping.
Wherein, since the thickness of the photoresist layer 115 after overexposure, development and carbonization is different, to injection Al from
The stop degree of son will be different.For example, in the present embodiment, the region Al ions corresponding to complete transparent area 201 are whole
Injection, forms highly doped p type island region domain；The gradient thickness of region photoresist layer 115 corresponding to gradual change transparent area 203, to Al
The stop degree of ion will be different, therefore the p type island region domain of concentration gradient can be formed in this region；Corresponding to light tight area 205
Region block Al ions completely, there is no Al ion implantings.The doping concentration in highly doped p type island region domain be greater than or equal to 1.0 ×
1018cm-3, forming the junction barrier area 107 of p-type doping, the doping concentration in low-doped p type island region domain is less than or equal to 1.0 ×
1018cm-3, and doping concentration is gradually reduced from the edge in junction barrier area 107 to both sides, and excursion is 1.0 × 1018cm-3Arrive
1.0×1017cm-3, so as to form the knot terminal expansion area 109 of p-type concentration gradient.
Step 5：
Remove N-Remaining photoresist layer 115 in-SiC epitaxial layer 105, as shown in Figure 3D.
Step 6：
In N-PECVD in-SiC epitaxial layer 105 (Plasma Enhanced Chemical Vapor Deposition, etc.
Gas ions strengthen chemical vapor deposition) growth SiO2The dielectric layer 111 of material, as shown in FIGURE 3 E.Specifically, in dielectric layer 111
Upper coating photoresist (not shown), and carry out photoetching, development and carbonization treatment using mask 20-2.Photoresist after exposure into
Barrier layer of the row high temperature cabonization as etch media layer 111.Similarly, you can form the dielectric layer 111 with ramp structure.
Step 7：
In N+103 lower surface of-SiC substrate grows first electrode layer 101, as cathode electrode, as illustrated in Figure 3 F.Specifically
Ground, in N+103 lower surface electron beam evaporation Ti, Ni or Pt metal of-SiC substrate；In 900 DEG C~1100 DEG C temperature ranges, very
Rapid thermal annealing is carried out in Altitude or atmosphere of inert gases, so that in N+103 lower surface of-SiC substrate forms Ohmic contact electricity
Pole (that is, cathode electrode).
Step 8：
Above the overthe openings and dielectric layer 111 among dielectric layer 111 electron beam evaporation growth metal Ti, Ni or
Al, grows the second electrode lay 113, as anode electrode.The edge of wherein the second electrode lay 113 extends past dielectric layer 111
Ramp structure is on platform, a part for the platform of blanket dielectric layer 111.So as to form the field plate knot with ramp structure
Structure.
Obviously, the above embodiment of the present invention is only intended to clearly illustrate example of the present invention, and is not pair
The restriction of embodiments of the present invention, for those of ordinary skill in the field, may be used also on the basis of the above description
To make other variations or changes in different ways, all embodiments can not be exhaustive here, it is every to belong to this hair
Row of the obvious changes or variations that bright technical solution is extended out still in protection scope of the present invention.
Claims (17)
- A kind of 1. SiC junction barrel Schottky diode, it is characterised in that including：The SiC substrate of first conduction type；The SiC epitaxial layer of first conduction type, on the first surface of the substrate, wherein, the doping of the epitaxial layer is dense Doping concentration of the degree less than the substrate；Junction barrier area, extends into the epitaxial layer, the junction barrier area includes from the surface of the remote substrate of epitaxial layer The ring-type or list structure of multiple second conduction types；The knot terminal expansion area of second conduction type, from the knot terminal in the junction barrier area to the both sides away from the junction barrier area It is extended, the knot terminal of the doping concentration from the junction barrier is gradually reduced to both sides；Dielectric layer, on the surface for the remote substrate for being arranged on the epitaxial layer and has ramp structure, and a slope Structure is gradually thickeied from the knot terminal of the barrier region to two side directions, is formed and opened in part corresponding with the junction barrier area Mouthful；First electrode layer, is arranged on the second surface of the substrate；AndThe second electrode lay, including cover the Schottky contact region of the opening and extend to the field plate structure on the dielectric layer.
- 2. SiC junction barrel Schottky diode as claimed in claim 1, it is characterised in that the dielectric layer is by SiO2Material structure Into.
- 3. SiC junction barrel Schottky diode as claimed in claim 1, it is characterised in that first conduction type is N-type And second conduction type is p-type.
- 4. SiC junction barrel Schottky diode as claimed in claim 1, it is characterised in that first conduction type is p-type And second conduction type is N-type.
- 5. SiC junction barrel Schottky diode as claimed in claim 1, it is characterised in that in the second electrode lay, institute State field plate structure and extend on the dielectric layer 5-50 μm.
- 6. a kind of method for being used to make the SiC junction barrel Schottky diode described in above claim, including following step Suddenly：The SiC substrate of first conduction type is provided；The SiC epitaxial layer of the first conduction type is formed on the first surface of the substrate, wherein, the doping of the epitaxial layer is dense Doping concentration of the degree less than the substrate；Junction barrier area is formed, the epitaxial layer, the junction barrier area are extended into from the surface of the remote substrate of epitaxial layer Include the ring-type or list structure of multiple second conduction types；The knot terminal expansion area of the second conduction type is formed, from the knot terminal in the junction barrier area to the remote junction barrier area Both sides are extended, and the knot terminal of the doping concentration from the junction barrier is gradually reduced to both sides；Dielectric layer is formed on the surface of the remote substrate of the epitaxial layer, the dielectric layer has ramp structure, and institute State ramp structure gradually to thicken to two side directions from the terminating end of the barrier region, in part corresponding with the junction barrier area Form opening；First electrode layer is formed on the second surface of the substrate；AndThe second electrode lay is formed, the second electrode lay includes covering the Schottky contact region of the opening and extending to being given an account of Field plate structure on matter layer.
- 7. production method as claimed in claim 6, it is characterised in that formed using the first mask and the second mask described Junction barrier area, the SiC knot terminals expansion area and the dielectric layer,Wherein, first mask and second mask include multiple masked areas with different transmittancies, described Multiple masked areas include：Complete transparent area, gradual change transparent area and light tight area, formed with multiple on the gradual change transparent area Luminous point controls light transmittance.
- 8. production method as claimed in claim 6, it is characterised in that described to form the SiC extensions with the first conduction type The step of layer, includes：The substrate is pre-processed；AndPass through the CVD method growth SiC outer layers with the first conduction type over the substrate.
- 9. production method as claimed in claim 8, it is characterised in that the epitaxial layer with the first conduction type SiC Doping concentration is 1.0 × 1015~1.0 × 1016cm-3。
- 10. production method as claimed in claim 9, it is characterised in that the SiC epitaxial layer with the first conduction type Thickness is 5~100 μm.
- 11. production method as claimed in claim 8, it is characterised in that the SiC epitaxial layer with the first conduction type Doping concentration is 8.0 × 1015cm-3, thickness is 12 μm.
- 12. production method as claimed in claim 6, it is characterised in that described the step of forming dielectric layer is to pass through PECVD side Method grows SiO2Material.
- 13. production method as claimed in claim 6, it is characterised in that in the step of formation first electrode layer, utilize Electron beam evaporation grows metal Ti, Ni or Pt, in 900 DEG C~1100 DEG C temperature ranges, in vacuum environment or inert gas atmosphere Middle carry out rapid thermal annealing is enclosed, the first electrode layer of formation is cathode electrode.
- 14. production method as claimed in claim 6, it is characterised in that in the step of formation the second electrode lay, utilize Electron beam evaporation grows metal Ti, Ni or Al, and the second electrode lay of formation is anode electrode.
- 15. production method as claimed in claim 6, it is characterised in that first conduction type is led for N-type and described second Electric type is p-type.
- 16. production method as claimed in claim 6, it is characterised in that first conduction type is led for p-type and described second Electric type is N-type.
- 17. production method as claimed in claim 6, it is characterised in that described in the step of formation the second electrode lay Field plate structure extends on the dielectric layer 5-50 μm.
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| CN113823698A (en) * | 2021-08-30 | 2021-12-21 | 瑶芯微电子科技(上海)有限公司 | SiC Schottky power diode and preparation method thereof |
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