CN116487445B - Silicon carbide power device with P+ gradual change ring surrounded by N-region and preparation method thereof - Google Patents
Silicon carbide power device with P+ gradual change ring surrounded by N-region and preparation method thereof Download PDFInfo
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- 229910010271 silicon carbide Inorganic materials 0.000 title claims abstract description 29
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 title claims abstract description 25
- 238000002360 preparation method Methods 0.000 title abstract description 5
- 239000000758 substrate Substances 0.000 claims abstract description 24
- 150000002500 ions Chemical class 0.000 claims abstract description 11
- 238000005468 ion implantation Methods 0.000 claims description 43
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 32
- 235000012239 silicon dioxide Nutrition 0.000 claims description 16
- 239000000377 silicon dioxide Substances 0.000 claims description 16
- 238000000034 method Methods 0.000 claims description 14
- 238000000151 deposition Methods 0.000 claims description 10
- 229920002120 photoresistant polymer Polymers 0.000 claims description 10
- 238000005530 etching Methods 0.000 claims description 9
- 230000000873 masking effect Effects 0.000 claims description 9
- 239000002184 metal Substances 0.000 claims description 9
- 238000002161 passivation Methods 0.000 claims description 9
- 230000003247 decreasing effect Effects 0.000 claims description 7
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 6
- 238000005229 chemical vapour deposition Methods 0.000 claims description 6
- 238000004519 manufacturing process Methods 0.000 claims description 5
- 238000009826 distribution Methods 0.000 claims description 4
- 238000000137 annealing Methods 0.000 claims description 3
- 230000001590 oxidative effect Effects 0.000 claims description 3
- 238000004544 sputter deposition Methods 0.000 claims description 3
- 230000002441 reversible effect Effects 0.000 abstract description 6
- 230000005684 electric field Effects 0.000 abstract description 5
- 238000002347 injection Methods 0.000 abstract description 3
- 239000007924 injection Substances 0.000 abstract description 3
- 238000002513 implantation Methods 0.000 description 14
- 230000000670 limiting effect Effects 0.000 description 3
- 230000002829 reductive effect Effects 0.000 description 3
- 239000000463 material Substances 0.000 description 2
- HMDDXIMCDZRSNE-UHFFFAOYSA-N [C].[Si] Chemical compound [C].[Si] HMDDXIMCDZRSNE-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 230000001052 transient effect Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66053—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
- H01L29/6606—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
Abstract
The invention discloses a silicon carbide power device with an N-region surrounding a P+ gradual change ring, which comprises: an ohmic contact cathode, an N+ substrate layer, an N-type epitaxial region, an N-region, a terminal region oxide layer and a Schottky contact anode which are sequentially arranged from bottom to top; the N-region is internally provided with a plurality of active region P+ doped regions and a plurality of terminal region P+ doped regions; the doping ion concentration of the P+ doping region of the active region and the P+ doping region of the terminal region are distributed in Gaussian; the doping concentration of the N-region is less than the doping concentration of the N-type epitaxial region. The invention also provides a preparation method of the silicon carbide power device with the P+ gradual change ring surrounded by the N-region. The invention adopts the graded active region P+ doped region and the terminal region P+ doped region with smaller concentration gradient, and forms an N-region which surrounds the active region and the terminal region and has lower doping concentration than the epitaxial layer, thereby effectively reducing the peak electric field at the injection junction of the surface of the device and further improving the avalanche stress of reverse heavy current.
Description
Technical Field
The invention belongs to the technical field of semiconductors, and particularly relates to a silicon carbide power device with an N-region surrounding a P+ gradual change ring and a preparation method thereof.
Background
4H-SiC (4 means that the number of carbon-silicon diatomic layers of one unit cell along the (001) direction is four, and H means Hexagonal Hexagonal) power diode is generally composed of an active region and a termination region. The active region functions to carry both the majority of the forward current in forward conduction and the high blocking voltage in the application of the reverse voltage. The effect of the termination region is that when a reverse voltage is applied, the depletion layer expands outwards and downwards due to the termination region, and the electric field crowding at the edge of the active region is relieved, so that the purpose of improving the reverse breakdown voltage of the device is achieved. Common terminal structures are: field limiting ring terminals, field plate terminals, junction terminal extensions, etc.
At present, in the application environment of a 4H-SiC power diode, a transient reverse high current is inevitably experienced. The 4H-SiC power diode is generally composed of an active region and a terminal region, so that the influence of various factors such as an active region structure, an epitaxial layer structure, a terminal region structure and ion implantation dosage on the performance of the device is comprehensively considered in the structural design of the device, and the design is relatively complex. And in addition, a plurality of P+ doped regions are formed in an active region and a terminal region of the traditional 4H-SiC field limiting ring terminal power device, are sequentially arranged outwards along the top of an epitaxial layer, and P+ doping of the active region and the terminal region of the device is simultaneously realized through ion implantation.
Disclosure of Invention
In order to solve the problems in the prior art, the invention provides a silicon carbide power device with an N-region surrounding a P+ gradual change ring and a preparation method thereof. The technical problems to be solved by the invention are realized by the following technical scheme:
a first aspect of an embodiment of the present invention provides a silicon carbide power device having an N-region surrounding a p+ graded ring, comprising: an ohmic contact cathode, an N+ substrate layer, an N-type epitaxial region, an N-region, a terminal region oxide layer and a Schottky contact anode which are sequentially arranged from bottom to top;
the N-region is internally provided with a plurality of active region P+ doped regions and a plurality of terminal region P+ doped regions;
the doping ion concentrations of the active region P+ doping region and the terminal region P+ doping region are Gaussian distribution;
the doping concentration of the N-region is smaller than that of the N-type epitaxial region.
In one embodiment of the present invention, the doping concentrations of the active region p+ doped region and the termination region p+ doped region are from center to edge 1e 21 cm -3 To 7e 15 cm -3 Gradually decreasing.
In one embodiment of the invention, the spacing between the plurality of active region P+ doped regions is 1.5-6 μm;
the interval between the first terminal region P+ doped region at the inner side of the terminal region P+ doped region and the adjacent second terminal region P+ doped region is 1-3 mu m, and the interval between every two terminal regions P+ doped regions from the third terminal region P+ doped region to the outermost terminal region P+ doped region is sequentially increased by 0.2 mu m.
In one embodiment of the invention, the termination region oxide layer extends from the location of the outermost termination region p+ doped region to the location of the innermost termination region p+ doped region.
In one embodiment of the invention, the schottky contact anode extends from the active region p+ doped region to cover a portion of the termination region oxide layer.
The second aspect of the embodiment of the invention provides a method for preparing a silicon carbide power device with an N-region surrounding a p+ graded ring, which is applied to preparing the silicon carbide power device provided by the first aspect of the embodiment of the invention, and comprises the following steps:
step one, epitaxially growing an N-type epitaxial region on an N+ substrate layer;
step two, epitaxially growing an N-region on the N-type epitaxial region; the doping concentration of the N-region is smaller than that of the N-type epitaxial region;
step three, depositing SiO on the surface of the N-region 2 Masking film and then etching the SiO 2 Masking film forms ion implantation window;
performing multiple first ion implantation operations on the ion implantation window to form multiple active doped regions and multiple terminal doped regions;
performing a plurality of second ion implantation operations on the ion implantation window to form a plurality of active region P+ doped regions and a plurality of terminal region P+ doped regions; the energy of each second ion implantation is sequentially increased, so that the doping ion concentration of the P+ doping region of the active region and the P+ doping region of the terminal region are Gaussian distribution;
step six, depositing a silicon dioxide layer on the upper surface of the product prepared in the step five, and then removing the SiO 2 A masking film and the silicon dioxide layer;
step seven, oxidizing the lower surface of the N+ substrate layer to form an oxide layer with preset thickness, depositing a silicon dioxide passivation layer on the upper surface of the product prepared in the step six, smearing photoresist on the silicon dioxide passivation layer on the upper surface, removing the oxide layer on the lower surface of the N+ substrate layer, and removing the photoresist;
sputtering metal on the lower surface of the N+ substrate layer, and then annealing to form an ohmic contact cathode;
step nine, covering photoresist on the silicon dioxide passivation layer and etching to form a terminal area oxide layer and a Schottky contact window;
and step ten, depositing metal on the surface of the product prepared in the step nine, and etching the metal outside the Schottky contact window to form a Schottky contact anode.
In one embodiment of the present invention, the specific steps of the first step are:
epitaxially growing an N-type epitaxial region on the N+ substrate layer by a chemical vapor deposition method;
the specific steps of the second step are as follows:
and epitaxially growing an N-region on the N-type epitaxial region by a chemical vapor deposition method.
In one embodiment of the present invention, the doping concentration of the N-type epitaxial region is 5e 15 cm -3 -1e 17 cm -3 。
In one embodiment of the present invention, the ion implantation energy of the second ion implantation operation is 250keV to 800keV;
the doping concentration of the P+ doping region of the active region and the P+ doping region of the terminal region is from 1e from the center to the edge 21 cm -3 To 7e 15 cm -3 Gradually decreasing.
The invention has the beneficial effects that:
the invention adopts the graded active region P+ doped region and the terminal region P+ doped region with smaller concentration gradient, and forms an N-region which surrounds the active region and the terminal region and has lower doping concentration than the epitaxial layer, thereby effectively reducing the peak electric field at the injection junction of the surface of the device and further improving the avalanche stress of reverse heavy current.
The present invention will be described in further detail with reference to the accompanying drawings and examples.
Drawings
FIG. 1 is a schematic diagram of a half cell structure of a SiC power device with an N-region surrounding a P+ graded ring according to an embodiment of the invention.
Detailed Description
The present invention will be described in further detail with reference to specific examples, but embodiments of the present invention are not limited thereto.
Example 1
As shown in fig. 1, a first aspect of an embodiment of the present invention provides a silicon carbide power device having an N-region surrounding a p+ graded ring, comprising: an ohmic contact cathode 1, an N+ substrate layer 2, an N-type epitaxial region 3, an N-region 4, a terminal region oxide layer 6 and a Schottky contact anode 7 which are arranged on the N-region 4 in sequence from bottom to top;
the N-region 4 is internally provided with a plurality of active region P+ doped regions 8 and a plurality of terminal region P+ doped regions 5; the doping ion concentration of the active region P+ doping region 8 and the terminal region P+ doping region 5 are in Gaussian distribution with gradually reduced concentration from the center to the edge; the doping concentration of the N-region 4 is smaller than the doping concentration of the N-type epitaxial region 3. P+ is P type heavy doping, N+ is N type heavy doping, and N-is N type light doping.
Optionally, an n+ substrateThe doping concentration of layer 2 was 5×10 18 cm -3 The doping concentration of the N-type epitaxial region 3 is 5e 15 cm -3 ~1e 17 cm -3 。
In this embodiment, since the diffusivity of the implanted ions in SiC is low, the concentration gradient of the implanted ions is generated, so that a peak electric field occurs at the formed PN abrupt junction, the concentration of the doped ions passing through the active region p+ doped region 8 and the terminal region p+ doped region 5 are all gaussian distributed to form a concentration gradient with a small concentration gradient, and an N-region 4 surrounding the terminal region and the active region and having a doping concentration smaller than that of the N-type epitaxial region 3 is formed, so that the concentration gradient is reduced, thereby reducing the peak electric field, and further improving the avalanche resistance.
The active region p+ doped region 8 and the termination region p+ doped region 5 are subjected to multiple high-energy low-dose ion implantation, so that the concentration gradient is further reduced.
Further, the doping concentration of each active region p+ doped region 8 and each termination region p+ doped region 5 is from center to edge 1e 21 cm -3 To 7e 15 cm -3 Gradually decreasing.
Further, the spacing between the plurality of active region p+ doped regions 8 is 1.5-6 μm;
the interval between the first terminal region P+ doped region inside the terminal region P+ doped region 5 and the adjacent second terminal region P+ doped region is 1-3 μm, and the interval between every two terminal regions P+ doped regions 5 from the third terminal region P+ doped region 5 to the outermost terminal region P+ doped region 5 is sequentially increased by 0.2 μm.
Further, the termination region oxide layer 6 extends from the position of the outermost termination region p+ doped region 5 to the position of the innermost termination region p+ doped region 5.
Further, the schottky contact anode 7 extends from the active region p+ doped region 8 to cover a portion of the termination region oxide layer 6.
Example two
A second aspect of the present invention provides a method for manufacturing a silicon carbide power device having an N-region surrounding a p+ graded ring, applied to manufacturing the silicon carbide power device of the first embodiment, comprising the steps of:
in step one, an N-type epitaxial region 3 is epitaxially grown on an n+ substrate layer 2.
Specifically, an N-type epitaxial region 3 is epitaxially grown on an N+ substrate layer 2 by a chemical vapor deposition method, the growth temperature is 1600-1900 ℃, and the doping concentration of the N-type epitaxial region is 5e 15 cm -3 -1e 17 cm -3 . Optionally, the doping concentration of the n+ substrate layer 2 is 5×10 18 cm -3 。
Preferably, the n+ substrate layer 2 is an n+ silicon carbide substrate having a thickness of 300 μm to 700 μm. The silicon carbide substrate has mature production technology, good device quality, high heat conductivity and good stability, can be applied to a high-temperature growth process, has excellent physical and chemical properties, and can realize a high-power electronic device with high performance.
And step two, epitaxially growing an N-region 4 on the N-type epitaxial region 3.
Specifically, an N-region 4 is epitaxially grown on an N-type epitaxial region 3 by a chemical vapor deposition method, and the growth temperature is 1600-1900 ℃. The doping concentration of the N-region 4 is smaller than the doping concentration of the N-type epitaxial region 3.
Step three, siO is deposited on the surface of the N-region 4 2 Masking film and then etching SiO 2 Masking film forms ion implantation window; the ion implantation window includes rectangular and annular windows corresponding to the shapes of the active region and the termination region, respectively.
Performing multiple first ion implantation operations on the ion implantation window to form multiple active doped regions and multiple terminal doped regions;
preferably, the first ion implantation operation forms abrupt junctions, the implantation times being four times, specifically:
the first time: the implantation energy was 40keV and the implantation dose was 5.0e 14 cm -3 The method comprises the steps of carrying out a first treatment on the surface of the Second time: the implantation energy was 120keV and the implantation dose was 6.5e 14 cm -3 The method comprises the steps of carrying out a first treatment on the surface of the Third time: the implantation energy was 240keV and the implantation dose was 1.0e 15 cm -3 The method comprises the steps of carrying out a first treatment on the surface of the Fourth time: the implantation energy was 390keV and the implantation dose was 1.2e 15 cm -3 。
Performing a plurality of second ion implantation operations on the ion implantation window to form a plurality of active region p+ doped regions 8 and a plurality of termination region p+ doped regions 5; the energy of the second ion implantation is sequentially increased each time, so that the active region p+ doped region 8 and the terminal region p+ doped region 5 form a graded junction with a low doping concentration gradient.
Specifically, the implanted ions are Al ions, and a second ion implantation operation of high energy and low dose is performed a plurality of times. The ion implantation energy of the second ion implantation operation is 250keV to 800keV. The doping concentration of the active region P+ doping region 8 and the termination region P+ doping region 5 is from the center to the edge from 1e 21 cm -3 To 7e 15 cm -3 Gradually decreasing.
Preferably, the second ion implantation is performed twice, the implantation energy of the first second ion implantation is 450keV, and the implantation dosage is 1.2e 14 cm -3 The implantation energy of the second ion implantation is 500keV, and the implantation dosage is 4e 14 cm -3 After the implantation is completed, the doping concentration of the active region P+ doping region 8 and the termination region P+ doping region 5 is from the center to the edge from 1e 21 cm -3 To 7e 15 cm -3 Gradually decreasing.
Step six, depositing a silicon dioxide layer on the upper surface after the injection is completed, and then removing SiO 2 Masking films and silicon dioxide layers; preferably, the silicon dioxide layer has a thickness of 100nm.
And seventhly, oxidizing the lower surface of the N+ substrate layer 2 to form an oxide layer with a preset thickness (the thickness of the oxide layer is smaller than that of the unoxidized N+ substrate layer 2), depositing a silicon dioxide passivation layer on the upper surface of the product prepared in the step six, smearing photoresist on the silicon dioxide passivation layer on the upper surface, removing the oxide layer on the lower surface of the N+ substrate layer 2, and removing the photoresist.
And step eight, sputtering metal Ni on the lower surface of the N+ substrate layer 2, and then rapidly annealing to form the ohmic contact cathode 1.
Step nine, covering photoresist on the silicon dioxide passivation layer and etching to form a terminal area oxide layer 6 and a Schottky contact window, removing the photoresist and cleaning; the termination region oxide layer 6 extends from the location of the outermost termination region p+ doped region 5 to the location of the innermost termination region p+ doped region 5. The schottky contact window extends from the active region P + doped region 8 to cover a portion of the termination region oxide layer 6.
And step ten, depositing metal Ni on the surface of the product prepared in the step nine, and etching metal outside the Schottky contact window to form the Schottky contact anode 7. The schottky contact anode 7 extends from the active region P + doped region 8 to cover a portion of the termination region oxide layer 6.
In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings are merely for convenience in describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present invention.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present invention, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.
In the present invention, unless explicitly specified and limited otherwise, the terms "mounted," "connected," "secured," and the like are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communicated with the inside of two elements or the interaction relationship of the two elements. The specific meaning of the above terms in the present invention can be understood by those of ordinary skill in the art according to the specific circumstances.
In the present invention, unless expressly stated or limited otherwise, a first feature "above" or "below" a second feature may include both the first and second features being in direct contact, as well as the first and second features not being in direct contact but being in contact with each other through additional features therebetween. Moreover, a first feature being "above," "over" and "on" a second feature includes the first feature being directly above and obliquely above the second feature, or simply indicating that the first feature is higher in level than the second feature. The first feature being "under", "below" and "beneath" the second feature includes the first feature being directly under and obliquely below the second feature, or simply means that the first feature is less level than the second feature.
In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms are not necessarily directed to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Further, one skilled in the art can engage and combine the different embodiments or examples described in this specification.
The foregoing is a further detailed description of the invention in connection with the preferred embodiments, and it is not intended that the invention be limited to the specific embodiments described. It will be apparent to those skilled in the art that several simple deductions or substitutions may be made without departing from the spirit of the invention, and these should be considered to be within the scope of the invention.
Claims (8)
1. A silicon carbide power device having an N-region surrounding a p+ graded ring, comprising: an ohmic contact cathode (1), an N+ substrate layer (2), an N-type epitaxial region (3), an N-region (4), a terminal region oxide layer (6) and a Schottky contact anode (7) which are arranged on the N-region (4) in sequence from bottom to top;
the N-region (4) is internally provided with a plurality of active region P+ doped regions (8) and a plurality of terminal region P+ doped regions (5);
the doping ion concentrations of the active region P+ doping region (8) and the terminal region P+ doping region (5) are distributed in a Gaussian manner so as to form a graded junction with low doping concentration gradient;
during ion implantation, performing multiple first ion implantation operations on the ion implantation window to form multiple active doped regions and multiple terminal doped regions; then, performing a plurality of second ion implantation operations on the ion implantation window to form a plurality of active region p+ doped regions (8) and a plurality of termination region p+ doped regions (5); the energy of each second ion implantation operation is sequentially increased, and the second ion implantation operation adopts high-energy low-dose ion implantation;
the doping concentration of the N-region (4) is smaller than that of the N-type epitaxial region (3), and the doping concentration of the N-type epitaxial region (3) is 5e15 cm -3 -1e17 cm -3 。
2. A silicon carbide power device with an N-region surrounding a p+ graded ring according to claim 1, wherein the doping concentration of the active region p+ doped region (8) and the termination region p+ doped region (5) is from 1e21 cm from the center to the edge -3 To 7e15 cm -3 Gradually decreasing.
3. A silicon carbide power device with an N-region surrounding a p+ graded ring according to claim 1, wherein the spacing between a plurality of said active region p+ doped regions (8) is 1.5-6 μm;
the distance between the first terminal region P+ doped region (5) at the inner side of the terminal region P+ doped region (5) and the adjacent second terminal region P+ doped region (5) is 1-3 mu m, and the distance between every two terminal regions P+ doped regions (5) from the third terminal region P+ doped region (5) to the outermost terminal region P+ doped region is sequentially increased by 0.2 mu m.
4. A silicon carbide power device according to claim 1, wherein the termination region oxide layer (6) extends from the location of the outermost termination region p+ doped region (5) to the location of the innermost termination region p+ doped region (5).
5. A silicon carbide power device according to claim 1, wherein the p+ graded ring is surrounded by an N-region, wherein the schottky contact anode (7) extends from the active region p+ doped region (8) to cover part of the termination region oxide layer (6).
6. A method for preparing a silicon carbide power device having an N-region surrounding a p+ graded ring, applied to prepare a silicon carbide power device according to any of claims 1-5, comprising the steps of:
step one, epitaxially growing an N-type epitaxial region (3) on an N+ substrate layer (2); the doping concentration of the N-type epitaxial region (3) is 5e15 cm -3 -1e17 cm -3 ；
Step two, epitaxially growing an N-region (4) on the N-type epitaxial region (3); wherein the doping concentration of the N-region (4) is smaller than that of the N-type epitaxial region (3);
step three, siO is deposited on the surface of the N-region (4) 2 Masking film and then etching the SiO 2 Masking film forms ion implantation window;
performing multiple first ion implantation operations on the ion implantation window to form multiple active doped regions and multiple terminal doped regions;
performing a plurality of second ion implantation operations on the ion implantation window to form a plurality of active region P+ doped regions (8) and a plurality of terminal region P+ doped regions (5); the energy of each second ion implantation operation is sequentially increased, so that the doping ion concentrations of the active region P+ doping region (8) and the terminal region P+ doping region (5) are Gaussian distribution, and a graded junction with low doping concentration gradient is formed; the second ion implantation operation adopts ion implantation with high energy and low dosage;
step six, depositing a silicon dioxide layer on the upper surface of the product prepared in the step five, and then removing the SiO 2 A masking film and the silicon dioxide layer;
step seven, oxidizing the lower surface of the N+ substrate layer (2) to form an oxide layer with preset thickness, depositing a silicon dioxide passivation layer on the upper surface of the product prepared in the step six, smearing photoresist on the silicon dioxide passivation layer on the upper surface, removing the oxide layer on the lower surface of the N+ substrate layer (2), and removing the photoresist;
sputtering metal on the lower surface of the N+ substrate layer (2), and then annealing to form an ohmic contact cathode (1);
step nine, covering photoresist on the silicon dioxide passivation layer and etching to form a terminal area oxide layer (6) and a Schottky contact window;
and step ten, depositing metal on the surface of the product prepared in the step nine, and etching the metal outside the Schottky contact window to form a Schottky contact anode (7).
7. The method for manufacturing a silicon carbide power device having an N-region surrounding a p+ graded ring according to claim 6, wherein the specific steps of step one are as follows:
epitaxially growing an N-type epitaxial region (3) on the N+ substrate layer (2) by a chemical vapor deposition method;
the specific steps of the second step are as follows:
and epitaxially growing an N-region (4) on the N-type epitaxial region (3) by a chemical vapor deposition method.
8. The method of fabricating a silicon carbide power device having an N-region surrounding a p+ graded ring of claim 6, wherein the second ion implantation operation has an ion implantation energy of 250keV to 800keV;
the saidThe doping concentration of the active region P+ doping region (8) and the terminal region P+ doping region (5) is 1e21 cm from the center to the edge -3 To 7e15 cm -3 Gradually decreasing.
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| WO2011024214A1 (en) * | 2009-08-25 | 2011-03-03 | パナソニック株式会社 | Fast recovery diode |
| US8164154B1 (en) * | 2010-12-17 | 2012-04-24 | Aram Tanielian | Low profile Schottky barrier diode for solar cells and solar panels and method of fabrication thereof |
| CN103346169A (en) * | 2013-07-24 | 2013-10-09 | 清华大学 | Sic junction barrier schottky diode and manufacturing method thereof |
| CN114784119A (en) * | 2022-04-29 | 2022-07-22 | 中国振华集团永光电子有限公司（国营第八七三厂） | 4H-SiC JBS diode core with metallized front surface and manufacturing method thereof |
| CN115440794A (en) * | 2022-08-30 | 2022-12-06 | 西安电子科技大学 | Silicon carbide power device |
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| WO2011024214A1 (en) * | 2009-08-25 | 2011-03-03 | パナソニック株式会社 | Fast recovery diode |
| US8164154B1 (en) * | 2010-12-17 | 2012-04-24 | Aram Tanielian | Low profile Schottky barrier diode for solar cells and solar panels and method of fabrication thereof |
| CN103346169A (en) * | 2013-07-24 | 2013-10-09 | 清华大学 | Sic junction barrier schottky diode and manufacturing method thereof |
| CN114784119A (en) * | 2022-04-29 | 2022-07-22 | 中国振华集团永光电子有限公司（国营第八七三厂） | 4H-SiC JBS diode core with metallized front surface and manufacturing method thereof |
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