CN107768251A - 一种基于鼓泡法的石墨烯场效应晶体管的制备方法 - Google Patents

一种基于鼓泡法的石墨烯场效应晶体管的制备方法 Download PDF

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CN107768251A
CN107768251A CN201710966517.XA CN201710966517A CN107768251A CN 107768251 A CN107768251 A CN 107768251A CN 201710966517 A CN201710966517 A CN 201710966517A CN 107768251 A CN107768251 A CN 107768251A
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graphene
effect transistor
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王权
曾元明
董金耀
王江祥
韦国成
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ZHENJIANG ELECTRONIC TUBE FACTORY
Jiangsu University
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Abstract

本发明公开一种石墨烯场效应晶体管,特指一种基于鼓泡法的石墨烯场效应晶体管的制备方法,包括:提供衬底,在所选衬底上形成氧化层;在氧化层上进行光刻打孔;在孔上方转移形成双层石墨烯沟道;将转移后的石墨烯放在抽真空机中,进行抽真空操作,然后进行充气,充入氮气。本发明采用密闭条件下在真空泵中,对于悬置于孔上方的石墨烯进行压缩抽真空,增大了石墨烯的应力,提高了石墨烯场效应晶体管的开关比,增强了场效应晶体管的敏感特性。

Description

一种基于鼓泡法的石墨烯场效应晶体管的制备方法
技术领域
本发明涉及石墨烯场效应晶体管,尤其涉及一种基于鼓泡法的石墨烯场效应晶体管的制备方法。
背景技术
石墨烯(Graphene)是一种二维薄膜纳米材料,其基本原子结构单元是由sp2杂化的碳原子组成的类似苯环结构,这种类似蜂窝状的六角稳固晶格结构让石墨烯具有良好的光学、电学特性,又因为石墨烯与硅基半导体工艺的兼容性,而引起学术界和工业界的广泛关注。
随着半导体工业的迅速发展和不断进步,半导体工业工艺技术也取得很大进步,然而,由于摩尔定律的预言,“集成电路上可容纳的元器件的数目,约每隔18-24个月便会增加一倍,性能也将提升一倍”。这一定律说明了信息技术发展的速度。但由于器件的性能受到石墨烯自身部分因素的影响,单层石墨烯是零带隙结构、具有金属性的薄膜材料,为了在最低导带和最高价带之间打开一个能隙,有三种方法:一是将石墨烯切割成一维结构,即石墨烯纳米带;二是采用具有微细带隙的双层石墨烯;三是改变石墨烯的特性,引入应力。
石墨烯纳米带的概念最早由日本物理学家Fujita和同事于1996年提出。在这个开创性工作中,作者提出石墨烯纳米带的电子能带结构高度取决于其宽度和边缘对称结构。石墨烯纳米带是在电子束或离子束下进行定位剪裁石墨烯得到的,也可以通过轴向切割碳纳米管直接得到石墨烯纳米带。从而打开石墨烯的带隙。这几种方法过程复杂,难以控制,成本过高。对于石墨烯器件,将石墨烯加工成纳米带应用于电子器件,特别对于顶栅器件而言,不是最优方法。
采用机械剥离法得到的石墨烯,是目前制备方法中最简单的一种,由于石墨烯是层状结构,多层石墨烯由单层石墨烯堆叠而成的,层与层之间的相互作用力非常弱,很容易得到薄薄的石墨烯片层。机械剥离法简单易行,可以制备出高质量,没有缺陷、具有良好性质的单、双、多层石墨烯。并且可以将石墨烯直接转移到衬底上,避免了二次转移造成对石墨烯的污染。
发明内容
本发明的主要内容是为了克服上述现有实际条件的约束和不足,提供一种顶栅结构的基于石墨烯场效应晶体管的制备方法。可以准确引入应力打开石墨烯带隙,同时,采用机械剥离法得到高质量、性能优异的双层石墨烯,避免了二次转移对石墨烯造成污染,制备出高质量、低成本的石墨烯场效应晶体管。
本发明顶栅结构的石墨烯场效应晶体管的制备采用的技术方案是:
(1)在所提供的硅衬底上热氧化生长300nm的SiO2氧化层;
(2)对衬底进行烘烤,保持衬底表面干燥洁净,保持表面绝对干燥,涂覆一层HMDS化学增附剂,防止脱落,均匀旋涂光刻胶,然后烘干使胶固化,进行曝光、显影,将掩模板上图形转移到光刻胶上,进行光刻;
(3)通过机械剥离法得到的石墨烯转移到制作好的衬底上的步骤;
(4)将衬底放入抽真空泵中,改变石墨烯表面应力的步骤:将衬底植入抽真空泵中,将密封装置抽至低压状态,控制真空泵内部压力值,然后通入N2,利用空腔内部和外部不同压强的作用,首先,使石墨烯向空腔内收缩,然后通入N2,气体通过石墨烯与衬底之间的间隙,内部压强增大,石墨烯向外膨胀;
(5)在石墨烯两端分别溅射TiW和Au作为场效应晶体管的源极和漏极的步骤;
(6)在源极和漏极之间的石墨烯沟道上方形成一层缓冲层ZrO2和栅介质层HfO2,溅射Au,作为栅极,形成一种顶栅结构的基于石墨烯的场效应晶体管。
本发明的有益效果是:1.石墨烯材料采用机械剥离法制备,所得到的石墨烯质量更高,可直接转移到衬底上,避免二次转移造成的污染;2.采用电子曝光技术,在衬底上形成一个孔槽,转移上石墨烯,形成一个空腔;3.将转移后的衬底,放置于真空泵中,将系统抽至真空,打开衬底与石墨烯的间隙,然后增大压强至0.2~0.4MPa,气体进入空腔,石墨烯向外膨胀,改变了石墨烯的表面应力,从而增大了双层石墨烯的带隙,提高开关比,增加了基于双层石墨烯场效应晶体管传感器的灵敏度;4.避免使用改性技术,减少了晶体管的制造时间,节约了制造成本;5.在步骤(4)中,通过改变系统的压强,可以达到对引入应力大小的可控,从而控制场效应晶体管的开关比;6.在石墨烯表面覆盖一层缓冲层ZrO2,然后通过原子沉积的方法实现了HfO2沉积均匀,ZrO2和HfO2介电常数相近,晶体结构相同,ZrO2相当于等效介质层,减小了原子层沉积HfO2的厚度,并且缓冲层有效地保护了石墨烯沟道,避免了在沉积HfO2过程中对沟道的损坏。
附图说明
图1是硅衬底上热氧化形成SiO2氧化层的结构示意图;
图2是反应离子刻蚀后形成的孔槽结构示意图;
图3是图2转移双层石墨烯之后形成空腔的结构示意图;
图4是图3中向空腔中引入气体,改变空腔内外的压强后的结构示意图;
图5是在双层石墨烯上形成源、漏电极的结构示意图;
图6是在双层石墨烯上形成缓冲层,栅介质层和的示意图。
图中:1—Si衬底;2—SiO2氧化层;3—双层石墨烯;4—TiW/Au源电极;5—氧化锆(ZrO2)薄膜;6—氧化铪(HfO2)薄膜;7—TiW/Au栅电极;8—TiW/Au漏电极。
具体实施方式
本发明先通过热氧化在Si衬底上形成300nm厚的SiO2氧化层,然后对SiO2表面预处理,在150~200℃烘箱中烘烧15~30min,保持表面干燥洁净,涂覆一层HMDS化学增附剂,防止脱落。均匀旋涂光刻胶及光刻胶烘干,使胶固化,然后进行曝光、显影,实现图形化的转移。在未旋涂光刻胶的SiO2的表面处刻蚀形成小孔的步骤:利用反应离子刻蚀方法,在未旋涂光刻胶的SiO2表面刻蚀形成250nm深、直径10um的孔槽,并用丙酮蒸汽清洗光刻胶,再用乙醇、去离子水对样品进行清洗,如图2所示的孔槽结构示意图。机械剥离法制备双层石墨烯采用的是特殊的3M思高牌胶带,使用镊子夹取16cm长的胶带粘附在少量高定向热解石墨片表面,轻轻压实,使石墨紧紧粘附在胶带上,慢慢撕下,胶带表面会粘附一层很薄的石墨薄片。然后将胶带两端对折,使石墨烯薄片夹在胶带具有粘性一侧的中间,亲亲压实,慢慢撕下。平稳的将石墨薄片一分为二。完美剥离后的石墨薄片表面如原子般平滑,复制出的石墨薄片是发亮的。重复4到10次剥离,直到胶带上出现颜色如墨水斑点一样的石墨薄片。慢慢的将粘附有石墨烯薄片的胶带贴附在氧化的硅片上,轻轻的挤压掉胶带和硅片之间的空气,使样品和胶带完全贴附,保持5~10min,慢慢撕下胶带。这时数千个小片石墨粘附到硅片上,而其中就存在少层、双层、甚至单层的石墨烯。采用拉曼光谱仪(RamanSpectroscopy)可以找到覆盖在孔槽上方的双层石墨烯,如图3所示。
将转移后的样品放置于真空泵中,将系统抽至真空,从而打开石墨烯与衬底之间的间隙,空腔内压强小于外压强,由于压差的作用,石墨烯向内收缩,进一步向系统通入N2,增大压强至0.2~0.4MPa,气体通过间隙进入到空腔,空腔内压强大于外压强,石墨烯向外膨胀,由于石墨烯与衬底之间存在范德华结合力,石墨烯可以向外膨胀到高150~300nm的位置,从而引入应力,增大了双层石墨烯的带隙。结构示意图如图4所示。
采用磁控溅射的方法,在石墨烯两端分别溅射TiW和Au作为场效应晶体管的源极和漏极,分别以TiW和Au作为靶材,溅射厚度分别为10nm和60nm。即TiW/Au源电极4、TiW/Au漏电极7。
进一步,将氧化锆粉末溶于乙醇溶液,滴在石墨烯沟道上方,在120℃下烘干,形成10nm后ZrO2缓冲层,然后使用原子层沉积的方法,将HfO2的沉积在缓冲层上方,作为栅介质层,沉积厚度为20~40nm。溅射60nm厚的Au,作为栅极,形成一种顶栅结构的石墨烯场效应晶体管。

Claims (9)

1.一种基于鼓泡法的石墨烯场效应晶体管的制备方法,其特征包括以下几个步骤:
(1)在提供硅衬底上生长形成氧化层SiO2的过程;
(2)对SiO2表面进行预处理,保持表面绝对干燥,涂覆一层HMDS化学增附剂,防止脱落,均匀旋涂光刻胶,然后烘干使胶固化,进行曝光、显影,将掩模板上图形转移到光刻胶上,进行光刻;
(3)通过机械剥离法得到的石墨烯转移到制作好的衬底上的步骤;
(4)将衬底放入抽真空泵中,改变石墨烯表面应力的步骤:将衬底植入抽真空泵中,将密封装置抽至低压状态,控制真空泵内部压力值,然后通入N2,利用孔内部和外部不同压强的作用,首先,使石墨烯向孔内部压缩,然后通入N2,气体通过石墨烯与衬底之间的间隙,内部压强增大,石墨烯向外膨胀;
(5)在石墨烯两端分别溅射TiW和Au作为场效应晶体管的源极和漏极的步骤;
(6)在源极和漏极之间的石墨烯沟道上方形成一层缓冲层ZrO2和栅介质层HfO2,溅射Au,作为栅极,形成一种顶栅结构的石墨烯场效应晶体管。
2.根据权利要求1所述的一种基于鼓泡法的石墨烯场效应晶体管的制备方法,其特征在于:所述步骤(1)中,在硅衬底上生长石墨烯的步骤是指,在Si衬底表面热氧化生长出300nm厚的SiO2,控制温度在1000~1050℃,时间为20~30min。
3.根据权利要求1所述的一种基于鼓泡法的石墨烯场效应晶体管的制备方法,其特征在于:所述步骤(2)中,对SiO2表面预处理,在150~200℃烘箱中烘烧15~30min,保持表面干燥洁净,涂覆一层HMDS化学增附剂,防止脱落。均匀旋涂光刻胶及光刻胶烘干,使胶固化,然后进行曝光、显影,实现图形化的转移。
4.根据权利要求1所述的一种基于鼓泡法的石墨烯场效应晶体管的制备方法,其特征在于:所述步骤(2)中,在未旋涂光刻胶的SiO2的表面处刻蚀形成小孔的步骤:利用反应离子刻蚀方法,在未旋涂光刻胶的SiO2表面刻蚀形成250nm深的孔槽,并用丙酮蒸汽清洗光刻胶,再用乙醇、去离子水对样品进行清洗。
5.根据权利要求1所述的一种基于鼓泡法的石墨烯场效应晶体管的制备方法,其特征在于:所述步骤(3)中,通过机械剥离法得到的石墨烯转移到制作好的衬底上的步骤:通过胶带对石墨的反复剥离,使石墨烯从石墨晶体中分离出来,直接转移到SiO2/Si衬底上,与孔槽形成一个空腔结构。
6.根据权利要求1所述的一种基于鼓泡法的石墨烯场效应晶体管的制备方法,其特征在于:所述步骤(4)中,将转移后衬底放入抽真空泵中,将系统中气体抽出,至真空状态,然后通入N2,增大压强至0.2~0.4MPa,气体进入空腔中,石墨向外烯膨胀产生表面应力。
7.根据权利要求1所述的一种基于鼓泡法的石墨烯场效应晶体管的制备方法,其特征在于:所述步骤(5)中,采用磁控溅射的方法,在石墨烯两端分别溅射TiW和Au作为场效应晶体管的源极和漏极,分别以TiW和Au作为靶材,溅射厚度分别为10nm和60nm。
8.根据权利要求1所述的一种基于鼓泡法的石墨烯场效应晶体管的制备方法,其特征在于:所述步骤(6)中,在源极和漏极之间的石墨烯沟道上方形成一层缓冲层ZrO2和栅介质层HfO2:首先将氧化锆粉末溶于乙醇溶液,滴在石墨烯沟道上方,在120℃下烘干,形成10nm后ZrO2缓冲层,然后使用原子层沉积的方法,将HfO2的沉积在缓冲层上方,作为栅介质层,沉积厚度为20~40nm。
9.根据权利要求1所述的一种基于鼓泡法的石墨烯场效应晶体管的制备方法,其特征在于:所述步骤(6)中,采用磁控溅射的方法,选用Au作为靶材,在HfO2层上溅射厚度为60nm的Au,作为场效应晶体管的栅极。
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114544064A (zh) * 2022-01-17 2022-05-27 江苏科技大学 一种谐振式石墨烯气体压力传感器

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102339735A (zh) * 2011-10-12 2012-02-01 北京大学 一种石墨烯晶体管的制备方法
CN103794495A (zh) * 2014-02-17 2014-05-14 江苏大学 一种基于石墨烯场效应晶体管的制备方法
CN105047562A (zh) * 2015-06-26 2015-11-11 中国电子科技集团公司第十三研究所 半悬浮石墨烯场效晶体管制备方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102339735A (zh) * 2011-10-12 2012-02-01 北京大学 一种石墨烯晶体管的制备方法
CN103794495A (zh) * 2014-02-17 2014-05-14 江苏大学 一种基于石墨烯场效应晶体管的制备方法
CN105047562A (zh) * 2015-06-26 2015-11-11 中国电子科技集团公司第十三研究所 半悬浮石墨烯场效晶体管制备方法

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
A.D. SMITH等: "Strain Engineering in Suspended Graphene Devices for Pressure Sensor Applications", 《2012 13TH INTERNATIONAL CONFERENCE ON ULTIMATE INTEGRATION ON SILICON (ULIS)》 *
DINH SY HIEN等: "Modeling of planar carbon nanotube field effect transistor and three dimensional simulation of current-voltage characteristics", 《APCTP–ASEAN WORKSHOP ON ADVANCED MATERIALS SCIENCE AND NANOTECHNOLOGY (AMSN08), JOURNAL OF PHYSICS: CONFERENCE SERIES》 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114544064A (zh) * 2022-01-17 2022-05-27 江苏科技大学 一种谐振式石墨烯气体压力传感器
CN114544064B (zh) * 2022-01-17 2023-11-21 江苏科技大学 一种谐振式石墨烯气体压力传感器

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