CN107766195A - It is a kind of to be used for the functional verification platform building method based on OPB bus designs - Google Patents
It is a kind of to be used for the functional verification platform building method based on OPB bus designs Download PDFInfo
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- CN107766195A CN107766195A CN201710993040.4A CN201710993040A CN107766195A CN 107766195 A CN107766195 A CN 107766195A CN 201710993040 A CN201710993040 A CN 201710993040A CN 107766195 A CN107766195 A CN 107766195A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
- G06F11/263—Generation of test inputs, e.g. test vectors, patterns or sequences ; with adaptation of the tested hardware for testability with external testers
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
- G06F30/398—Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]
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Abstract
Present invention offer is a kind of to be used for the functional verification platform building method based on OPB bus designs, belongs to IC design verification technical fields, and this method carries out building for verification platform using script and hardware description language, and the specific implementation step of this method includes：Register information document is established according to the parameter of the internal register of tested OPB bus designs and ram modules；Automatized script is write, completes generation, operation and the control of test vector according to register information document with the automatized script, and accommodation is carried out in test vector to the register with special data processing procedure；The output information control script of verification platform and the Run Script of verification platform are write by automatized script；Commissioning test test vector, complete building for verification platform.The present invention realizes controls document and arbitration modules working method to describe document automation and complete test vector generation and operation using automatized script according to internal register and ram module informations document, chip initiation.
Description
Technical field
It is specifically a kind of to be used for the function based on OPB bus designs the present invention relates to IC design verification technical fields
Verification platform building method.
Background technology
At present, ic manufacturing technology improves rapidly, while market constantly increases to the demand of high integration product, leads
Cause the complexity of integrated circuit in exponential increase.With the increase of IC complexity, validation difficulty is increased with higher speed
Add.Therefore, the fulfillment capability of checking work is improved, has become the emphasis and difficult point of large scale integrated circuit exploitation.
Core connect be IBM Corporation propose towards core+ASIC exploitation or SoC design bus specification, can be
Whole system provides efficient, complete connected mode, and it includes three kinds of different bus types, i.e. processor internal bus OPB
（Process Local Bus）, peripheral bus OPB on piece（On-Chip Peripheral Bus) and equipment controlling bus DCR
（Devices Control Register）.OPB buses are used to connect low-speed peripheral, can support a variety of data bit widths.Bus
The right to use is allocated by moderator, and arbitration mechanism is flexible.OPB buses are the piths in Core connect buses, are
Each design based on OPB buses develops a verification platform and is used for carrying out the register inside design and ram modules
Emulation testing is the work of very very complicated.
Based on this, for the disclosure and versatility of OPB bus protocols, design is a kind of to be used for the work(based on OPB bus designs
Platform building method is able to verify that, significantly to shorten to the exploitation that functional verification platform is built in the different designs based on OPB buses
In the cycle, improve functional verification efficiency.
The content of the invention
The technical assignment of the present invention is that solve the deficiencies in the prior art, there is provided a kind of to be used for the work(based on OPB bus designs
Platform building method is able to verify that, is realized initial according to internal register and ram module informations document, chip using automatized script
Change control document and arbitration modules working method describes document automation and completes test vector generation and operation.
The technical solution adopted for the present invention to solve the technical problems is：
A kind of to be used for the functional verification platform building method based on OPB bus designs, this method is retouched using script and hardware
Predicate speech carries out building for verification platform, and the specific implementation step of this method includes：
1）Register information document is established according to the parameter of the internal register of tested OPB bus designs and ram modules；
2）Automatized script is write, completes generation, the operation of test vector according to register information document with the automatized script
And control, and accommodation is carried out in test vector to the register with special data processing procedure；
3）The output information control script of verification platform and the Run Script of verification platform are write by automatized script；
4）Commissioning test test vector, complete building for verification platform.
Involved internal register and ram module information document is completed to write according to based on OPB bus designs, including：
The internal register and ram modules of tested OPB bus designs can be conducted interviews by using OPB buses；
Address of the information document comprising internal register and ram modules, data width, depth, reading/writing characteristics, read write command delay
And read-write associated order information.
Carrying out step 1）With step 2）When, this method also needs to the chip initiation control according to tested OPB bus designs
Document processed and arbitration modules working method describe generation, operation and the control that document completes test vector.
Involved chip initiation control document is completed to write according to the initial work flow based on OPB bus designs,
The initial work flow of involved OPB bus designs includes stable clock signal time, reset signals enable time, inside
Each timely sequence information of Special controlling signal list.
Involved arbitration modules working method describes document based on the arbitration mode selected in OPB buses, arbitration mode bag
Include whether supporting bus locking and atomic operation, each connection peripheral module precedence information and interrupt priority level information, according to rule
The formula that fixes is completed.
Involved automatized script is used to write test vector generation script, output information control script and Run Script,
Meanwhile automatized script also needs to write the read write command ATL for meeting agreement timing requirements according to OPB agreements.Automate pin
Originally and command module storehouse is all that can be based on being multiplexed in OPB bus designs in difference.
Involved automatized script can select perl, tcl or c-shell scripting language.
Involved test vector generation script is by reading internal register and ram module informations document structure tree for deposit
The specific test vector of device and ram modules.
Involved output information control script by reserved control port in test process according to be actually needed carry out it is defeated
Go out the classification control of information.
Involved Run Script controls document to automatically generate for based on the initial of OPB bus designs according to chip initiation
Environment configurations order simultaneously performs, and performs test vector afterwards, completes test process and generates test report.
The a kind of of the present invention is used for the institute compared with prior art of the functional verification platform building method based on OPB bus designs
Caused beneficial effect is：
1）The method of the present invention realizes that automatically complete verification platform builds and run work by using automatized script；
Verification platform test command is write by measured OPB bus protocols, realized to the general of the design respectively based on OPB buses
Readwrite tests；The correct test for particular memory module is realized by using internal register and ram module informations document；It is logical
Cross the configuration realized using chip initiation control document to the initial authentication environment of different designs；
2）The method of the present invention has the advantages of easy to implement, flow is simple, efficient stable, can significantly shorten to different bases
Built the construction cycle of functional verification platform in the design of OPB buses, improve functional verification efficiency.
Embodiment
The a kind of of the present invention is made in detailed below for the functional verification platform building method based on OPB bus designs below
Explanation.
The a kind of of the present invention is used for the functional verification platform building method based on OPB bus designs, and this method uses script
Language and hardware description language carry out building for verification platform, and the specific implementation step of this method includes：
1）Register information document is established according to the parameter of the internal register of tested OPB bus designs and ram modules；
2）Automatized script is write, completes generation, the operation of test vector according to register information document with the automatized script
And control, and accommodation is carried out in test vector to the register with special data processing procedure；
3）The output information control script of verification platform and the Run Script of verification platform are write by automatized script；
4）Commissioning test test vector, complete building for verification platform.
Involved internal register and ram module information document is completed to write according to based on OPB bus designs, including：
The internal register and ram modules of tested OPB bus designs can be conducted interviews by using OPB buses；
Address of the information document comprising internal register and ram modules, data width, depth, reading/writing characteristics, read write command delay
And read-write associated order information.
Carrying out step 1）With step 2）When, this method also needs to the chip initiation control according to tested OPB bus designs
Document processed and arbitration modules working method describe generation, operation and the control that document completes test vector.
Involved chip initiation control document is completed to write according to the initial work flow based on OPB bus designs,
The initial work flow of involved OPB bus designs includes stable clock signal time, reset signals enable time, inside
Each timely sequence information of Special controlling signal list.
Involved arbitration modules working method describes document based on the arbitration mode selected in OPB buses, arbitration mode bag
Include whether supporting bus locking and atomic operation, each connection peripheral module precedence information and interrupt priority level information, according to rule
The formula that fixes is completed.
Involved automatized script is used to write test vector generation script, output information control script and Run Script,
Meanwhile automatized script also needs to write the read write command ATL for meeting agreement timing requirements according to OPB agreements.Automate pin
Originally and command module storehouse is all that can be based on being multiplexed in OPB bus designs in difference.
Involved automatized script can select perl, tcl or c-shell scripting language.
Involved test vector generation script is by reading internal register and ram module informations document structure tree for deposit
The specific test vector of device and ram modules.
Involved output information control script by reserved control port in test process according to be actually needed carry out it is defeated
Go out the classification control of information.
Involved Run Script controls document to automatically generate for based on the initial of OPB bus designs according to chip initiation
Environment configurations order simultaneously performs, and performs test vector afterwards, completes test process and generates test report.
The present invention realize automatically complete verification platform build and run work, realize to being respectively based on OPB buses
The general readwrite tests of design, realizes the correct test for particular memory module and the initial authentication ring to different designs
The configuration in border, there is the advantages of easy to implement, flow is simple, efficient stable, can significantly shorten to different based on OPB buses
Design build construction cycle of functional verification platform, improve functional verification efficiency.
In summary, above content is merely illustrative of the technical solution of the present invention, rather than the limit to the scope of the present invention
System, although the specific embodiment part explains to the present invention, it will be understood by those within the art that,
Technical scheme can be modified or equivalent substitution, without departing from the essence and model of technical solution of the present invention
Enclose.
Claims (10)
1. a kind of be used for the functional verification platform building method based on OPB bus designs, it is characterised in that this method uses script
Language and hardware description language carry out building for verification platform, and the specific implementation step of this method includes：
1）Register information document is established according to the parameter of the internal register of tested OPB bus designs and ram modules；
2）Automatized script is write, completes generation, the operation of test vector according to register information document with the automatized script
And control, and accommodation is carried out in test vector to the register with special data processing procedure；
3）The output information control script of verification platform and the Run Script of verification platform are write by automatized script；
4）Commissioning test test vector, complete building for verification platform.
2. a kind of it is used for the functional verification platform building method based on OPB bus designs, its feature according to claim 1
It is, internal register and ram the module information document is completed to write according to based on OPB bus designs, including：
The internal register and ram modules of the tested OPB bus designs can be conducted interviews by using OPB buses；
Address of the described information document comprising internal register and ram modules, data width, depth, reading/writing characteristics, read write command
Delay and read-write associated order information.
3. a kind of it is used for the functional verification platform building method based on OPB bus designs, its feature according to claim 1
It is, is carrying out step 1）With step 2）When, this method also needs to the chip initiation control text according to tested OPB bus designs
Shelves and arbitration modules working method describe generation, operation and the control that document completes test vector.
4. a kind of it is used for the functional verification platform building method based on OPB bus designs, its feature according to claim 3
It is, the chip initiation control document is completed to write according to the initial work flow based on OPB bus designs, described
The initial work flow of OPB bus designs is each special including stable clock signal time, reset signals enable time, inside
Control signal list and timing information.
5. a kind of it is used for the functional verification platform building method based on OPB bus designs, its feature according to claim 3
It is, the arbitration modules working method is described document and included whether based on the arbitration mode selected in OPB buses, arbitration mode
Supporting bus locks and atomic operation, each connection peripheral module precedence information and interrupt priority level information, according to regulation form
Complete.
6. a kind of it is used for the functional verification platform building method based on OPB bus designs, its feature according to claim 3
It is, the automatized script is used to write test vector generation script, output information control script and Run Script, meanwhile,
Automatized script also needs to write the read write command ATL for meeting agreement timing requirements according to OPB agreements.
7. a kind of it is used for the functional verification platform building method based on OPB bus designs, its feature according to claim 6
It is, the automatized script can select perl, tcl or c-shell scripting language.
8. a kind of it is used for the functional verification platform building method based on OPB bus designs, its feature according to claim 6
Be, the test vector generation script by read internal register and ram module informations document structure tree for register and
The specific test vector of ram modules.
9. a kind of it is used for the functional verification platform building method based on OPB bus designs, its feature according to claim 6
It is, by reserved control port, the basis in test process is actually needed carry out output information to the output information control script
Classification control.
10. it is according to claim 6 it is a kind of be used for the functional verification platform building method based on OPB bus designs, it is special
Sign is that the Run Script controls document to automatically generate and is directed to the initial ring based on OPB bus designs according to chip initiation
Border configuration order simultaneously performs, and performs test vector afterwards, completes test process and generates test report.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN116224042A (en) * | 2023-04-28 | 2023-06-06 | 北京壁仞科技开发有限公司 | Method, system, apparatus and medium for generating test vector for testing device under test |
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| CN105069227A (en) * | 2015-08-03 | 2015-11-18 | 浪潮集团有限公司 | Method for building function verification platform based on WISHBONE bus design |
| CN105446847A (en) * | 2014-09-26 | 2016-03-30 | 中国航空工业第六一八研究所 | Automatic testing system and method for ARINC659 buses |
| CN106528392A (en) * | 2015-09-09 | 2017-03-22 | 黑龙江傲立辅龙科技开发有限公司 | Aurora protocol-based B3G (beyond third generation) testing tool |
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Patent Citations (4)
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| US20060119388A1 (en) * | 2004-01-11 | 2006-06-08 | Stmicroelectronics Pvt. Ltd. | FPGA having a direct routing structure |
| CN105446847A (en) * | 2014-09-26 | 2016-03-30 | 中国航空工业第六一八研究所 | Automatic testing system and method for ARINC659 buses |
| CN105069227A (en) * | 2015-08-03 | 2015-11-18 | 浪潮集团有限公司 | Method for building function verification platform based on WISHBONE bus design |
| CN106528392A (en) * | 2015-09-09 | 2017-03-22 | 黑龙江傲立辅龙科技开发有限公司 | Aurora protocol-based B3G (beyond third generation) testing tool |
Cited By (2)
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| CN116224042A (en) * | 2023-04-28 | 2023-06-06 | 北京壁仞科技开发有限公司 | Method, system, apparatus and medium for generating test vector for testing device under test |
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Application publication date: 20180306 |