CN105446847A - Automatic testing system and method for ARINC659 buses - Google Patents
Automatic testing system and method for ARINC659 buses Download PDFInfo
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Abstract
The invention discloses an automatic testing system for ARINC659 buses, and can solve the problem of in-batch testing of the ARINC659 buses. The automatic testing system has a complete testing function, is simple to operate, and provides an effective testing means for wide popularization and application of the ARINC659 buses. The automatic testing system for the ARINC659 buses is characterized in that according to a testing scheme, the system comprises an RS232 serial port module, a main controller module, a power supply module and tested ARINC659 modules. The RS232 module is used for completing information interaction between an upper computer and the testing system, a user can select testing options by a hyperterminal in the upper computer, and the RS232 module sends the testing options to the main controller module. The main controller module receives the testing options from the upper computer, selects the tested modules according to the testing options, and completes full-function testing for each tested module. The power supply module is used for generating all tertiary power supplies required by the testing system.
Description
Technical field
The present invention relates to system level testing field, particularly relate to the field tests of air line internal bus.
Background technology
ARINC659 bus is a kind ofly proposed by HoneyWell company and be successfully applied to the data bus of the Airplane Information Management System of Boeing 777, there is high throughput, strict fault isolation, data transmit characteristics such as determining, are high integrality backplane bus on the time (bus transfer time) and on space (storage space) with high fault tolerance and robustness.Due to high security, the high reliability of this bus, use in multiple aircraft type at home at present, demand presents the trend of cumulative year after year.
ARINC659 module is the versatility in order to improve ARINC659 bus, based on ARINC659 bus protocol, and a circuit module achieving bus physical layer, data link layer functions of exploitation.Because this module demand is large, function is complicated, security requirement is high, need to develop a set of automatic test environment.
Herein based on the embedded development platform of XILINX company, by PLB bus, multiple IP is connected on a processor, complete the complete test to ARINC659 functions of modules.
Summary of the invention
The object of the invention is the automatic test scheme proposing a kind of ARINC659 bus, solve demand large, function complicated, the security high requirement of current ARINC659 bus in mass application, improve testing efficiency and the range of application of ARINC659 bus.
The technical scheme that the present invention takes is, a kind of automatization test system of ARINC659 bus, and system testing scheme comprises: RS232 serial port module, main controller module, power module and tested ARINC659 module.
RS232 module, for completing the information interaction between host computer and test macro, user can select test option by the hyper terminal in host computer, and test option is sent to main controller module by RS232 module.
Main controller module, receives the test option from host computer, selects tested module according to test option, completes global function test for each tested module.Wherein comprise further:
Primary processor, for the realization of test code, and by PLB bus marco clock generator, reseting generator, ARINC659 address data control bus module, slot generation module, discrete signal generation module, look-at-me generation module, IEEE1149.5 bus module, serial port protocol layer module.
Clock generator, for generation of system clock.
Reseting generator, for generation of systematic reset signal, Low level effective.
ARINC659 address data control bus module, the address date control port of simulation ARINC659, by this module complete for ARINC659 all data spaces read-write ' 0 ', ' 1 ', ' 55 ', the operation of ' AA ', the access of all registers of ARINC659 protocol layer and test, the test of the external discrete signal of ARINC659.
Slot generation module, produces the positional information of four tested modules by GPIO port.
Discrete signal generation module, produces the external discrete signal of ARINC659 by GPIO port.
Look-at-me generation module, produces the interruption control signal of ARINC659 by GPIO port, effectively low.
IEEE1149.5 bus module, the IEEE1149.5 bus protocol that encapsulation realizes, becomes special I P, is articulated in PLB bus, for the loading of the test chart program of ARINC659.
Serial port protocol layer module, package specific serial port protocol layer IP, is articulated in PLB bus, for realizing the information interaction with host computer.
Power module, for generation of all three secondary sources that test macro needs.
The automated testing method of a kind of ARINC659 provided by the invention, the method includes the steps of:
A, test macro send test homepage to host computer, and comprise 16 ARINC659 tests, 32 ARINC659 tests, all tested modules are tested simultaneously, and tested module divides BT(batch testing), tested module list procedure to load option.
First B, user select tested module list procedure to load option, tested module are carried out to the on-line loaded of test chart program.
After C, list procedure have loaded, carry out ARINC659 functional test, comprise further, the test of ARINC659 data buffer, the test of ARINC659 register district, the test of ARINC659 bus test, slot number, discrete signal test, look-at-me test.
Wherein, list procedure in step B loads, IEEE1149.5 bus module is adopted to carry out on-line loaded, write in the external memorizer of each tested module by test chart program by IEEE1149.5 bus, tested module reads the list procedure in external memorizer by controller, host computer also carries out read-write check, proof list program correctness by IEEE1149.5 bus retaking of a year or grade list procedure.
Wherein, ARINC659 data buffer test in step C, by all data spaces write ' 0 ' from main controller module to ARINC659, ' 1 ', ' 55 ', ' AA ' data, then retaking of a year or grade is compared, if consistent with retaking of a year or grade of write, prove the address data control bus of ARINC659 and data buffer area correct.
Wherein, the test of ARINC659 register district in step C, reads each register space of specifying by the address data control bus of ARINC659, and if agreement specify consistent, register testing passes through.
Wherein, ARINC659 bus test in step C, by all data spaces write ' 0 ' from main controller module to ARINC659, ' 1 ', ' 55 ', ' AA ' data, passed mutually carrying out data between four groups of tested modules by transmission and reception window in test chart program, then automatically compare the data of the data sent and reception in the host controller, if data consistent, ARINC659 bus test passes through.
Wherein, slot number test in step C, discrete signal test, look-at-me test, the slot number of each tested module, look-at-me and discrete signal is produced by GPIO, primary controller compares by reading the slot number of the corresponding register of ARINC659 and generation, look-at-me and discrete signal, if data consistent, ARINC659 bus test passes through.
The advantage that the present invention has and beneficial effect: the present invention is a kind of automatization test system of ARINC659 bus, for applying event Trigger Bus ARINC659 bus more and more widely at present, this method can complete the integrity authentication of these bus all functions, and the test simultaneously realized four groups of buses, full automation, greatly improve testing efficiency, improve test safety degree.
Accompanying drawing explanation
Fig. 1 is Design of Test System scheme schematic diagram of the present invention.
Fig. 2 is test macro master controller design proposal schematic diagram.
Fig. 3 is the typical flowchart of the present invention when testing.
Embodiment
The present invention proposes a kind of automatic test scheme of ARINC659 bus, solves demand large, function complicated, the security high requirement of current ARINC659 bus in mass application, improves testing efficiency and the range of application of ARINC659 bus.
Below in conjunction with Figure of description, the present invention is elaborated.
Fig. 1 gives system testing scheme of the present invention, comprising: RS232 serial port module, main controller module, power module and tested ARINC659 module.
RS232 module, for completing the information interaction between host computer and test macro, test option is sent to host computer by RS232 module by main controller module, and user can select test option by the hyper terminal in host computer.
Main controller module, receives the test option from host computer, selects tested module according to test option, completes global function test for each tested module.
Power module, for generation of all three secondary sources that test macro needs.
Fig. 2 gives the implementation of main controller module, comprising:
Primary processor, C language is adopted to complete the realization of test code, and by PLB bus marco clock generator, reseting generator, ARINC659 address data control bus module, slot generation module, discrete signal generation module, look-at-me generation module, IEEE1149.5 bus module, serial port protocol layer module.
The test code of primary processor is write according to following test function:
1. export the main interface of test to host computer, test main interface and comprise 16 ARINC659 tests, 32 ARINC659 tests, all tested modules are tested simultaneously, and tested module divides BT(batch testing) option.
2. by initialization function transmitting system reset signal, the slot signal of ARINC659, the discrete output signal of ARINC659 of GPIO.
3. enter 16 ARINC659 trial functions, to ARINC659 all data buffer area write ' 0 ', ' 1 ', ' 55 ', ' AA ', the data of back read data and write are carried out automatic comparison by back read data buffer area again, if consistent, data buffer area test is passed through.
4. enter 16 ARINC659 trial functions, read all register space of ARINC659 protocol layer, and desired value carries out automatic comparison, if consistent, register space test is passed through, and proves that ARINC659 bus exports correct simultaneously.
5. enter 16 ARINC659 trial functions, read ARINC659 discrete signal memory block, and the discrete signal that the initialization function of GPIO sends carries out automatic comparison, if consistent, discrete signal test is passed through.
6. enter 32 ARINC659 trial functions, to ARINC659 all data buffer area write ' 0 ', ' 1 ', ' 55 ', ' AA ', the data of back read data and write are carried out automatic comparison by back read data buffer area again, if consistent, data buffer area test is passed through.
7. enter 32 ARINC659 trial functions, read all register space of ARINC659 protocol layer, and desired value carries out automatic comparison, if consistent, register space test is passed through, and proves that ARINC659 bus exports correct simultaneously.
8. enter 32 ARINC659 trial functions, read ARINC659 discrete signal memory block, and the discrete signal that the initialization function of GPIO sends carries out automatic comparison, if consistent, discrete signal test is passed through.
9. enter list procedure loading function, initialization IEEE1149.5 protocol IP, completes the setting of IEEE1149.5 protocol IP, realizes the on-line loaded of list procedure.
Clock generator, for generation of system clock.
Reseting generator, for generation of systematic reset signal, Low level effective.
ARINC659 address data control bus module, according to the address date control port of the read-write sequence simulation ARINC659 of ARINC659, the access of all data spaces of ARINC659 is completed by this module, complete the access of ARINC659 register, complete the external discrete signal access of ARINC659.
Slot generation module, the slot number of the slot number being ' 1 ', second tested module by the slot number of GPIO initialization first tested module to be the slot number of the ' 2 ', three tested module be the ' 3 ', four tested module is ' 4 '.
Discrete signal generation module, produces the external discrete signal of ARINC659 by GPIO initialization.
Look-at-me generation module, produces the interruption control signal of ARINC659 by GPIO initialization, effectively low.
IEEE1149.5 bus module, the IEEE1149.5 bus protocol that encapsulation realizes, becomes special I P, is articulated in PLB bus, for the loading of the test chart program of ARINC659.
Serial port protocol layer module, package specific serial port protocol layer IP, is articulated in PLB bus, for realizing the information interaction with host computer.
Below in conjunction with Fig. 3, whole test process is described.
1. enter test principal function, complete the initialization of GPIO, the generation of ARINC659 slot number, the generation of reset signal.
2. test macro sends test homepage to host computer, and comprise 16 ARINC659 tests, 32 ARINC659 tests, all tested modules are tested simultaneously, and tested module divides the option such as BT(batch testing), the loading of tested module list procedure.
3. user selects tested module list procedure to load option, tested module is carried out to the on-line loaded of test chart program.
4. after list procedure has loaded, select 16 ARINC659 tests, 32 ARINC659 tests as required, all tested modules are tested simultaneously, tested module divides BT(batch testing) option, carry out ARINC659 functional test, after having tested, print the test of ARINC659 data buffer by mark, the test of ARINC659 register district by mark, ARINC659 bus test by mark, slot number test by mark, discrete signal test by mark, look-at-me test by mark etc.
5., not by the function items of test, print corresponding error flag, be convenient to location and the analysis of fault.
Claims (8)
1. an automatization test system for ARINC659 bus, is characterized in that, system testing scheme comprises: RS232 serial port module, main controller module, power module and tested ARINC659 module.
RS232 module, for completing the information interaction between host computer and test macro, user can select test option by the hyper terminal in host computer, and test option is sent to main controller module by RS232 module.
Main controller module, receives the test option from host computer, selects tested module according to test option, completes global function test for each tested module.
Power module, for generation of all three secondary sources that test macro needs.
2., according to a kind of shown in claim 1 automatization test system of ARINC659 bus, it is characterized in that, main controller module comprises further:
Primary processor, for the realization of test code, and by PLB bus marco clock generator, reseting generator, ARINC659 address data control bus module, slot generation module, discrete signal generation module, look-at-me generation module, IEEE1149.5 bus module, serial port protocol layer module.
Clock generator, for generation of system clock.
Reseting generator, for generation of systematic reset signal, Low level effective.
ARINC659 address data control bus module, the address date control port of simulation ARINC659, by this module complete for ARINC659 all data spaces read-write ' 0 ', ' 1 ', ' 55 ', the operation of ' AA ', complete the access to all registers of ARINC659 protocol layer and test, complete the test of the external discrete signal to ARINC659.
Slot generation module, produces the positional information of four tested modules by GPIO port.
Discrete signal generation module, produces the external discrete signal of ARINC659 by GPIO port.
Look-at-me generation module, produces the interruption control signal of ARINC659 by GPIO port, effectively low.
IEEE1149.5 bus module, the IEEE1149.5 bus protocol that encapsulation realizes, becomes special I P, is articulated in PLB bus, for the loading of the test chart program of ARINC659.
Serial port protocol layer module, package specific serial port protocol layer IP, is articulated in PLB bus, for realizing the information interaction with host computer.
3. an automated testing method for ARINC659 bus, is characterized in that, comprises following steps:
A, test macro send test homepage to host computer, and comprise 16 ARINC659 tests, 32 ARINC659 tests, all tested modules are tested simultaneously, and tested module divides BT(batch testing), tested module list procedure to load option.
B, user select tested module list procedure to load option, tested module are carried out to the on-line loaded of test chart program.
After C, list procedure have loaded, carry out ARINC659 functional test, comprise further, the test of ARINC659 data buffer, the test of ARINC659 register district, the test of ARINC659 bus test, slot number, discrete signal test, look-at-me test.
4. according to the automated testing method of a kind of ARINC659 bus shown in claim 3, it is characterized in that, list procedure in step B loads, IEEE1149.5 bus module is adopted to carry out on-line loaded, write in the external memorizer of each tested module by test chart program by IEEE1149.5 bus, tested module reads the list procedure in external memorizer by controller, and host computer also carries out read-write check, proof list program correctness by IEEE1149.5 bus retaking of a year or grade list procedure.
5. according to the automated testing method of a kind of ARINC659 bus shown in claim 3, it is characterized in that, ARINC659 data buffer test in step C, by all data spaces write ' 0 ' from main controller module to ARINC659, ' 1 ', ' 55 ', ' AA ' data, then retaking of a year or grade is compared, if consistent with retaking of a year or grade of write, prove the address data control bus of ARINC659 and data buffer area correct.
6. according to the automated testing method of a kind of ARINC659 bus shown in claim 3, it is characterized in that, ARINC659 register district test in step C, read each register space of specifying by the address data control bus of ARINC659, if with agreement regulation consistent; register testing pass through.
7. according to the automated testing method of a kind of ARINC659 bus shown in claim 3, it is characterized in that, ARINC659 bus test in step C, by all data spaces write ' 0 ' from main controller module to ARINC659, ' 1 ', ' 55 ', ' AA ' data, passed mutually carrying out data between four groups of tested modules by transmission and reception window in test chart program, then automatically compare the data of the data sent and reception in the host controller, if data consistent, ARINC659 bus test passes through.
8. according to the automated testing method of a kind of ARINC659 bus shown in claim 3, it is characterized in that, slot number test in step C, discrete signal test, look-at-me test, the slot number of each tested module, look-at-me and discrete signal is produced by GPIO, primary controller compares by reading the slot number of the corresponding register of ARINC659 and generation, look-at-me and discrete signal, if data consistent, ARINC659 bus test passes through.
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Cited By (11)
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| CN105974221A (en) * | 2016-04-26 | 2016-09-28 | 中国航空无线电电子研究所 | Universal adapter for multi-channel bus interface module testing |
| CN106325259A (en) * | 2016-08-17 | 2017-01-11 | 中国航空工业集团公司西安飞行自动控制研究所 | Multi-LRU parallel safety testing method |
| CN106370995A (en) * | 2016-08-18 | 2017-02-01 | 中国电力科学研究院 | Automatic device and method for writing programs into circuit boards in batches while conducting tests thereto at the same time |
| CN106708702A (en) * | 2016-12-15 | 2017-05-24 | 中国航空工业集团公司西安飞行自动控制研究所 | Central maintenance device based on ARINC 659 bus and method thereof |
| CN106708701A (en) * | 2016-12-14 | 2017-05-24 | 中国航空工业集团公司西安飞行自动控制研究所 | Central maintenance device and method based on ARINC659 bus |
| CN106844118A (en) * | 2016-12-30 | 2017-06-13 | 成都傅立叶电子科技有限公司 | A kind of bus on chip test system based on Tbus bus standards |
| CN107741733A (en) * | 2017-08-08 | 2018-02-27 | 研祥智能科技股份有限公司 | Field bus system and fieldbus recognition methods |
| CN107766195A (en) * | 2017-10-23 | 2018-03-06 | 济南浪潮高新科技投资发展有限公司 | It is a kind of to be used for the functional verification platform building method based on OPB bus designs |
| CN110825681A (en) * | 2019-10-17 | 2020-02-21 | 国营芜湖机械厂 | LBE bus-based SMHK381 test method |
| CN111880976A (en) * | 2020-07-14 | 2020-11-03 | 深圳市同泰怡信息技术有限公司 | RS232 communication serial port test method and device |
| CN114138370A (en) * | 2021-12-03 | 2022-03-04 | 中国航空工业集团公司西安飞行自动控制研究所 | ARINC659 time programming table program loading device and method |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN105974221A (en) * | 2016-04-26 | 2016-09-28 | 中国航空无线电电子研究所 | Universal adapter for multi-channel bus interface module testing |
| CN106325259A (en) * | 2016-08-17 | 2017-01-11 | 中国航空工业集团公司西安飞行自动控制研究所 | Multi-LRU parallel safety testing method |
| CN106370995A (en) * | 2016-08-18 | 2017-02-01 | 中国电力科学研究院 | Automatic device and method for writing programs into circuit boards in batches while conducting tests thereto at the same time |
| CN106708701A (en) * | 2016-12-14 | 2017-05-24 | 中国航空工业集团公司西安飞行自动控制研究所 | Central maintenance device and method based on ARINC659 bus |
| CN106708701B (en) * | 2016-12-14 | 2020-09-22 | 中国航空工业集团公司西安飞行自动控制研究所 | Central maintenance device and method based on ARINC659 bus |
| CN106708702A (en) * | 2016-12-15 | 2017-05-24 | 中国航空工业集团公司西安飞行自动控制研究所 | Central maintenance device based on ARINC 659 bus and method thereof |
| CN106844118B (en) * | 2016-12-30 | 2019-11-22 | 成都傅立叶电子科技有限公司 | A kind of on-chip bus test macro based on Tbus bus standard |
| CN106844118A (en) * | 2016-12-30 | 2017-06-13 | 成都傅立叶电子科技有限公司 | A kind of bus on chip test system based on Tbus bus standards |
| CN107741733A (en) * | 2017-08-08 | 2018-02-27 | 研祥智能科技股份有限公司 | Field bus system and fieldbus recognition methods |
| CN107766195A (en) * | 2017-10-23 | 2018-03-06 | 济南浪潮高新科技投资发展有限公司 | It is a kind of to be used for the functional verification platform building method based on OPB bus designs |
| CN110825681A (en) * | 2019-10-17 | 2020-02-21 | 国营芜湖机械厂 | LBE bus-based SMHK381 test method |
| CN110825681B (en) * | 2019-10-17 | 2022-07-26 | 国营芜湖机械厂 | LBE bus-based SMHK381 test method |
| CN111880976A (en) * | 2020-07-14 | 2020-11-03 | 深圳市同泰怡信息技术有限公司 | RS232 communication serial port test method and device |
| CN111880976B (en) * | 2020-07-14 | 2024-03-15 | 深圳市同泰怡信息技术有限公司 | RS232 communication serial port testing method and device |
| CN114138370A (en) * | 2021-12-03 | 2022-03-04 | 中国航空工业集团公司西安飞行自动控制研究所 | ARINC659 time programming table program loading device and method |
| CN114138370B (en) * | 2021-12-03 | 2023-09-05 | 中国航空工业集团公司西安飞行自动控制研究所 | ARINC659 time planning table program loading device and method |
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