CN105446847B - A kind of automatization test system and its method of ARINC659 buses - Google Patents
A kind of automatization test system and its method of ARINC659 buses Download PDFInfo
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Abstract
The present invention provides a kind of automatization test system of ARINC659 buses, can solve the mass test problem of ARINC659 buses, and test function is complete, simple to operate, and the large-scale popularization and application for ARINC659 buses provide effective means of testing.A kind of automatization test system of ARINC659 buses, it is characterized in that, system testing scheme includes：RS232 serial port modules, main controller module, power module and tested ARINC659 modules.RS232 modules, for completing the information exchange between host computer and test system, user can be sent to main controller module by the hyper terminal selection test option in host computer, RS232 modules by option is tested.Main controller module, the test option from host computer is received, according to test option selection tested module, global function test is completed for each tested module.Power module, for producing all three secondary sources of test system needs.
Description
Technical field
The present invention relates to system level testing field, more particularly to the testing field of air line internal bus.
Background technology
ARINC659 buses are a kind of airplane information pipes for being proposed by HoneyWell companies and being successfully applied to Boeing 777
The data/address bus of reason system, have high throughput, strict Fault Isolation, data transfer determine etc. characteristic, be one when
Between there is high fault tolerance and the high integrality backplane bus of robustness on (bus transfer time) and space (memory space).By
High security, high reliability in the bus, use at home in multiple aircraft types at present, demand is presented and passed year by year
The trend of increasing.
ARINC659 modules are in order to improve the versatility of ARINC659 buses, based on ARINC659 bus protocols, exploitation
A realize bus physical layer, the circuit module of data link layer functions.Due to the module demand is big, function is complicated,
Security requirement height is, it is necessary to develop a set of automatic test environment.
Embedded development platform herein based on XILINX companies, by PLB buses by multiple IP connections on a processor,
Complete the complete test to ARINC659 functions of modules.
The content of the invention
The purpose of the present invention is to propose to a kind of automatic test scheme of ARINC659 buses, it is total to solve current ARINC659
The requirement that demand of the line in mass application is big, function is complicated, safe, improve the testing efficiency of ARINC659 buses
And application.
The technical scheme that the present invention takes is a kind of automatization test system of ARINC659 buses, system testing scheme
Including：RS232 serial port modules, main controller module, power module and tested ARINC659 modules.
RS232 modules, for completing the information exchange between host computer and test system, user can be by host computer
Hyper terminal selection test option, RS232 modules by test option be sent to main controller module.
Main controller module, the test option from host computer is received, according to test option selection tested module, for every
One tested module completes global function test.Wherein further comprise：
Primary processor, for testing the realization of code, and by PLB bus marcos clock generator, reseting generator,
ARINC659 address data control bus module, groove position generation module, discrete signal generation module, interrupt signal generation module,
IEEE1149.5 bus modules, serial port protocol layer module.
Clock generator, for generation system clock.
Reseting generator, it is effective for generation system reset signal, low level.
ARINC659 address data control bus modules, ARINC659 address date control port is simulated, passes through the mould
Block completes all data spaces read-write ' 0 ' for ARINC659, ' 1 ', ' 55 ', the operation of ' AA ', ARINC659 agreements
The access and test of all registers of layer, the test of ARINC659 external discrete signal.
Groove position generation module, the positional information of four tested modules is produced by GPIO port.
Discrete signal generation module, ARINC659 external discrete signal is produced by GPIO port.
Interrupt signal generation module, ARINC659 interruption control signal is produced by GPIO port, it is low effective.
IEEE1149.5 bus modules, the IEEE1149.5 bus protocols of realization are encapsulated, special IP is become, is articulated to
In PLB buses, the loading for ARINC659 test list procedure.
Serial port protocol layer module, package specific serial port protocol layer IP, is articulated in PLB buses, for realization and host computer
Information exchange.
Power module, for producing all three secondary sources of test system needs.
A kind of ARINC659 provided by the invention automated testing method, the method includes the steps of：
A, test system sends test homepage to host computer, including 16 ARINC659 tests, 32 ARINC659 are surveyed
Examination, all tested modules are tested simultaneously, and tested module is tested in batches, tested module list procedure loading option.
B, user selects tested module list procedure to load option first, and the online of test list procedure is carried out to tested module and is added
Carry.
C, after the completion of list procedure loading, ARINC659 functional tests is carried out, are further comprised, ARINC659 data buffers
Test, the test of ARINC659 register sections, the test of ARINC659 bus tests, slot number, discrete signal test, interrupt signal are surveyed
Examination.
Wherein, the list procedure loading in step B, carries out on-line loaded using IEEE1149.5 bus modules, will test
List procedure is write by IEEE1149.5 buses in the external memorizer of each tested module, and tested module is read by controller
List procedure in external memorizer, host computer also can be written and read verification by IEEE1149.5 bus retaking of a year or grade list procedures, checking
The correctness of list procedure.
Wherein, the ARINC659 data buffers test in step C, main controller module owning to ARINC659 is passed through
Data space write-in ' 0 ', ' 1 ', ' 55 ', ' AA ' data, then retaking of a year or grade are compared, and are proved if write-in is consistent with retaking of a year or grade
ARINC659 address data control bus and data buffer area are correct.
Wherein, the ARINC659 register sections test in step C, is read by ARINC659 address data control bus
Each register space specified, if with agreement as defined in it is consistent if register testing pass through.
Wherein, the ARINC659 bus tests in step C, deposited by main controller module to ARINC659 all data
Store up space write-in ' 0 ', ' 1 ', ' 55 ', ' AA ' data, by test in list procedure send receive window to four groups of tested modules it
Between carry out data and mutually pass, then the data of transmission and the data received are compared automatically in the host controller, if data
Consistent then ARINC659 bus tests pass through.
Wherein, the slot number test in step C, discrete signal test, interrupt signal test, each quilt is produced by GPIO
Slot number, interrupt signal and the discrete signal of module are surveyed, main controller is by reading corresponding registers of ARINC659 and caused
Slot number, interrupt signal and discrete signal are compared, and ARINC659 bus tests pass through if data are consistent.
The present invention has the advantage that and beneficial effect：The present invention is a kind of automatization test system of ARINC659 buses,
For applying more and more extensive event Trigger Bus ARINC659 buses at present, it is functional that this method can complete bus institute
Integrity authentication, and realize the test to four groups of buses simultaneously, full automation, greatly improve testing efficiency, improve
Test degree of safety.
Brief description of the drawings
Fig. 1 is the Design of Test System scheme schematic diagram of the present invention.
Fig. 2 is test system master controller design schematic diagram.
Typical flowchart when Fig. 3 is present invention test.
Embodiment
The present invention proposes a kind of automatic test scheme of ARINC659 buses, solves current ARINC659 buses in batch
Change that demand in application is big, function is complicated, safe requirement, improve the testing efficiency of ARINC659 buses and using model
Enclose.
The present invention is elaborated with reference to Figure of description.
Fig. 1 gives the system testing scheme of the present invention, including：RS232 serial port modules, main controller module, power supply mould
Block and tested ARINC659 modules.
RS232 modules, for completing the information exchange between host computer and test system, main controller module will be tested and selected
Item is sent to host computer by RS232 modules, and user can pass through the hyper terminal selection test option in host computer.
Main controller module, the test option from host computer is received, tested module is selected according to test option, for
Each tested module completes global function test.
Power module, for producing all three secondary sources of test system needs.
Fig. 2 gives the implementation of main controller module, including：
Primary processor, the realization of test code is completed using C language, and pass through PLB bus marcos clock generator, reset
Generator, ARINC659 address data control bus module, groove position generation module, discrete signal generation module, interrupt signal production
Raw module, IEEE1149.5 bus modules, serial port protocol layer module.
The test code of primary processor is write according to following test function：
1. exporting test main interface to host computer, test main interface includes 16 ARINC659 tests, 32 ARINC659
Test, all tested modules are tested simultaneously, and tested module tests option in batches.
2. systematic reset signal, ARINC659 groove position signal, ARINC659 are sent by GPIO initialization function
Discrete output signal.
3. enter 16 ARINC659 test functions, to ARINC659 all data buffer areas write-in ' 0 ', ' 1 ',
' 55 ', ' AA ', then back read data buffer area, back read data and the data of write-in are subjected to automatic comparison, the data if consistent
Buffer area test passes through.
4. entering 16 ARINC659 test functions, all register spaces of ARINC659 protocol layers, and desired value are read
Automatic comparison is carried out, register space test passes through if consistent, while proves that the output of ARINC659 buses is correct.
5. entering 16 ARINC659 test functions, ARINC659 discrete signals memory block, and GPIO initialization are read
The discrete signal that function is sent carries out automatic comparison, and discrete signal is tested and passed through if consistent.
6. enter 32 ARINC659 test functions, to ARINC659 all data buffer areas write-in ' 0 ', ' 1 ',
' 55 ', ' AA ', then back read data buffer area, back read data and the data of write-in are subjected to automatic comparison, the data if consistent
Buffer area test passes through.
7. entering 32 ARINC659 test functions, all register spaces of ARINC659 protocol layers, and desired value are read
Automatic comparison is carried out, register space test passes through if consistent, while proves that the output of ARINC659 buses is correct.
8. entering 32 ARINC659 test functions, ARINC659 discrete signals memory block, and GPIO initialization are read
The discrete signal that function is sent carries out automatic comparison, and discrete signal is tested and passed through if consistent.
9. entering list procedure loading function, IEEE1149.5 protocol IPs are initialized, complete setting for IEEE1149.5 protocol IPs
Put, realize the on-line loaded of list procedure.
Clock generator, for generation system clock.
Reseting generator, it is effective for generation system reset signal, low level.
ARINC659 address data control bus modules, ARINC659 address is simulated according to ARINC659 read-write sequence
Data control port, the access of ARINC659 all data spaces is completed by the module, complete ARINC659 deposits
The access of device, the external discrete signal for completing ARINC659 access.
Groove position generation module, the slot number that first tested module is initialized by GPIO is ' 1 ', second tested module
Slot number be ' 2 ', the slot number of the 3rd tested module is ' 3 ', and the slot number of the 4th tested module is ' 4 '.
Discrete signal generation module, the external discrete signal for producing ARINC659 is initialized by GPIO.
Interrupt signal generation module, the interruption control signal for producing ARINC659 is initialized by GPIO, it is low effective.
IEEE1149.5 bus modules, the IEEE1149.5 bus protocols of realization are encapsulated, become special IP, mounted
Onto PLB buses, the loading for ARINC659 test list procedure.
Serial port protocol layer module, package specific serial port protocol layer IP, is articulated in PLB buses, for realization and host computer
Information exchange.
Illustrate whole test process with reference to Fig. 3.
1. entering test principal function, GPIO initialization, the generation of ARINC659 slot numbers, the production of reset signal are completed
It is raw.
2. test system sends test homepage to host computer, including 16 ARINC659 tests, 32 ARINC659 are surveyed
Examination, all tested modules are tested simultaneously, the option such as tested module is tested in batches, the loading of tested module list procedure.
3. user selects tested module list procedure loading option, to tested module test the on-line loaded of list procedure.
4. after the completion of list procedure loading, 16 ARINC659 tests of selection, 32 ARINC659 tests, own as needed
Tested module is tested simultaneously, and tested module tests option in batches, carries out ARINC659 functional tests, after the completion of test, printing
The test of ARINC659 data buffers passes through mark, ARINC659 bus tests by mark, the test of ARINC659 register sections
Tested by mark, slot number test by mark, discrete signal and mark etc. is passed through by mark, interrupt signal test.
5. not by the function items of test, error flag corresponding to printing, it is easy to the positioning and analysis of failure.
Claims (7)
1. a kind of automatization test system of ARINC659 buses, system testing scheme include：RS232 serial port modules, master control
Device module, power module and tested ARINC659 modules processed；
RS232 modules, for completing the information exchange between host computer and test system, user can be by super in host computer
Level terminal selection test option, RS232 modules are sent to main controller module by option is tested；
Main controller module, the test option from host computer is received, according to test option selection tested module, for each
Tested module completes global function test；
Power module, for producing all three secondary sources of test system needs；It is characterized in that main controller module further wraps
Include：
Primary processor, for testing the realization of code, and by PLB bus marcos clock generator, reseting generator,
ARINC659 address data control bus module, groove position generation module, discrete signal generation module, interrupt signal generation module,
IEEE1149.5 bus modules, serial port protocol layer module；
Clock generator, for generation system clock；
Reseting generator, it is effective for generation system reset signal, low level；
ARINC659 address data control bus modules, ARINC659 address date control port is simulated, it is complete by the module
Into all data spaces read-write ' 0 ' for ARINC659, ' 1 ', ' 55 ', the operation of ' AA ', complete to assist ARINC659
The access and test of all registers of layer are discussed, completes the test to ARINC659 external discrete signal；
Groove position generation module, the positional information of four tested modules is produced by GPIO port；
Discrete signal generation module, ARINC659 external discrete signal is produced by GPIO port；
Interrupt signal generation module, ARINC659 interruption control signal is produced by GPIO port, it is low effective；
IEEE1149.5 bus modules, the IEEE1149.5 bus protocols of realization are encapsulated, special IP is become, is articulated to PLB
In bus, the loading for ARINC659 test list procedure；
Serial port protocol layer module, package specific serial port protocol layer IP, is articulated in PLB buses, for realizing the letter with host computer
Breath interaction.
2. a kind of automated testing method of ARINC659 buses, it is characterized in that, comprise the steps of：
A, test system sends test homepage, including 16 ARINC659 tests, 32 ARINC659 tests, institute to host computer
There is tested module while test, tested module is tested in batches, tested module list procedure loading option；
B, user selects tested module list procedure loading option, to tested module test the on-line loaded of list procedure；
C, after the completion of list procedure loading, ARINC659 functional tests is carried out, are specifically included, the test of ARINC659 data buffers,
The test of ARINC659 register sections, the test of ARINC659 bus tests, slot number, discrete signal test, interrupt signal test.
3. a kind of automated testing method of ARINC659 buses according to claim 2, it is characterized in that, in step B
List procedure loading, using IEEE1149.5 bus modules carry out on-line loaded, list procedure will be tested and pass through IEEE1149.5
Bus is write in the external memorizer of each tested module, and tested module reads the table journey in external memorizer by controller
Sequence, host computer also can be written and read verification, proof list program correctness by IEEE1149.5 bus retaking of a year or grade list procedures.
4. a kind of automated testing method of ARINC659 buses according to claim 2, it is characterized in that, in step C
ARINC659 data buffers test, by all data spaces from main controller module to ARINC659 write-in ' 0 ',
' 1 ', ' 55 ', ' AA ' data, then retaking of a year or grade compares, if write it is consistent with retaking of a year or grade if proof ARINC659 address date control
Bus processed and data buffer area are correct.
5. a kind of automated testing method of ARINC659 buses according to claim 2, it is characterized in that, in step C
The test of ARINC659 register sections, it is empty that the register that each specifies is read by ARINC659 address data control bus
Between, if with agreement as defined in it is consistent if register testing pass through.
6. a kind of automated testing method of ARINC659 buses according to claim 2, it is characterized in that, in step C
ARINC659 bus tests, by all data spaces from main controller module to ARINC659 write-in ' 0 ', ' 1 ',
' 55 ', ' AA ' data, mutually passed by testing transmission reception window in list procedure to carrying out data between four groups of tested modules, then
The data to transmission and the data received are compared automatically in the host controller, and ARINC659 buses are surveyed if data are consistent
Pinged.
7. a kind of automated testing method of ARINC659 buses according to claim 2, it is characterized in that, in step C
Slot number test, discrete signal test, interrupt signal test, by GPIO produce each tested module slot number, interrupt
Signal and discrete signal, main controller by read the corresponding registers of ARINC659 and caused slot number, interrupt signal and from
Scattered signal is compared, and ARINC659 bus tests pass through if data are consistent.
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| CN105974221A (en) * | 2016-04-26 | 2016-09-28 | 中国航空无线电电子研究所 | Universal adapter for multi-channel bus interface module testing |
| CN106325259A (en) * | 2016-08-17 | 2017-01-11 | 中国航空工业集团公司西安飞行自动控制研究所 | Multi-LRU parallel safety testing method |
| CN106370995B (en) * | 2016-08-18 | 2021-07-13 | 中国电力科学研究院 | Automatic device and method for batch writing and testing of circuit boards |
| CN106708701B (en) * | 2016-12-14 | 2020-09-22 | 中国航空工业集团公司西安飞行自动控制研究所 | Central maintenance device and method based on ARINC659 bus |
| CN106708702A (en) * | 2016-12-15 | 2017-05-24 | 中国航空工业集团公司西安飞行自动控制研究所 | Central maintenance device based on ARINC 659 bus and method thereof |
| CN106844118B (en) * | 2016-12-30 | 2019-11-22 | 成都傅立叶电子科技有限公司 | A kind of on-chip bus test macro based on Tbus bus standard |
| CN107741733B (en) * | 2017-08-08 | 2020-09-18 | 研祥智能科技股份有限公司 | Fieldbus system and fieldbus identification method |
| CN107766195A (en) * | 2017-10-23 | 2018-03-06 | 济南浪潮高新科技投资发展有限公司 | It is a kind of to be used for the functional verification platform building method based on OPB bus designs |
| CN110825681B (en) * | 2019-10-17 | 2022-07-26 | 国营芜湖机械厂 | LBE bus-based SMHK381 test method |
| CN111880976B (en) * | 2020-07-14 | 2024-03-15 | 深圳市同泰怡信息技术有限公司 | RS232 communication serial port testing method and device |
| CN114138370B (en) * | 2021-12-03 | 2023-09-05 | 中国航空工业集团公司西安飞行自动控制研究所 | ARINC659 time planning table program loading device and method |
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