CN107731666B - Double patterning method - Google Patents
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- CN107731666B CN107731666B CN201610664716.0A CN201610664716A CN107731666B CN 107731666 B CN107731666 B CN 107731666B CN 201610664716 A CN201610664716 A CN 201610664716A CN 107731666 B CN107731666 B CN 107731666B
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Abstract
A method of double patterning, comprising: forming sidewall layers on the top and sidewalls of the core layer and on the substrate; forming a sacrificial layer on the side wall layer to fill the region between the adjacent core layers; removing the side wall layer higher than the top of the core layer to expose the top of the core layer; etching to remove the core layer with the first thickness, and etching the top of the side wall layer and the first side wall higher than the rest core layer to make the first side wall higher than the top of the rest core layer in an arc shape; removing the sacrificial layer to expose the second side wall of the side wall layer; etching back the side wall layer by adopting an anisotropic etching process, etching to remove the side wall layer on part of the substrate, and etching a second side wall and a first side wall of the side wall layer; removing the residual core layer; and etching the substrate to form a target pattern by taking the etched back side wall layer as a mask. The present invention improves the quality of the formed target pattern.
Description
Technical Field
The invention relates to the technical field of semiconductor manufacturing, in particular to a double patterning method.
Background
The photolithography technique is the most critical production technique in the semiconductor manufacturing process, and with the continuous reduction of semiconductor process nodes, the existing light source photolithography technique cannot meet the requirements of semiconductor manufacturing, and the extreme ultraviolet lithography (EUV), the multi-beam maskless technique and the nanoimprint technique become the research hotspots of the next generation photolithography candidate technique. However, the above-mentioned next-generation lithography candidates still have inconveniences and drawbacks, and further improvement is needed.
Double Patterning (DP) is certainly one of the best choices in the industry when the moore's law continues to be irreversible with the step extending forward, and the Double Patterning technology can effectively fill up the gap of smaller node lithography technology by only making small changes to the existing lithography infrastructure, and improve the minimum pitch (pitch) between adjacent semiconductor patterns.
However, in the prior art, the substrate is etched by using a double patterning method, and the quality of a target pattern formed in the substrate after etching is poor, which affects the performance and yield of the formed semiconductor structure.
Disclosure of Invention
The invention provides a double patterning method, which improves the quality of a formed target pattern. To solve the above problems, the present invention provides a double patterning method, comprising: providing a substrate with a plurality of discrete core layers thereon; forming a side wall layer on the top and side walls of the core layer and on the substrate, wherein the side wall layer on the side wall of the core layer has a first side wall and a second side wall which are opposite, and the first side wall is close to the core layer; forming a sacrificial layer on the side wall layer to fill the region between the adjacent core layers, wherein the sacrificial layer is close to the second side wall; removing the side wall layer higher than the top of the core layer to expose the top of the core layer; etching to remove the core layer with the first thickness, and etching the top of the side wall layer and the first side wall higher than the rest core layer to make the first side wall higher than the top of the rest core layer in an arc shape; removing the sacrificial layer to expose the second side wall of the side wall layer; etching back the side wall layer by adopting an anisotropic etching process, etching to remove the side wall layer on part of the substrate, and etching a second side wall and a first side wall of the side wall layer; removing the residual core layer; and etching the substrate to form a target pattern by taking the etched back side wall layer as a mask.
Optionally, the sidewall layer is etched back, so that the second sidewall higher than the top of the remaining core layer is arc-shaped.
Optionally, after etching back the sidewall layer, the first sidewall higher than the top of the remaining core layer is symmetrical to the second sidewall.
Optionally, in a direction parallel to the substrate surface, the width of the core layers is a first width, the width of the sacrificial layer located between adjacent core layers is a second width, and the second width is equal to the first width.
Optionally, the first thickness is 1/5-2/3 of the initial thickness of the core layer.
Optionally, the process parameters for removing the core layer with the first thickness by etching include: the core layer is made of amorphous carbon and is doped with O2Etching to remove the core layer with the first thickness; the core layer is made of polycrystalline silicon, and the core layer with the first thickness is removed by etching through Cl plasma.
Optionally, the gas used in the anisotropic etching process includes a fluorocarbon-based gas.
Optionally, the material of the core layer is one or more of amorphous carbon, an OD L material, polysilicon, silicon oxide, silicon nitride, or silicon oxynitride.
Optionally, the material of the side wall layer is different from the material of the core layer.
Optionally, the material of the sidewall layer is silicon oxide or silicon nitride.
Optionally, the sidewall layer is formed by an atomic layer deposition process.
Optionally, the material of the sacrificial layer is different from that of the side wall layer.
Optionally, the material of the sacrificial layer is a DUO material, a BARC material or a spin-on carbon-containing material.
Optionally, after etching back the sidewall layer, the remaining core layer is removed.
Optionally, the top of the sacrificial layer is higher than the top of the core layer before the top of the core layer is exposed; the process step of exposing the top of the core layer includes: and grinding to remove the sacrificial layer and the side wall layer which are higher than the top of the core layer by adopting a chemical mechanical grinding process.
Optionally, before the top of the core layer is exposed, the top of the sacrificial layer is higher than the top of the side wall layer; the process step of exposing the top of the core layer includes: grinding and removing the sacrificial layer higher than the top of the side wall layer by adopting a chemical mechanical grinding process; and after the chemical mechanical grinding process, carrying out dry etching treatment on the sacrificial layer and the side wall layer by adopting a dry etching process.
Optionally, the etching gas used in the dry etching process includes a fluorocarbon gas, where the fluorocarbon gas is C4F8Or CH3F。
Optionally, an ashing process or a dry etching process is used to remove the sacrificial layer.
Optionally, removing the sacrificial layer by using a dry etching process; the etching gas adopted by the dry etching process comprises O2、N2Or H2。
Optionally, the process of forming the core layer includes: forming a core film on the substrate; forming a patterning layer on the core film; etching the core film by taking the graphic layer as a mask until the surface of the substrate is exposed, and forming a plurality of discrete core layers on the substrate; and removing the graph layer. Compared with the prior art, the technical scheme of the invention has the following advantages:
in the technical scheme of the double patterning forming method provided by the invention, side wall layers are formed on the top and the side walls of the core layer and the substrate; and forming a sacrificial layer on the sidewall layer to fill the region between adjacent core layers; removing the side wall layer higher than the top of the core layer to expose the top of the core layer; then, etching to remove the core layer with the first thickness, and etching the top of the side wall layer and the first side wall higher than the core layer to enable the first side wall higher than the top of the rest core layer to be arc-shaped, so that the first side wall higher than the top of the core layer is an inclined surface; then, removing the sacrificial layer to expose the second side wall of the side wall layer; the side wall layer is etched back by adopting an anisotropic etching process, the side wall layer on a part of the substrate is removed by etching, and the first side wall and the second side wall of the side wall layer are also etched, so that under the influence of the anisotropic etching process, the second side wall of the side wall layer is also in an arc shape, and the second side wall is an inclined surface, so that the appearance symmetry between the first side wall and the second side wall is improved; therefore, when the etched back side wall layer is used as a mask to etch a substrate, the difference of the etching gas collection angles of the areas on the two sides of the side wall layer is small, so that the height difference of the top surfaces of the substrate on the two sides of a target pattern formed after etching is small or even zero, the problem of etching micro-load effect is reduced, and the quality of the formed target pattern is improved.
In an alternative scheme, the sacrificial layer is removed after the side wall layer is etched back, so that the sacrificial layer plays a role in protecting the substrate in the process of back etching the side wall layer, the substrate is prevented from being etched and damaged by the process of back etching the side wall layer, and the quality of the formed target pattern is further improved.
In an alternative, in the direction parallel to the substrate surface, the width of the core layer is a first width, the width of the sacrificial layer between adjacent core layers is a second width, and the second width is equal to the first width, so that after the side wall layers are etched back subsequently, the distances between adjacent side wall layers are equal, and thus the distances between adjacent target patterns formed by etching are also equal.
Drawings
FIGS. 1-5 are schematic cross-sectional views illustrating a process for forming a semiconductor structure by double patterning;
fig. 6 to 14 are schematic cross-sectional views illustrating a process of forming a semiconductor structure by using a double patterning method according to an embodiment of the invention.
Detailed Description
As known from the background art, in the prior art, a double patterning method is adopted to etch a substrate, and the quality of a pattern formed in the etched substrate is poor.
Fig. 1 to 5 are schematic cross-sectional views illustrating a process of forming a semiconductor structure by using a double patterning method.
Referring to fig. 1, a substrate 101 is provided, the substrate 101 having a plurality of discrete core layers 102 formed on a surface thereof.
And the process of forming the core layer 102 is liable to cause over etching (over etch) of the substrate 101 such that the top surface of the substrate 101 under the core layer 102 is higher than the top surface of the substrate 101 exposed by the core layer 102, and the minimum distance between the top of the substrate 101 under the core layer 102 and the top of the substrate 101 exposed by the core layer 102 is L1.
Referring to fig. 2, a side wall layer 103 is formed on the top and side wall surfaces of the core layer 102 and the surface of the substrate 101.
Referring to fig. 3, the side wall layer 103 is etched back by using a maskless etching process (refer to fig. 2), and the side wall layer 103 on the top surface of the core layer 102 and a part of the side wall layer 103 on the surface of the substrate 101 are etched and removed until a part of the surface of the substrate 101 is exposed, so as to form a side wall 104 covering the surface of the side wall of the core layer 102.
In the process of etching the side wall layer 103 by using the maskless etching process, the etching process is prone to further over-etching the surface of the substrate 101, and the thickness of the substrate 101 etched and removed in the process of forming the side wall 104 is L2.
Referring to fig. 4, the core layer 102 (refer to fig. 3) is removed.
Referring to fig. 5, the substrate 101 is etched until a target pattern is formed, using the sidewall spacers 104 as masks.
As can be seen from the foregoing analysis, after the core layer 102 is removed, the heights of the top surfaces of the substrates 101 on both sides of the sidewall 104 are different, and the difference between the heights of the top surfaces of the substrates 101 on both sides of the sidewall 104 is L1 + L2. therefore, after the target patterns are formed by etching the substrates 101 on both sides with the sidewall 104 as a mask, the heights of the top surfaces of the substrates 101 on both sides of the correspondingly formed target patterns are also different, and the top surfaces of the substrates 101 on both sides of the target patterns have a height difference, so that the quality of the target patterns formed after etching is affected, and the formed target patterns have the problem of pitch walking.
Further analysis finds that, as shown in fig. 3 and fig. 4, the top surface of the sidewall 104 formed on the sidewall surface of the core layer 102 is an inclined surface, and the closer the distance between the sidewall 104 and the core layer 102 is, the higher the height of the top surface of the sidewall 104 is, so that when the core layer 102 is removed and etching is performed by using the sidewall 104 as a mask, the etching gas collection angles (etch species collection angles) of the etching processes in the two side regions of the same sidewall 104 are different.
Specifically, the etching gas collection angle of the region formed by removing the core layer 102 is a first angle a1, the etching gas collection angle of the region formed by the adjacent sidewall 104 before removing the core layer 102 is a second angle a2, and is affected by the inclination of the top surface of the sidewall 104, and the first angle a1 is smaller than the second angle a 2. In the etching process with the side walls 104 as masks, the etching rate of the region formed by removing the core layer 102 is a first rate, the etching rate of the region formed by the adjacent side wall 104 before removing the core layer 102 is a second rate, and since the first angle a1 is smaller than the second angle a2, the first rate is smaller than the second rate, which is a micro-loading effect (micro-loading effect), and the micro-loading effect further aggravates the height difference of the top surfaces of the substrate 101 on both sides of the target pattern.
To solve the above problems, the present invention provides a double patterning method, comprising: providing a substrate with a plurality of discrete core layers thereon; forming a side wall layer on the top and side walls of the core layer and on the substrate, wherein the side wall layer on the side wall of the core layer has a first side wall and a second side wall which are opposite, and the first side wall is close to the core layer; forming a sacrificial layer on the side wall layer to fill the region between the adjacent core layers, wherein the sacrificial layer is close to the second side wall; removing the side wall layer higher than the top of the core layer to expose the top of the core layer; etching to remove the core layer with the first thickness, and etching the top of the side wall layer and the first side wall higher than the rest core layer to make the first side wall higher than the top of the rest core layer in an arc shape; removing the sacrificial layer to expose the second side wall of the side wall layer; etching back the side wall layer by adopting an anisotropic etching process, etching to remove the side wall layer on part of the substrate, and etching a second side wall and a first side wall of the side wall layer; removing the residual core layer; and etching the substrate to form a target pattern by taking the etched back side wall layer as a mask.
In the invention, the difference of the etching gas collecting angles at two sides of the etched side wall layer is smaller, so that the height difference of the top surfaces of the substrates at two sides of the target pattern formed after etching is small or even zero, the problem of pitch walking is avoided, the problem of etching micro-load effect is reduced, and the quality of the formed target pattern is improved.
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below.
Fig. 6-14 are schematic cross-sectional views illustrating a process of forming a semiconductor structure by using a double patterning method according to an embodiment of the invention.
Referring to fig. 6, a substrate 201 is provided, the substrate 201 having a number of discrete core layers 202 thereon.
The substrate 201 is made of silicon, germanium, silicon carbide, gallium arsenide or indium gallium arsenide; the base 201 may also be a silicon-on-insulator substrate, a germanium-on-insulator substrate, or a silicon-germanium-on-insulator substrate. In this embodiment, the base 201 is a silicon substrate.
Semiconductor devices, such as PMOS transistors, NMOS transistors, CMOS transistors, resistors, capacitors, inductors, or the like, may also be formed within the substrate 201. An interface layer may also be formed on the substrate 201, and the material of the interface layer is silicon oxide, silicon nitride, silicon oxynitride, or the like.
It should be noted that, in the present embodiment, the substrate 201 is patterned subsequently, and a target pattern is formed in the substrate 201, and the material of the substrate 201 is not limited in this embodiment. For example, in other embodiments, the base may further include a substrate and a functional layer on the substrate, and the subsequent patterning of the base is actually the patterning of the functional layer on the substrate.
The material of the core layer 202 is a material that can be easily removed, and the process of removing the core layer does not damage the substrate 201. the material of the core layer 202 is one or more of amorphous carbon, OD L (Organic Dielectric L eye) material, polysilicon, silicon oxide, silicon nitride, or silicon oxynitride.
In this embodiment, the material of the core layer 202 is amorphous carbon.
The thickness of the core layer 202 should not be too thin, nor too thick. If the thickness of the core layer 202 is too thin, the thickness of the sidewall layer formed on the sidewall of the core layer 202 is also thin, so that the subsequently formed sidewall layer is not enough to be used as a mask for etching the substrate 201, which easily causes the sidewall layer to be consumed too much or even completely when the target pattern is not formed; if the thickness of the core layer 202 is too thick, the aspect ratio between adjacent core layers 202 is increased, which results in a reduction of the process window of the subsequently formed sidewall layer, which not only increases the process difficulty of the subsequently formed sidewall layer, but also easily causes poor coverage of the sidewall layer at the interface between the core layer 202 and the substrate 201.
For this reason, in the present embodiment, the thickness of the core layer 202 is 10 nm to 200 nm.
The process steps for forming the core layer 202 include: forming a core film on the substrate 201; forming a graphics layer on the core film, the graphics layer defining the location and dimensions of a core layer 202 to be formed; etching the core film by taking the graphic layer as a mask until the surface of the substrate 201 is exposed, and forming a plurality of discrete core layers 202 on the substrate 201; and removing the graph layer.
In this embodiment, the core film is etched by a dry etching process, and the process parameters for etching the core film include: the etching gas is HBr and O2HBr flow rate of 100sccm to 500sccm, O2The flow is 1sscm to 50sccm, the pressure of the reaction chamber is 1 mTorr to 50 mTorr, the high-frequency radio frequency power of the etching is 100 watts to 500 watts, and the low-frequency radio frequency power is 0 watts to 200 watts. In the process of etching the core layer, the process of etching the core film is prevented from over-etching the substrate 201, so that the top of the substrate 201 directly below the core layer 202 is flush with the top of the substrate 201 exposed by the core layer 202.
In this embodiment, the distances between adjacent core layers 202 are equal; and, the distance between adjacent core layers 202 is greater than the width dimension of the core layer 202, so that after the subsequent formation of the side wall layers on the side walls of the core layer 202, the distance between the adjacent side wall layers is equal to the width dimension of the core layer 202.
Referring to fig. 7, a side wall layer 203 is formed on the top and side walls of the core layer 202 and on the substrate 201, wherein the side wall layer 203 on the side wall of the core layer 202 has a first side wall and a second side wall opposite to each other, and the first side wall is closely attached to the core layer 202.
The material of the sidewall layer 203 is different from that of the core layer 202, and the material of the sidewall layer 203 is also different from that of the substrate 201, so that the subsequent process of removing the core layer 202 does not have adverse effect on the sidewall layer 203, and the subsequent sidewall layer 203 on the sidewall of the core layer 202 can be used as a mask for etching the substrate 201.
The material of the sidewall layer 203 is silicon oxide, silicon nitride, silicon oxynitride, silicon carbide, silicon oxycarbide, silicon carbonitride, silicon oxycarbonitride or boron nitride. In this embodiment, the sidewall layer 203 is made of silicon nitride.
The sidewall layer 203 is formed by a chemical vapor deposition process, a physical vapor deposition process, or an atomic layer deposition process. In this embodiment, the atomic layer deposition process is used to form the side wall layer 203, so that the step coverage (step coverage) capability of the formed side wall layer 203 is good, and therefore the side wall layer 203 at the interface between the core layer 202 and the substrate 201 has a good coverage effect.
Referring to fig. 8, a sacrificial layer 204 filling the region between adjacent core layers 202 is formed on the sidewall layer 203, and the sacrificial layer 204 is adjacent to the second sidewall of the sidewall layer.
The top of the sacrificial layer 204 is higher than the top of the core layer 202, or alternatively, the top of the sacrificial layer 204 is flush with the top of the core layer 202. In this embodiment, the top of the sacrificial layer 204 is higher than the top of the sidewall layer 203.
The material of the sacrificial layer 204 is different from that of the side wall layer 203, and the material of the sacrificial layer 204 is different from that of the substrate 201 and the core layer 202; the material of the sacrificial layer 204 is also a material that can be easily removed, and the subsequent process for removing the sacrificial layer 204 will not cause etching damage to the substrate 201.
Combining the above factors, the material of the sacrificial layer 204 is OD L material, DUO material or spin on carbon (spin on carbon).
In this embodiment, the material of the sacrificial layer 204 is a spin-on carbon-containing material, and the sacrificial layer 204 is formed by a spin-on process.
Referring to fig. 9, the sidewall layer 203 above the top of the core layer 202 is removed, exposing the top of the core layer 202.
In this embodiment, since the top of the sacrificial layer 204 is higher than the top of the core layer 202, the sacrificial layer 204 higher than the top of the core layer 202 is also removed during the process of removing the sidewall layer 203 higher than the top of the core layer 202.
In this embodiment, the process step of exposing the top of the core layer 202 includes: removing the sacrificial layer 204 higher than the top of the side wall layer 203 by adopting a chemical mechanical polishing process; after the chemical mechanical polishing process, a dry etching process is used to perform a dry etching process on the sacrificial layer 204 and the sidewall layer 203.
In the process step of removing the sacrificial layer 204 higher than the top of the sidewall layer 203 by chemical mechanical polishing, a part of the thickness of the sidewall layer 203 may also be removed by polishing. Wherein, the etching gas adopted by the dry etching treatment comprises fluorocarbon gas, and the fluorocarbon gas is C4F8Or CH3F。
In this embodiment, a chemical mechanical polishing process is first employed to polish and remove the thicker sacrificial layer 204, thereby effectively shortening the process time; furthermore, dry etching processing is performed on the sacrificial layer 204 and the sidewall layer 203, so that the flatness of the top surface of the sidewall layer 203 after the chemical mechanical polishing process can be improved.
It is noted that in other embodiments, the top of the sacrificial layer is higher than the top of the core layer before the top of the core layer is exposed; the process step of exposing the top of the core layer may further comprise: and grinding to remove the sacrificial layer and the side wall layer which are higher than the top of the core layer by adopting a chemical mechanical grinding process.
Referring to fig. 10, the core layer 202 is etched to remove the first thickness, and the top of the sidewall layer 203 and the first sidewall above the remaining core layer 202 are also etched such that the first sidewall above the top of the remaining core layer 202 is arc-shaped.
In this embodiment, the first thickness core layer 202 is etched and removed by using a dry etching process, and in the process of removing the first thickness core layer 202 by etching, as the core layer 202 is etched, a part of the first sidewall is exposed to an etching environment, so that the top of the sidewall layer 202 and the first sidewall are also etched by the etching process of removing the first thickness core layer 202 by etching.
Moreover, the etching rate of the core layer 202 etched by the etching process is greater than the etching rate of the side wall layer 203, and the first side wall higher than the top of the remaining core layer 202 is in an arc shape after the core layer 202 with the first thickness is removed by etching under the influence of the etching process. It is also considered that the width dimension of the sidewall layer 203 higher than the remaining core layer 202 is gradually reduced in a direction perpendicular to the surface of the substrate 201 and directed toward the core layer 202 along the substrate 201.
The reason for the arc shape of the first sidewall higher than the top of the remaining core layer 202 includes that, under the influence of the etching process for removing the first thickness core layer 202 by etching, the longer the time of exposing the first sidewall farther away from the top of the core layer 202 to the etching process environment, the shorter the time of exposing the first sidewall closer to the top of the core layer 202 to the etching process environment, and thus the arc shape of the first sidewall higher than the top of the remaining core layer 202 after removing the first thickness core layer 202 by etching.
The first thickness should not be too large, nor too small. If the first thickness is too large and the thickness of the remaining core layer 202 is too small, the mechanical supporting effect on the sidewall layer 203 higher than the top of the remaining core layer 202 is small, which easily causes the problem of collapse of the sidewall layer 203 higher than the top of the remaining core layer 202, and further, if the first thickness is too large, the etching time required for etching and removing the first thickness core layer 202 is long, so that the arc radian presented by the first sidewall higher than the top of the remaining core layer 202 is too large, and subsequently, after the sidewall layer 203 is etched back, the difference in morphology between the first sidewall and the second sidewall of the etched-back sidewall layer 203 is large; if the first thickness is too small, the arc radian of the first sidewall higher than the top of the remaining core layer 202 is too small, and then after etching back the sidewall layer 203, the morphology difference between the first sidewall and the second sidewall of the etched-back sidewall layer 230 is large.
Therefore, in the present embodiment, the first thickness is 1/5-2/3 of the initial thickness of the core layer 202.
The core layer is made of amorphous carbon and is doped with O2Etching to remove the core layer with the first thickness; the core layer is made of polycrystalline silicon, and the core layer with the first thickness is removed by etching through Cl plasma.
Referring to fig. 11, the sacrificial layer 204 (refer to fig. 10) is removed to expose the second sidewall of the sidewall layer 203.
In this embodiment, the sacrificial layer 204 is removed by etching using a dry etching process, where the etching gas used in the dry etching process includes O2、N2Or H2。
In other embodiments, the sacrificial layer may be removed by a wet etching process or an ashing process.
Referring to fig. 12, the sidewall layer 203 is etched back by using an anisotropic etching process, the sidewall layer 203 on a portion of the substrate 201 is etched and removed, and a second sidewall and a first sidewall of the sidewall layer 203 are also etched.
In the process of etching back the sidewall layer 203 by using the anisotropic etching process, the region of the second sidewall far from the surface of the substrate 201 can be contacted with the etching gas earlier, so that the etching rate of the anisotropic etching process on the region of the second sidewall far from the surface of the substrate 201 is faster. Therefore, after etching back the sidewall layer 203, the second sidewall of the sidewall layer 203 higher than the top of the remaining core layer 202 is also correspondingly curved, and the second sidewall of the sidewall layer 203 is inclined.
The anisotropic etch also etches the first sidewall above the top of the remaining core layer 202, and after etching back the sidewall layer 203, the first sidewall of the sidewall layer 203 is still curved.
The inclination directions of the second side wall and the first side wall are opposite, so that the difference between the first side wall and the second side wall is reduced, and therefore when the substrate 201 is etched by taking the side wall layer 203 as a mask, the difference of the etching gas collection angles of the etching process in the two side areas of the same side wall layer 203 is smaller, and the appearance of a target pattern formed by etching can be improved.
In this embodiment, by adjusting the process parameters of the anisotropic etching process, after the sidewall layer 203 is etched back, the first sidewall and the second sidewall higher than the top of the remaining core layer 202 are symmetrical, and when the substrate 201 is etched by using the sidewall layer 203 as a mask, the etching gas collection angles of the etching processes in the regions on both sides of the sidewall layer 203 are the same, so that the target pattern formed by etching has an excellent shape.
The gas adopted by the anisotropic etching process comprises fluorocarbon-based gas, and the fluorocarbon-based gas comprises CF4、CHF3Or CH2F2。
In addition, in this embodiment, in the process of back etching the side wall layer 203, the remaining core layer 202 covers a part of the first side wall of the side wall layer 203, and the remaining core layer 202 is also located on a part of the substrate 201, so that the remaining core layer 202 protects the substrate 201, and the substrate 201 is prevented from being etched by the process of back etching the side wall layer 203, thereby further improving the quality of a subsequently formed target pattern.
Referring to fig. 13, the remaining core layer 202 (refer to fig. 12) is removed.
In this embodiment, a dry etching process is used to remove the remaining core layer 202 by etching.
It should be noted that, in other embodiments, the remaining core layer may be removed first, and then the side wall layer is etched back by using an anisotropic etching process.
Referring to fig. 14, the substrate 201 is etched to form a target pattern with the etched-back sidewall layer 203 as a mask.
And etching the substrate 201 by using the etched back side wall layer 203 as a mask by adopting a dry etching process, and forming a target pattern in the substrate 201.
The shape difference between the first sidewall and the second sidewall opposite to the etched sidewall layer 203 is small after back etching, so that the difference of the etching gas collection angles in the two side areas of the sidewall layer 203 is small.
In this embodiment, the first sidewall and the second sidewall of the etched-back sidewall layer 203 are symmetrical, so as to avoid the problem of different etching gas collection angles caused by the inclination of the surface of the sidewall of one side of the sidewall layer 203; and the collection angles of the etching gases in the areas on the two sides of the etched back sidewall layer 203 are the same, so that the micro-load effect is effectively reduced or avoided in the etching process of the etched substrate 201, the problem of poor etching speed caused by the micro-load effect is avoided, the height difference of the top surface of the substrate 201 on the two sides of the target pattern is reduced, and the quality of the target pattern formed by the double patterning method is improved.
Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be effected therein by one skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.
Claims (17)
1. A method of double patterning, comprising:
providing a substrate with a plurality of discrete core layers thereon;
forming a side wall layer on the top and side walls of the core layer and on the substrate, wherein the side wall layer on the side wall of the core layer has a first side wall and a second side wall which are opposite, and the first side wall is close to the core layer;
forming a sacrificial layer on the side wall layer to fill the region between the adjacent core layers, wherein the sacrificial layer is close to the second side wall;
removing the side wall layer higher than the top of the core layer to expose the top of the core layer;
etching to remove the core layer with the first thickness, and etching the top of the side wall layer and the first side wall higher than the rest core layer to make the first side wall higher than the top of the rest core layer in an arc shape;
removing the sacrificial layer to expose the second side wall of the side wall layer;
etching back the side wall layer by adopting an anisotropic etching process, etching to remove the side wall layer on part of the substrate, etching a second side wall and a first side wall of the side wall layer, etching back the side wall layer to enable the second side wall higher than the top of the residual core layer to be arc-shaped, and after etching back the side wall layer, enabling the first side wall higher than the top of the residual core layer to be symmetrical to the second side wall;
removing the residual core layer;
etching the substrate to form a target pattern by taking the etched back side wall layer as a mask;
in the direction parallel to the substrate surface, the width of the core layers is a first width, the width of the sacrificial layer between adjacent core layers is a second width, and the second width is equal to the first width.
2. The method of double patterning of claim 1, wherein the first thickness is 1/5-2/3 of the initial thickness of the core layer.
3. The double patterning method of claim 1, wherein the material of the core layer is amorphous carbon, and O doping is used2Etching to remove the core layer with the first thickness; the core layer is made of polycrystalline silicon, and the core layer with the first thickness is removed by etching through Cl plasma.
4. The method of double patterning of claim 1, wherein the anisotropic etch process uses a gas comprising a fluorocarbon-based gas.
5. The double patterning method of claim 1, wherein the material of the core layer is one or more of amorphous carbon, OD L material, polysilicon, silicon oxide, silicon nitride, or silicon oxynitride.
6. The method of dual patterning of claim 1, wherein the material of the side wall layer is different from the material of the core layer.
7. The double patterning method of claim 6, wherein the material of said spacer layer is silicon oxide or silicon nitride.
8. The double patterning method of claim 1, wherein said spacer layer is formed using an atomic layer deposition process.
9. The method of double patterning of claim 1, wherein the material of the sacrificial layer is different from the material of the sidewall layer.
10. The method of double patterning of claim 9, wherein the material of the sacrificial layer is a DUO material, a BARC material, or a spin-on carbon-containing material.
11. The method of double patterning of claim 1, wherein said remaining core layer is removed after etching back said spacer layer.
12. The method of double patterning of claim 1, wherein the sacrificial layer top is higher than the core layer top before the core layer top is exposed; the process step of exposing the top of the core layer includes: and grinding to remove the sacrificial layer and the side wall layer which are higher than the top of the core layer by adopting a chemical mechanical grinding process.
13. The method of double patterning of claim 1, wherein the top of the sacrificial layer is higher than the top of the sidewall layer before the top of the core layer is exposed; the process step of exposing the top of the core layer includes: grinding and removing the sacrificial layer higher than the top of the side wall layer by adopting a chemical mechanical grinding process; and after the chemical mechanical grinding process, carrying out dry etching treatment on the sacrificial layer and the side wall layer by adopting a dry etching process.
14. The method of double patterning of claim 13, wherein the dry etch process uses an etch gas comprising a fluorocarbon gas, wherein the fluorocarbon gas is C4F8Or CH3F。
15. The double patterning method of claim 1, wherein the sacrificial layer is removed using an ashing process or a dry etching process.
16. The double patterning method of claim 15, wherein said sacrificial layer is removed using a dry etching process; the etching gas adopted by the dry etching process comprises O2、N2Or H2。
17. The method of double patterning of claim 1, wherein the process step of forming the core layer comprises: forming a core film on the substrate; forming a patterning layer on the core film; etching the core film by taking the graphic layer as a mask until the surface of the substrate is exposed, and forming a plurality of discrete core layers on the substrate; and removing the graph layer.
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