KR20070113604A - Method for forming micro pattern of semiconductor device - Google Patents

Abstract

A method for forming a micro pattern of a semiconductor device is provided to achieve a micro pattern by a single mask process, and to improve a line CD(Critical Dimension) irregularity due to a miss-alignment problem caused by double mask process of DEET(Double Exposure and Etch Technology). An insulating layer for sacrificing pattern is deposited on an etched layer. A photoresist pattern is formed on the insulating layer. A sacrifice pattern is formed to expose the etched layer partially by etching the insulating layer through a first etching process using the photoresist pattern as an etch mask. A spacer for the etch mask is formed at both sides of the sacrifice pattern. A pattern for the etch mask(17a) is formed by removing the sacrifice pattern. A micro pattern is formed by etching the etched layer through a second etch process using the pattern as the etch mask.

Description

METHOD FOR FORMING MICRO PATTERN OF SEMICONDUCTOR DEVICE

1A to 1G are cross-sectional views illustrating a method of forming a fine pattern of a semiconductor device using a general double exposure and etching technology (DEET) process.

2A to 2F are cross-sectional views illustrating a method of forming a fine pattern of a semiconductor device in accordance with a preferred embodiment of the present invention.

Figure 3 is a SEM (Scanning Electron Microscope) photo showing the micropattern of the semiconductor device implemented through the method for forming a micropattern of the semiconductor device according to an embodiment of the present invention.

<Explanation of symbols for the main parts of the drawings>

DESCRIPTION OF SYMBOLS 1: Etching layer 2, 13: Amorphous carbon film

2a: amorphous carbon film pattern 3: silicon oxynitride film

3a: silicon oxynitride film pattern 4, 17: polysilicon film

4a: first polysilicon film pattern 4b: second polysilicon film pattern

5, 7, 15: BARC film 5a: BARC film pattern

6, 8: photosensitive film 6a: first photosensitive film pattern

8a: second photosensitive film pattern 11: gate electrode

12: hard mask 12a: hard mask pattern

13a: sacrificial pattern 14: oxide film

17a: Pattern for etching mask

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to semiconductor manufacturing technology, and more particularly, to a method of forming a fine pattern of a semiconductor device.

As semiconductor devices are highly integrated, line and space (hereinafter referred to as LS) of 40 nm or less is required. However, it is very difficult to form LS of 60 nm or less due to the limitations of the exposure equipment currently developed and commercialized. Accordingly, a DEET (Double Exposure and Etch Technology) process technology has been proposed to realize a fine LS of 60 nm or less while using a commercially available exposure equipment as it is.

1A to 1G are cross-sectional views illustrating a micropattern of a semiconductor device using a DEET process, which has been proposed and applied to a micropattern forming process of a semiconductor device.

First, as shown in FIG. 1A, an amorphous carbon film 2, a silicon oxynitride film 3, a polysilicon film 4, and BARC are formed on the etched layer 1. A bottom anti-reflective coating layer 5 is applied sequentially. In this case, the etched layer 1 is formed of a hard mask of a nitride film series.

Next, a photosensitive resin (photoresist) (hereinafter referred to as photosensitive film) 6 is applied over the BARC film 5.

Subsequently, as illustrated in FIG. 1B, an exposure and development process using a photomask is performed to form a photoresist pattern 6a (hereinafter referred to as a first photoresist pattern).

Subsequently, a dry etching process using the first photosensitive film pattern 6a as an etching mask is performed to sequentially etch the BARC film 5 and the polysilicon film 4 (see FIG. 1A). As a result, a plurality of BARC film patterns 5a and a polysilicon film pattern 4a (hereinafter referred to as a first polysilicon film pattern) in which a part of the silicon oxynitride film 3 is exposed are formed.

Subsequently, as illustrated in FIG. 1C, a strip process is performed to remove the first photoresist pattern 6a (see FIG. 1B). At this time, the BARC film pattern 5a is also removed to expose the first polysilicon film pattern 4a, since the BARC film is made of the same series of resin film as the photosensitive film.

Subsequently, the BARC film 7 and the photosensitive film 8 are sequentially coated on the entire structure including the first polysilicon film pattern 4a so as to fill the neighboring first polysilicon film pattern 4a.

Subsequently, as illustrated in FIG. 1D, an exposure and development process using a photo mask is performed to form a photosensitive film pattern 8a (hereinafter referred to as a second photosensitive film pattern). In this case, the openings of the second photoresist pattern 8a are formed so as not to correspond to the openings of the first photoresist pattern 6a.

Subsequently, a dry etching process using the second photosensitive film pattern 8a as an etching mask is performed to sequentially etch the BARC film 7 and the first polysilicon film pattern 4a (see FIG. 1C). As a result, a BARC film pattern 7a and a polysilicon film pattern 4b (hereinafter referred to as a second polysilicon pattern) are formed.

Subsequently, as shown in FIG. 1E, a strip process is performed to remove the second photoresist pattern 8a (see FIG. 1D). At this time, the BARC film pattern 7a is also removed. Thus, the second polysilicon film pattern 4b in which both the first and second photoresist film patterns 6a and 8a are reflected is completed.

Subsequently, as illustrated in FIG. 1F, a dry etching process using the second polysilicon film pattern 4b as an etching mask is performed to sequentially etch the silicon oxynitride film 3 and the amorphous carbon film 2. As a result, the amorphous carbon film pattern 2a and the silicon oxynitride film pattern 3a are formed.

Next, the second polysilicon film pattern 4b is removed.

As shown in FIG. 1G, the etching target layer 1 is etched by performing an etching process using the silicon oxynitride layer pattern 3a and the amorphous carbon layer pattern 2a as an etching mask. As a result, the etched layer 1 has a pattern in which both the first and second photoresist pattern 6a and 8a are reflected.

As described above, the DEET process technology according to the prior art forms a fine pattern of the semiconductor device by using two photolithography process. However, non-uniformity of line critical dimensions occurs due to misalignment of the photo masks during the first and second photo etching processes, and the BARC film 7 is unevenly applied due to the influence of the underlying topology during the second photo process.

Accordingly, the present invention has been proposed to solve the above problems of the prior art, and provides a method of forming a fine pattern of a semiconductor device capable of improving the non-uniformity of line critical dimensions due to two photo mask operations during the DEET process. Its purpose is to.

According to an aspect of the present invention, there is provided a method of fabricating an insulating film for a sacrificial pattern on a layer to be etched, forming a photosensitive film pattern on an insulating film for a sacrificial pattern, and etching the photosensitive film pattern. Forming a sacrificial pattern in which a portion of the etched layer is exposed by etching the insulating pattern for the sacrificial pattern through a first etching process, forming spacers for etching masks on both sidewalls of the sacrificial pattern; Forming a pattern for an etch mask by removing the sacrificial pattern, and forming a fine pattern by etching the etched layer through a second etching process using the pattern for etching as an etch mask. Provided is a method for forming a fine pattern.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. In addition, in the drawings, the thicknesses of layers and regions are exaggerated for clarity, and in the case where the layers are said to be "on" another layer or substrate, they may be formed directly on another layer or substrate or Or a third layer may be interposed therebetween. In addition, the same reference numerals throughout the specification represent the same components.

Example

2A to 2F are cross-sectional views illustrating a method of forming a fine pattern of a semiconductor device according to an embodiment of the present invention. Here, as an example, a method of forming a fine pattern of a semiconductor device using a hard mask formed on the gate electrode as an etched layer will be described.

First, as shown in FIG. 2A, a hard mask 12, an amorphous carbon film 13 for sacrificial patterns, an oxide film 14, and a BARC film 15 are sequentially formed on the gate electrode 11. In this case, the gate electrode 11 is formed of a laminated structure of a polysilicon film and a tungsten silicide film, the hard mask 12 is formed of a nitride film-based material, and the oxide film 14 is formed of a silicon oxide film (SiO ₂ ).

Subsequently, after the photoresist film is applied on the BARC film 15, the photoresist pattern 16a is formed by performing exposure and development processes using a photomask.

2B, the BARC film 15, the oxide film 14, and the amorphous carbon film 13 are sequentially etched by performing a dry etching process using the photosensitive film pattern 16a as an etching mask. As a result, the BARC film pattern 15a, the oxide film pattern 14a, and the sacrificial pattern 13a are formed.

Subsequently, as shown in FIG. 2C, a strip process is performed to remove the photoresist pattern 16a (see FIG. 2B). At this time, the BARC film pattern 15a is also removed to expose the oxide film pattern 14a, since the BARC film is made of the same series of resin film as the photosensitive film.

Next, the oxide film pattern 14a is removed. At this time, the oxide layer pattern 14a is removed using a wet etching solution containing HF, for example, a BOE (Buffered Oxide Etchant) solution-a solution in which HF and NH ₄ F are mixed at 100: 1 or 300: 1. It is preferable. This is to minimize damage of the sacrificial pattern 13a, which is the lower layer, and the hard mask 12 of the nitride film series.

Subsequently, as illustrated in FIG. 2D, the polysilicon film 17 for the etching mask is deposited along the step of the upper surface of the entire structure including the sacrificial pattern 13a. Here, the reason why the polysilicon film 17 is used for the etching mask is that the characteristics of the polysilicon film have a high etching selectivity with the sacrificial pattern 13a and a high etching selectivity with the nitride mask-based hard mask 12. Because it has. Meanwhile, the polysilicon film 17 is preferably deposited at a temperature lower than the deposition temperature of the amorphous carbon film 13 in order to prevent the sacrificial pattern 13a from being damaged during the deposition process.

Subsequently, a polysilicon film 17 is left on both sidewalls of the sacrificial pattern 13a by performing an entire surface etching process. That is, the polysilicon film 17 is formed on both sidewalls of the sacrificial pattern 13a in the form of a spacer. In this case, the entire surface etching process may be performed without using an etching mask, such as a blanket process or an etch back process. The deposition thickness of the polysilicon film 17 greatly affects the critical dimension (CD) of the etched layer pattern 12a (see FIG. 2F). That is, when the deposition thickness of the polysilicon film 17 is thick, the thickness of the spacer is increased to increase the critical dimension of the etching mask pattern 17a. As a result, the critical dimension of the etched layer pattern 12a is increased.

Meanwhile, the spacer may be formed by performing chemical mechanical polishing (CMP) instead of the entire surface etching process. In this case, the chemical mechanical polishing process is performed until the top surface of the sacrificial pattern 13a is exposed.

Subsequently, as shown in FIG. 2E, the sacrificial pattern 13a exposed between the spacers is sequentially removed to form the etching mask pattern 17a. At this time, the sacrificial pattern (13a) removal process is performed by a photosensitive film strip process using a plasma (plasma).

Subsequently, as illustrated in FIG. 2F, a dry etching process using the etching mask pattern 17a as an etching mask is performed to etch the hard mask 12 as an etching layer. As a result, the hard mask pattern 12a is formed. At this time, the etching process is performed under the etching conditions that the etching rate of the polysilicon film and the nitride film is 1: 4 to 1: 5 or more. For example, it is performed using CHF ₃ / CF ₄ / Ar plasma.

Meanwhile, as illustrated in FIG. 2F, the etching mask pattern 17a is also etched by a predetermined thickness during the dry etching process for forming the hard mask pattern 12a. This is because the etching rate of the etching mask pattern 17a and the hard mask 12 is increased to an etching condition of 1: 4 to 1: 5 or more during the dry etching process.

As described so far, the method for forming a micropattern according to the embodiment of the present invention can form the same micropattern as the DEET process with only one mask process.

3 (a) and 3 (b) are SEM (Scanning Electron Microscope) photographs of a 40 nm micro pattern formed by the method of forming a micro pattern according to an embodiment of the present invention. Here, FIG. 3A is a plan view corresponding to FIG. 2F, and FIG. 3B is a cross-sectional view showing a part along the line II ′ of FIG.

An amorphous carbon film was deposited at a temperature of 550 ° C., and a polysilicon film for a sacrificial pattern was deposited at 510 ° C. during the formation process for forming the fine patterns shown in FIGS. 3A and 3B.

Meanwhile, the reason why the amorphous carbon film 13 is used for the sacrificial pattern in FIG. 2A is different from the O ₂ plasma-commonly used in the photoresist pattern strip process in the sacrificial pattern 13a removing process performed in FIG. 2E. This is to selectively and easily remove the sacrificial pattern 13a while minimizing damage to the film.

Further, the reason why the oxide film 14 is deposited between the anti-reflection film BARC film 15 and the amorphous carbon film 13 is that the thickness of the photosensitive film pattern 16a is relatively thin during the dry etching process performed in FIG. 2B. It is applied relatively thin due to the constraint of the phase—because there is a limit in etching the amorphous carbon film 13 deposited thickly during the etching process. That is, during the etching process, the oxide film 14 functions as an etch barrier film to compensate for the limitation of the thickness of the photoresist pattern 16a. In addition, in FIG. 2C, the damage of the hard mask 12, which is an etched layer, is minimized during the removal of the oxide layer pattern 14a. Accordingly, the oxide film 14 may be formed of a nitride film or an oxynitride film depending on the material of the hard mask 12, which is an etched layer.

Although the technical spirit of the present invention has been described in detail in the preferred embodiments, it should be noted that the above-described implementation is for the purpose of description and not of limitation. In addition, it will be understood by those skilled in the art that various embodiments are possible within the scope of the technical idea of the present invention.

As described above, according to the present invention, the following effects can be obtained.

First, according to the present invention, it is possible to implement a fine pattern like the DEET process with only one mask process.

Second, according to the present invention, it is possible to improve the non-uniformity of the line critical dimension due to the misalignment caused by the two mask process performed during the general DEET process.

Claims (12)

Depositing an insulating film for a sacrificial pattern on the etched layer; Forming a photoresist pattern on the sacrificial pattern insulating layer; Forming a sacrificial pattern through which a portion of the etched layer is exposed by etching the insulating layer for the sacrificial pattern through a first etching process using the photoresist pattern as an etching mask; Forming spacers for etching masks on both sidewalls of the sacrificial pattern; Removing the sacrificial pattern to form a pattern for an etching mask; And Forming a fine pattern by etching the etched layer through a second etching process using the etching mask pattern as an etching mask Method of forming a fine pattern of a semiconductor device comprising a. The method of claim 1, And the insulating film for the sacrificial pattern is formed of an amorphous carbon film. The method of claim 2, The spacer is a fine pattern forming method of a semiconductor device formed of a polysilicon film. The method of claim 3, wherein The etching pattern is a fine pattern forming method of a semiconductor device formed of a nitride film-based material. The method of claim 4, wherein The second etching process may be performed under an etching condition in which the etching rate of the etching mask pattern and the etching target layer is at least 1: 4. The method of claim 4, wherein Forming the spacers, Depositing a polysilicon film along a step of an upper surface of the entire structure including the sacrificial pattern; And Etching the polysilicon layer by using an entire surface etching process Method of forming a fine pattern of a semiconductor device comprising a. The method of claim 4, wherein Forming the spacers, Depositing a polysilicon film along a step of an upper surface of the entire structure including the sacrificial pattern; And Polishing the polysilicon layer until the upper portion of the sacrificial pattern is exposed using a chemical mechanical polishing process Method of forming a fine pattern of a semiconductor device comprising a. The method according to claim 6 or 7, And forming an oxide film on the sacrificial pattern insulating film. The method of claim 8, And forming an anti-reflection film on the oxide film. The method of claim 9, Forming the sacrificial pattern, Etching the anti-reflection film, the oxide film, and the sacrificial pattern insulating film by performing the first etching process; Removing the photoresist pattern and the anti-reflection film; And Removing the oxide film Method of forming a fine pattern of a semiconductor device comprising a. The method of claim 10, Removing the oxide film is a method of forming a fine pattern of a semiconductor device using a BOE solution. The method of claim 11, The second etching process is a method of forming a fine pattern of a semiconductor device using a CHF ₃ / CF ₄ / Ar plasma.

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