CN107707829B - Multi-interface intelligent SDI video conversion box realized based on FPGA - Google Patents
Multi-interface intelligent SDI video conversion box realized based on FPGA Download PDFInfo
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/222—Studio circuitry; Studio devices; Studio equipment
- H04N5/262—Studio circuits, e.g. for mixing, switching-over, change of character of image, other special effects ; Cameras specially adapted for the electronic generation of special effects
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/01—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
- H04N7/0127—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level by changing the field or frame frequency of the incoming video signal, e.g. frame rate converter
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/18—Closed-circuit television [CCTV] systems, i.e. systems in which the video signal is not broadcast
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Abstract
The invention relates to a multi-interface intelligent SDI video conversion box realized based on FPGA, which designs various types of video input interfaces based on FPGA technology, adopts seamless conversion technology to complete time sequence conversion of input video sources for each input interface, converts videos in various formats into videos meeting SMPTE standard, can rotate, adjust colors, superpose logos and other operations for the videos, and can carry out corresponding function configuration on the video conversion box according to the conditions of rear-end display equipment or acquisition equipment by a user, thereby being suitable for use in various occasions.
Description
Technical Field
The invention relates to the technical field of video conversion, in particular to a multi-interface intelligent SDI video conversion box realized based on FPGA
Background
The SDI is the most promising among numerous digital video non-compression standards, mainly because the SDI uses a high-grade coaxial cable to transmit without relay at a distance of about 100 meters, and is the farthest among numerous video non-compression standards, thereby bringing convenience for field use, the SDI-based monitoring system has the advantages of reliability of no distortion of ①, the SDI is different from the IP system in that video data is transmitted on the network in a compressed mode, the SDI video is transmitted on the coaxial cable in an uncompressed mode, and is stable and reliable without distortion, the ② -grade real-time image, the SDI does not need to be compressed, packaged and decoded in the video generation and transmission process, does not generate delay similar to IP high-definition images, is suitable for various occasions of pursuing real-time monitoring, such as a digital component serial interface (SDI), namely a digital component serial interface, and can be mainly applied to the monitoring industry and the television broadcasting industry, the SDI technology is mainly applied to the video monitoring industry, and the television broadcasting industry, and is widely applied to the SDI technology.
At present, according to the difference between the video resolution and the frame rate, SDI is divided into 3 standards, namely ① SD-SDI (standard definition SDI), mainly aiming at the standard definition resolution, 25 frames or 30 frames per second, the video bandwidth after analog-to-digital conversion is about 250Mbps, ② HD-SDI (high definition SDI), mainly aiming at the standard definition resolution, 1080P (resolution ratio), 25 or 30 frame rate and 1.485Gbps data volume after analog-to-digital conversion, ③ 3G-SDI (high definition high frame rate SDI) is still 1080P, but the frame rate is increased to 50 or 60, and 2.97Gbps data volume after analog-to-digital conversion.
At present, video interfaces commonly used in the fields of computers and monitoring include DVI, HDMI, VGA, CVBS, etc., wherein the DVI, HDMI, VGA can be used for transmitting high-definition video such as 1080P @60, but the transmission distance is generally limited to 10 meters, the transmission distance of the CVBS can reach more than 200 meters, but the image quality is not more than 768 x 576@25, and the CVBS belongs to the standard definition range. Due to the advantages of image quality and transmission distance of the SDI in image transmission, videos of other interface types can be converted into SDI interface videos for transmission.
In the existing design process, the electrical characteristics of video interfaces such as DVI, HDMI, VGA, CVBS and the like are mainly converted into SDI electrical characteristics simply, time sequence conversion is not performed on transmitted videos, when the input videos do not meet the Video Electronics Standards Association (VESA) standard or the resolution of the input videos is changed suddenly, the output of an SDI end is changed accordingly, the rear-end display equipment 'screen splash' or 'screen blackness' can be caused, videos which do not meet the SMPTE standard after conversion cannot be displayed on common display equipment at all, the interface of an existing SDI video conversion box on the market is single at present, the conversion from a certain single interface to an SDI interface can be met frequently, the conversion from DVI to SDI, the conversion from CVBS to SDI and the like is achieved, the universality is low, and application scenes are limited.
Disclosure of Invention
The invention aims to design a multi-interface intelligent SDI video conversion box realized based on FPGA, which designs various types of video input interfaces based on FPGA technology, adopts seamless conversion technology to complete time sequence conversion of input video sources for each input interface, converts videos in various formats into videos meeting SMPTE standard, can rotate, adjust colors, superpose Logo and other operations for the videos, and can carry out corresponding functional configuration on the video conversion box according to the conditions of rear-end display equipment or acquisition equipment by a user, thereby being suitable for use in various occasions.
The invention is realized by the following technical scheme:
a multi-interface intelligent SDI video conversion box based on FPGA is realized by adopting the SDI video conversion box with the following structure:
the structure of the SDI video conversion box comprises:
the FPGA is used for realizing video signal detection and acquisition, time sequence conversion, high-speed serial data generation and interface circuit control, carrying out format conversion on video signals after receiving the video signals from DVI, CVBS and VGA interfaces, generating high-speed serial port signals through an SDIP core, receiving a command from a main control end through a serial port communication interface, and finishing image turning, color adjustment and Logo superposition;
the clock circuit is connected with the FPGA and is used for providing a logic clock of the FPGA and a reference clock of the SDIP core;
the 1-channel DVI video input interface is arranged at the video input end of the FPGA;
the 1-channel CVBS video input interface is arranged at the video input end of the FPGA;
the 1-path VGA video input interface is arranged at the video input end of the FPGA;
the 3-channel SD/HD/3GSDI video output interface is independently arranged at the video output end of the FPGA and used for converting the high-speed serial port digital signal of the FPGA into a signal which accords with the electrical characteristics of the SDI standard and adding balance and drive;
the DDR3 memory is connected with the FPGA and used for storing the video data of the three channels;
the EPCQ256 memory is connected with the FPGA and used for storing the configuration parameters of the FPGA;
and the master control interface is connected with the FPGA through a serial port transceiving chip.
Furthermore, the front end of the 1-channel DVI video input interface is provided with a video main input connector with the model of DVI-I (24+ 5).
Further, the master control interface adopts an interface connector with the model of DB9, the master control interface adopts a serial port mode for communication, and the model of a transceiver chip adopted by the serial port communication is MAX 3491.
Further, the SD/HD/3GSDI video output interface selects a video output driver with a chip model of LMH0303, and an SMA coaxial connector is arranged at the output end of the SD/HD/3GSDI video output interface.
Further, the DVI video input interface is used for receiving DVI video signals, the maximum support is 1080P @60 resolution, and the input resolution can be set at will under the condition that the maximum resolution is not exceeded.
Furthermore, the CVBS video input interface is used for receiving the CVBS video signals, supporting NTSC, PAL and SECAM analog video signals and automatically detecting the signal type.
Further, the VGA video input interface is used for receiving VGA video signals, the maximum support of 1080P @60 resolution is realized, and the input resolution can be set at will under the condition that the maximum resolution is not exceeded.
Further, the FPGA is integrated with a serial port communication module, a Logo buffer area module, an image inversion control module, a DDR3 write control module, a DDR3 read control module, an RAM module, a video time sequence conversion module, a reference clock switching control module, a clock circuit module, an SDI core module, a color adjustment module, a color space conversion module, a write FIFO control module, an FIFO module and a resolution detection module;
the serial port communication module, the color adjustment module, the color space conversion module, the write FIFO control module, the FIFO module, the DDR3 write control module, the DDR3 read control module, the RAM module, the video time sequence conversion module and the SDI core module are sequentially connected;
the input end of the color adjusting module is externally connected with a DVI video input interface, a CVBS video input interface or a VGA video input interface;
the color adjusting module is respectively connected with the write FIFO control module, the DDR3 write control module and the DDR3 read control module through a resolution detection module;
the DDR3 write control module is connected with the image overturning module;
the video time sequence conversion module is connected with the DDR3 read control module;
the serial port communication module is connected with the image inversion control module, the DDR3 read control module, the Logo cache area module, the video time sequence conversion module and the reference clock switching control module respectively, and the output end of the image inversion control module is connected with the DDR3 write control module and the DDR3 read control module respectively;
the Logo cache region module is connected with the DDR3 read control module;
the reference clock switching control module is connected with a hardware clock circuit, and the output of the clock circuit is connected with the SDI core module.
The invention provides a multi-interface intelligent SDI video conversion box based on FPGA, which has the following beneficial effects compared with the prior art:
the invention designs various types of video input interfaces based on FPGA technology, completes the time sequence conversion of input video sources by adopting seamless conversion technology for each input interface, converts the videos in various formats into the videos meeting the SMPTE standard, can rotate, adjust colors, superpose Logo and other operations, and can be used for carrying out corresponding functional configuration on the video conversion box according to the conditions of rear-end display equipment or acquisition equipment by a user so as to adapt to the use of various occasions; by applying the invention, the three popular video interfaces of DVI, CVBS and VGA at present can be conveniently unified to the SDI interface, so that the back-end equipment can be single, the SDI adopts 75 ohm coaxial cable for transmission, the transmission distance is long, the equipment installation is simple, and the hardware cost is reduced. In the invention, the intelligent seamless transition technology enables any standard or non-standard video to be displayed on a common SDI display, and solves the problem that the non-standard video cannot be displayed on the conventional display. In some occasions, the functions of image turning, color adjustment, logo superposition and the like are required to be executed, and the functions are generally finished on the back-end equipment.
Drawings
Fig. 1 is a schematic structural diagram of a multi-interface intelligent SDI video conversion box implemented based on an FPGA according to the present invention.
FIG. 2 is a block diagram of an FPGA logic implementation of the present invention.
In fig. 1: the 1-channel DVI video input interface adopts TFP401 (DVI); the CVBS video input interface adopts ADV7281 (CVBS); the VGA video input interface adopts AD9984A (VGA); DDR3 is DDR3 memory;
in fig. 2: color adjustment is performed to a color adjustment module; converting RGB into YUV422 as a color space conversion module; the write FIFO control module is a write FIFO control module; the FIFO is an FIFO module; the resolution detection is a resolution detection module; DDR3 write control is a DDR3 write control module; DDR3 is a DDR3 module; the image inversion control is an image inversion control module; the Logo cache region is a Logo cache region module; DDR3 read control is a DDR3 read control module; the RAM is a RAM module; a time sequence conversion module for converting time sequence into video time sequence; the SDI core is an SDI core module; the clock circuit is a clock circuit module; the reference clock switching control is a reference clock switching control module;
the FPGA is integrated with a serial port communication module, a Logo cache area module, an image inversion control module, a DDR3 module, a DDR3 write control module, a DDR3 read control module, an RAM module, a video time sequence conversion module, a reference clock switching control module, a clock circuit module, an SDI core module, a color adjustment module, a color space conversion module, a write FIFO control module, an FIFO module and a resolution detection module.
Detailed Description
The invention is further described with reference to figures 1 and 2.
The invention relates to a multi-interface intelligent SDI video conversion box realized based on FPGA, which is realized by adopting an SDI video conversion box with the following structure:
the structure of the SDI video conversion box comprises:
the FPGA is used for realizing video signal detection and acquisition, time sequence conversion, high-speed serial data generation and interface circuit control, carrying out format conversion on video signals after receiving the video signals from DVI, CVBS and VGA interfaces, generating high-speed serial port signals through an SDIP core, receiving a command from a main control end through a serial port communication interface, and finishing image turning, color adjustment and Logo superposition;
the clock circuit is connected with the FPGA and is used for controlling the time sequence of the FPGA;
the 1-channel DVI video input interface is arranged at the video input end of the FPGA;
the 1-channel CVBS video input interface is arranged at the video input end of the FPGA;
the 1-path VGA video input interface is arranged at the video input end of the FPGA;
the 3-channel SD/HD/3GSDI video output interface is independently arranged at the video output end of the FPGA and used for converting the high-speed serial port signal of the FPGA into a signal which accords with the electrical characteristics of the SDI standard and adding balance and drive;
the DDR3 memory is connected with the FPGA and is used for storing the logic command input by the main control interface;
the EPCQ256 memory is connected with the FPGA and used for storing the configuration parameters of the FPGA;
and the master control interface is connected with the FPGA through a serial port communication module.
As an improvement, the front end of the 1-channel DVI video input interface is provided with a video main input interface with the model of DVI-I (24+ 5).
As an improvement, the master control interface adopts a master control interface with the model number of DB9, and the serial port communication module adopts a serial port transceiving chip with the model number of MAX 3491.
As an improvement, the SD/HD/3GSDI video output interface selects a video output interface with a chip model of LMH0303, and an SMA coaxial connector is arranged at the output end of the SD/HD/3GSDI video output interface.
As an improvement, the DVI video input interface is used for receiving a DVI video signal, the maximum support is 1080P @60 resolution, and the input resolution can be set arbitrarily under the condition that the maximum resolution is not exceeded.
As an improvement, the CVBS video input interface is used for receiving CVBS video signals, supporting NTSC, PAL and SECAM analog video signals, and automatically detecting the signal type.
As an improvement, the VGA video input interface is used for receiving a VGA video signal, the maximum support is 1080P @60 resolution, and the input resolution can be set at will under the condition that the maximum resolution is not exceeded.
As an improvement, the FPGA is integrated with a serial port communication module, a Logo buffer module, an image inversion control module, a DDR3 module, a DDR3 write control module, a DDR3 read control module, a RAM module, a video timing conversion module, a reference clock switching control module, a clock circuit module, an SDI core module, a color adjustment module, a color space conversion module, a write FIFO control module, an FIFO module, and a resolution detection module;
the serial port communication module, the color adjustment module, the color space conversion module, the write FIFO control module, the FIFO module, the DDR3 write control module, the DDR3 module, the DDR3 read control module, the RAM module, the video time sequence conversion module and the SDI core module are sequentially connected;
the input end of the color adjusting module is externally connected with a DVI video input interface, a CVBS video input interface or a VGA video input interface;
the color adjusting module is respectively connected with the write FIFO control module, the DDR3 write control module and the DDR3 read control module through a resolution detection module;
the DDR3 write control module is connected with the video time sequence conversion module;
the video time sequence conversion module is connected with the DDR3 read control module;
the serial port communication module is connected with the image inversion control module, the DDR3 read control module, the Logo cache area module, the video time sequence conversion module and the reference clock switching control module respectively, and the output end of the image inversion control module is connected with the DDR3 write control module and the DDR3 read control module respectively;
the serial port communication module is connected with the DDR3 read control module through the Logo cache area module;
the reference clock switching control module, the clock circuit module and the SDI core module are sequentially connected.
Compared with the prior art, the method has the advantages that,
the invention designs various types of video input interfaces based on FPGA technology, completes the time sequence conversion of input video sources by adopting seamless conversion technology for each input interface, converts the videos in various formats into the videos meeting the SMPTE standard, can rotate, adjust colors, superpose Logo and other operations, and can be used for carrying out corresponding functional configuration on the video conversion box according to the conditions of rear-end display equipment or acquisition equipment by a user so as to adapt to the use of various occasions;
by applying the invention, the three popular video interfaces of DVI, CVBS and VGA at present can be conveniently unified to the SDI interface, so that the back-end equipment can be single, the SDI adopts 75 ohm coaxial cable for transmission, the transmission distance is long, the equipment installation is simple, and the hardware cost is reduced. In the invention, the intelligent seamless transition technology enables any standard or non-standard video to be displayed on a common SDI display, and solves the problem that the non-standard video cannot be displayed on the conventional display. In some occasions, the functions of image turning, color adjustment, logo superposition and the like are required to be executed, and the functions are generally finished on the back-end equipment.
In specific implementation, the DVI video input interface, the CVBS video input interface and the VGA video input interface are respectively provided with respective video processing units, one input video interface corresponds to one SD/HD/3GSDI video output interface, each interface is completely and independently processed, any interface can be selected to work when the video processing device is used, and three interfaces can also work simultaneously.
The serial port communication module is used as a control interface of the SDI video conversion box, and commands and data interaction is carried out with a host machine by using an RSYUV422 interface, wherein the host machine can be a PC (personal computer) with a serial port interface or an MCU (microprogrammed control unit) type microcontroller. When a host is involved in field application, each module of the SDI video conversion box is configured correspondingly by the host, and as shown in the connection relation in fig. 2, color adjustment, image inversion, Logo superposition and SDIIP core modules can be controlled, so that corresponding functions are completed. When the field application lacks the host, the SDI video conversion box can automatically detect the format and the resolution of an input image, and the self-configuration of necessary modules required by video acquisition and conversion is completed according to the detected parameters, so that the aim of intelligent work is fulfilled.
The color adjusting module can be configured by a serial port communication module, adjusts the brightness, the contrast and the saturation of an input image, and enables the visual effect of the image to be more gorgeous, and can also work in an off-line mode, namely when a host computer is lost, the working conditions of the module can be divided into two types, if the host computer is accessed last time, the module is subjected to parameter configuration and the function of reserving parameters by the host computer in the absence of the host computer is enabled, the module can continue to work by the last configuration parameters; if the host miss reservation function was not enabled the last time the host accessed, then the module will not perform any processing on the input image and the image data will go to the next module.
The color space conversion module, namely the RGB to YUV422 module shown in fig. 2, is to reduce the data volume of the input image, thereby reducing the bandwidth requirement of the input image on the subsequent processing module, enabling the SDI video conversion box to reach a state where three interfaces operate simultaneously, and reducing the data volume to 2/3 of the original data after passing through the module, which has an obvious effect.
Video data is written into a FIFO module at the front end of a DDR3 after passing through a color space conversion module, a resolution detection module detects the format and resolution of a video, if in a host missing state, video image parameters detected by the module become necessary parameters for an SDI video conversion box to complete basic functions, a video time sequence conversion module and an SDIP core module both need to realize intelligent conversion of the video according to the detection parameters of the resolution detection module, if the video input meets the VESA and SMPTE standards, the conversion is completed by directly using the detected parameters in the conversion process, if the video input does not meet the VESA or SMPTE standards, the video output at an SDI end is intelligently paired to the resolution meeting the VESA and SMPTE standards according to the format and resolution of the input video, and the resolution is the standard resolution closest to the input resolution, so that the video output at the SDI end always meets the SMPTE standards, the normal work of the rear-end display and acquisition equipment is ensured.
The image turning control module can be configured by the serial port communication module, the display can be horizontally placed or vertically placed on certain use occasions, and after the image turning control module performs vertical and horizontal mirror image or 90-degree and 270-degree rotation on the input image, the image is restored to be displayed in a conventional visual mode, so that a user can conveniently watch the image. The module can work in an offline mode, namely when a host computer is lost, the working condition of the image turnover control module can be divided into two types, if the module is subjected to parameter configuration when the host computer is accessed last time and the function of reserving parameters when the host computer is lost is enabled, the module can continue to work by using the last configuration parameters; if the host miss reservation function was not enabled the last time the host accessed, then the module will not perform any processing on the input image and the image data will go to the next module.
The Logo overlapping module is arranged between the Logo cache area module and the DDR3 reading control module, can be configured by a serial port communication module, overlaps pictures and characters of an input image, sends the overlapped pictures and characters to the Logo cache area through a serial port, can select an overlapping area, is convenient for a user to add a symbolic Logo into a transmitted image, propagates for individuals or companies, and can also be used for splicing or embedding and modifying the image. The module can work in an offline mode, namely when a host computer is lost, the working condition of the module can be divided into two types, if the module is subjected to parameter configuration when the host computer is accessed last time and the function of reserving parameters when the host computer is lost is enabled, the module can continue to work by using the last configuration parameters; if the host miss reservation function was not enabled the last time the host accessed, then the module will not perform any processing on the input image and the image data will go to the next module.
The video time sequence conversion module can be configured by the serial port communication module, carries out time sequence seamless conversion on the input image, and whether the front-end image meets the SMPTE standard or not, the front-end image is converted into the image meeting the SMPTE standard after passing through the module. The module can work in an offline mode, namely when a host computer is lost, the working condition of the module can be divided into two types, if the module is subjected to parameter configuration when the host computer is accessed last time and the function of reserving parameters when the host computer is lost is enabled, the module can continue to work by using the last configuration parameters; if the host missing reservation parameter function was not enabled the last time the host accessed, then the module will process the image using the intelligent pairing function.
The SDIP core module can be configured by a serial port communication module, and carries out coding and parallel-serial conversion on images processed at the front end, and the coded and converted image data conforms to an SDI transmission protocol. The module can work in an offline mode, namely when a host computer is lost, the working condition of the module can be divided into two types, if the module is subjected to parameter configuration when the host computer is accessed last time and the function of reserving parameters when the host computer is lost is enabled, the module can continue to work by using the last configuration parameters; if the host missing reservation parameter function was not enabled the last time the host accessed, then the module will process the image using the intelligent pairing function.
The invention can be applied in light of the above description.
The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art should be considered to be within the technical scope of the present invention, and the technical solutions and the inventive concepts thereof according to the present invention should be equivalent or changed within the scope of the present invention.
Claims (6)
1. The utility model provides a many interfaces intelligence SDI video conversion box based on FPGA realizes which characterized in that adopts the SDI video conversion box of following structure to realize:
the structure of the SDI video conversion box comprises:
the FPGA is used for realizing video signal detection and acquisition, time sequence conversion, high-speed serial data generation and interface circuit control, carrying out format conversion on video signals after receiving the video signals from DVI, CVBS and VGA interfaces, generating high-speed serial port signals through an SDI IP core, receiving a command from a main control end through a serial port communication interface, and finishing image turning, color adjustment and Logo superposition;
the clock circuit is connected with the FPGA and is used for providing a logic clock of the FPGA and a reference clock of the SDI IP core;
the 1-channel DVI video input interface is arranged at the video input end of the FPGA;
the 1-channel CVBS video input interface is arranged at the video input end of the FPGA;
the 1-path VGA video input interface is arranged at the video input end of the FPGA;
the 3-channel SD/HD/3G SDI video output interface is independently arranged at the video output end of the FPGA and used for converting the high-speed serial port digital signal of the FPGA into a signal which accords with the electrical characteristics of the SDI standard and adding balance and drive;
the DDR3 memory is connected with the FPGA and used for storing the video data of the three channels;
the EPCQ256 memory is connected with the FPGA and used for storing the configuration parameters of the FPGA;
the master control interface is connected with the FPGA through a serial port transceiving chip;
the CVBS video input interface is used for receiving CVBS video signals, supporting NTSC, PAL and SECAM analog video signals and automatically detecting signal types;
the FPGA is integrated with a serial port communication module, a Logo cache area module, an image inversion control module, a DDR3 write control module, a DDR3 read control module, an RAM module, a video time sequence conversion module, a reference clock switching control module, a clock circuit module, an SDI core module, a color adjustment module, a color space conversion module, a write FIFO control module, an FIFO module and a resolution detection module;
the serial port communication module, the color adjustment module, the color space conversion module, the write FIFO control module, the FIFO module, the DDR3 write control module, the DDR3 read control module, the RAM module, the video time sequence conversion module and the SDI core module are sequentially connected;
the input end of the color adjusting module is externally connected with a DVI video input interface, a CVBS video input interface or a VGA video input interface;
the color adjusting module is respectively connected with the write FIFO control module, the DDR3 write control module and the DDR3 read control module through a resolution detection module;
the DDR3 write control module is connected with the image overturning module;
the video time sequence conversion module is connected with the DDR3 read control module;
the serial port communication module is connected with the image inversion control module, the DDR3 read control module, the Logo cache area module, the video time sequence conversion module and the reference clock switching control module respectively, and the output end of the image inversion control module is connected with the DDR3 write control module and the DDR3 read control module respectively;
the Logo cache region module is connected with the DDR3 read control module;
the reference clock switching control module is connected with a hardware clock circuit, and the output of the clock circuit is connected with the SDI core module.
2. The multi-interface intelligent SDI-video conversion box realized based on FPGA of claim 1, wherein the front end of the 1-way DVI video input interface is provided with a DVI-I (24+5) type video main input connector.
3. The SDI/video conversion box of claim 1, wherein the main control interface is an interface connector of type DB9, the main control interface communicates in serial mode, and the serial communication uses a transceiver chip of type MAX 3491.
4. The multi-interface intelligent SDI video conversion box realized based on FPGA of claim 1, wherein the SD/HD/3G SDI video output interface selects a video output driver with a chip model of LMH0303, and an output end of the SD/HD/3G SDI video output interface is provided with an SMA coaxial connector.
5. The multi-interface intelligent SDI-video conversion box based on FPGA implementation of claim 1, wherein said DVI video input interface is used for receiving DVI video signal, and supports 1080P @60 resolution at maximum, and the input resolution can be arbitrarily set without exceeding the maximum resolution.
6. The multi-interface intelligent SDI video conversion box realized based on FPGA of claim 1, wherein the VGA video input interface is used for receiving VGA video signals, and the maximum support is 1080P @60 resolution, and the input resolution can be set arbitrarily under the condition that the maximum resolution is not exceeded.
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| CA3155270C (en) * | 2015-09-08 | 2023-08-29 | Ross Video Limited | 12g-sdi switcher with integrated processing of quad-link 3g-sdi |
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| CN103220487A (en) * | 2012-01-20 | 2013-07-24 | 北京凯新创达科技发展有限公司 | Universal converter capable of converting high definition into standard definition |
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