CN104883518A - Low-cost small-sized thermal infrared imager - Google Patents

Abstract

Provided is a low-cost small-sized thermal infrared imager which comprises an infrared lens module, a detector module, a FPGA module, a video DAC module, a PHY module, and a power module. The infrared lens module is used for imaging an infrared ray emitted from an object to be detected. The detector module achieves a photoelectric conversion function so as to convert the intensity of the infrared ray into a corresponding digital signal. The FPGA module achieves image processing, encoding, message processing, and a control function of the whole product. The video DAC module achieves a digital-to-analog conversion function in order to convert a RGB or YUV standard digital signal into a CVBS or VGA analog signal to be output. The PHY module converts an Ethernet MAC interface into a 100/1000base-T internet interface or wireless WiFi port so as to achieve video signal digital transmission and a complete machine communication control function. The power module supplies power to the each module of the whole product. The processing part of the low-cost small-sized thermal infrared imager uses a signal medium-large-scale FPGA chip and a normally-used H.264 encoding and decoding dedicated chip and peripheral circuits such as DDR and FLASH thereof are eliminated. As a result, the area of a PCB can be decreased by over 30 percent and power consumption and cost are improved obviously.

Description

Low cost small size thermal infrared imager

Technical field

The invention belongs to infrared thermal imaging, infrared temperature-test technology field, relate to a kind of infrared imaging Realization of Product mechanism.

Background technology

Thermal imager product can be divided into two kinds according to video frequency output type in the market: one is analog video output port, such as CVBS (Composite Video Broadcast Signal) port; Another kind is digital output port, such as Ethernet RJ45 port or wireless WiFi port.For the thermal imager adopting digital output port, industry usually adopts fpga chip and dsp chip to coordinate and realizes.Fpga chip is mainly used in graphic images algorithm process, and DSP adopts double-core with ARM or multi core chip usually, realizes the codec functions of image, to realize storage and the transmission of video stream data.Wherein ARM be used for whole system control and status poll, and and external equipment between communication.

Summary of the invention

The present invention is directed to the thermal imager of digital port, image procossing, coding, Message processing function is realized by adopting the single FPGA chip with CPU core, special coding/decoding module can be saved, reduce small product size, and reduce cost and the power consumption of whole product, greatly improve product competitiveness.

In order to achieve the above object, design a low cost small size thermal infrared imager, it is characterized in that comprising the infrared ray that infrared lens module sends for object under test and carry out imaging; Detector module realizes photoelectric converting function, is the digital signal of corresponding size ultrared intensity-conversion; FPGA module realizes the controlling functions of image procossing, coding, Message processing and whole product; Video DAC module realizes analog conversion function, RGB or YUV standardized digital signal is converted to CVBS or VGA analog signal output; It is 100/1000base-T network interface or wireless WiFi port that PHY module completes ethernet mac interface conversion, thus realizes video signal digital transmission and machine product Communication Control function; Power module is each module for power supply of whole product.

In wherein said FPGA module, FPGA (Field Programmable Gate Array) language is adopted to realize image and video data service process.Its business processing flow comprises frame unit and receives the pixel data exported from detector, and is spliced into the data of complete piece image according to the parameter such as resolution, bit wide; Graphics processing unit carries out algorithm process to infrared picture data; Video interface converting unit is mated for the digital port of selected video DAC chip, is converted to corresponding form; MJPEG coding unit is encoded to MJPEG form to video flowing; Message process unit is packaged into the data flow of the Ethernet data form of standard for the video flowing after coding; CPU element is used for machine system and controls and status poll.

The low cost small size thermal imager that the present invention obtains has following characteristics:

1. Business Processing adopts monolithic to realize with large-scale F PGA chip in CPU core, does not need extra cpu circuit module and coding-decoding circuit;

2. adopt a flow process for hardware description language process video stream data, this flow process mainly contains 5 unit and forms: frame unit 1, graphics processing unit 2, video interface converting unit 3, MJPEG coding unit 4 and message process unit 5;

3. for the coding unit 4 of this flow process, adopt MJPEG coded format, its compression ratio, about 0.05, has taken into account required FPGA resource and output bandwidth requirement, ensures the feasibility that product commercialization realizes;

4. for the message process unit 5 of this flow process, video stream data after MJPEG coding is packaged into the Ethernet message of standard, Ethernet message form is also adopted for the configuration of product and status poll, includes but not limited to the message formats such as TCP/IP, RTP, UDP.

Business Processing part of the present invention adopts single middle large-scale F PGA chip to realize, eliminate the peripheral circuits such as the conventional H.264 encoding and decoding special chip of industry and DDR, FLASH, circuit printing plate area can reduce more than 30%, and power consumption and cost also have clear improvement.Especially for the scene requiring thermal imager compact, and need use the field of more thermal imager for electric power detection, video monitoring etc., the present invention program has very large competitiveness.

Accompanying drawing explanation

Fig. 1 is embodiment of the present invention hardware plan block diagram.

Fig. 2 is embodiment of the present invention FPGA interior business process chart.

Fig. 3 is design schematic diagram of the present invention.

Embodiment

Below by embodiment, the invention will be further described by reference to the accompanying drawings.

Embodiment 1.

As shown in Figure 1 and Figure 2, the resolution that the present embodiment describes is the non-refrigeration type network thermal imager of 640*480 is that example sets forth implementation, comprises the infrared ray that infrared lens module 10 sends for object under test and carries out imaging; Detector module 20 realizes photoelectric converting function, is the digital signal of corresponding size ultrared intensity-conversion; FPGA module 30 realizes the controlling functions of image procossing, coding, Message processing and whole product; Video DAC module 40 realizes analog conversion function, RGB or YUV standardized digital signal is converted to CVBS or VGA analog signal output; It is 100/1000base-T network interface or wireless WiFi port that PHY module 50 completes ethernet mac interface conversion, thus realizes video signal digital transmission and machine product Communication Control function; Power module 60 is each module for power supply of whole product;

Wherein said FPGA module 30 comprises frame unit 1 and receives the pixel data exported from detector, and is spliced into the data of complete piece image according to the parameter such as resolution, bit wide; Graphics processing unit 2 pairs of infrared picture data carry out algorithm process; Video interface converting unit 3 is mated for the digital port of selected video DAC chip, is converted to corresponding form; MJPEG coding unit 4 pairs of video flowings are encoded to MJPEG form; Message process unit 5 is packaged into the data flow of the Ethernet data form of standard for the video flowing after coding; CPU element 6 controls and status poll for machine system.

During specific works, as shown in Figure 3.

Detector exports as differential data signals, exports the data of each pixel one by one.

Frame unit in FPGA is converted to the RAW data that whole frame is unit, and is sent to graphics processing unit.

After graphics processing unit completes image algorithm process, export video interface converting unit to.

Video interface converting unit can be mated according to video DAC chip interface type.Such as video DAC chip selects CH7024, and support RGB port, then video interface converting unit is converted to RGB888 bus format and exports CH7024 to, and then CH7024 is converted to CVBS analog signal output, directly receives monitor or display shows.

The video stream rate computing formula that video port converting unit exports is " sum of all pixels * pixel bit wide * frame per second ", selected detector pixel bit wide 12bit, frame per second 30fps, then result of calculation is as follows:

RAW data rate=640*480*12*30=110,592,000bps

MJPEG compression coding ratio about 0.05, then the data rate after MJPEG coding is about 5Mbps.Data after coding pass out to message converting unit, send to ethernet PHY chip after being packaged into the Ethernet data of standard.In this example, PHY chip model is RTL8211, can be configured to the 100/100base-TX pattern of standard.

Inner at FPGA, use QUARTUS II and NIOS II Software tool to realize cpu function, thus realize the control to whole product, and by network interface realization to the configuration of product and status poll.RJ45 network interface can receive NVR(network video recorder) or server on, the operation such as encoding and decoding, storage is carried out to MJPEG video flowing, and configures or inquire about thermal imager operation state by NVR or server.

In the inner each functional unit of FPGA, MJPEG coding unit need take about 9K logical block, the soft nuclear unit of CPU need take 4K logical resource, image algorithm unit need take 20K logical resource, amount to about 40K logical resource, therefore select ALTERA company model to be the FPGA of 5CEFA5F23C7, its logical block amounts to 77K.

Hang two panels DDR3 memory chip under FPGA, a slice is that graphics processing unit is used as buffer memory, and a slice is used by the soft core of NIOS in addition.A slice FLASH is hung under FPGA, for storing CPU program, and the configuration data needed for image algorithm.

Above-mentioned example for a resolution be the non-brake method network-type thermal imager hardware plan of 640*480, its specification is not less than the industry universal product.Emphasis of the present invention sets forth a kind of hardware plan framework and FPGA interior business handling process mechanism, is applicable to various refrigeration, non-brake method thermal imager product that resolution reaches as high as 1280*720.Actual chips model cited herein only illustratively provides, and includes but not limited to same family chip or different vendor's similar chip.

Claims (1)

1. a low cost small size thermal infrared imager, is characterized in that comprising the infrared ray that infrared lens module sends for object under test and carries out imaging; Detector module realizes photoelectric converting function, is the digital signal of corresponding size ultrared intensity-conversion; FPGA module realizes the controlling functions of image procossing, coding, Message processing and whole product; Video DAC module realizes analog conversion function, RGB or YUV standardized digital signal is converted to CVBS or VGA analog signal output; It is 100/1000base-T network interface or wireless WiFi port that PHY module completes ethernet mac interface conversion, thus realizes video signal digital transmission and machine product Communication Control function; Power module is each module for power supply of whole product;

In wherein said FPGA module, adopt FPGA (Field Programmable Gate Array) to realize image and video data service process, comprise frame unit and receive the pixel data exported from detector, and be spliced into the data of complete piece image according to the parameter such as resolution, bit wide; Graphics processing unit carries out algorithm process to infrared picture data; Video interface converting unit is mated for the digital port of selected video DAC chip, is converted to corresponding form; MJPEG coding unit is encoded to MJPEG form to video flowing; Message process unit is packaged into the data flow of the Ethernet data form of standard for the video flowing after coding; ARM unit is used for machine system and controls and status poll.