CN107706174B - Electronic module with low warpage and preparation method of electronic module - Google Patents
Electronic module with low warpage and preparation method of electronic module Download PDFInfo
- Publication number
- CN107706174B CN107706174B CN201710882284.5A CN201710882284A CN107706174B CN 107706174 B CN107706174 B CN 107706174B CN 201710882284 A CN201710882284 A CN 201710882284A CN 107706174 B CN107706174 B CN 107706174B
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- solder paste
- silver colloid
- electronic module
- pcb substrate
- electronic
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- 238000002360 preparation method Methods 0.000 title abstract description 8
- 229910000679 solder Inorganic materials 0.000 claims abstract description 88
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims abstract description 78
- 229910052709 silver Inorganic materials 0.000 claims abstract description 78
- 239000004332 silver Substances 0.000 claims abstract description 78
- 239000000084 colloidal system Substances 0.000 claims abstract description 55
- 239000000758 substrate Substances 0.000 claims abstract description 33
- 239000011248 coating agent Substances 0.000 claims description 11
- 238000000576 coating method Methods 0.000 claims description 11
- 238000013461 design Methods 0.000 claims description 9
- 238000000034 method Methods 0.000 claims description 9
- 238000005520 cutting process Methods 0.000 claims description 4
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 4
- 238000004519 manufacturing process Methods 0.000 claims description 4
- 238000003466 welding Methods 0.000 claims description 3
- 238000012360 testing method Methods 0.000 abstract description 5
- 239000006227 byproduct Substances 0.000 abstract 1
- 239000000047 product Substances 0.000 abstract 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 11
- 239000000853 adhesive Substances 0.000 description 4
- 230000001070 adhesive effect Effects 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 230000008569 process Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 239000006071 cream Substances 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000002994 raw material Substances 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- 230000009471 action Effects 0.000 description 1
- 230000006978 adaptation Effects 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000012827 research and development Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Toxicology (AREA)
- Electromagnetism (AREA)
- Health & Medical Sciences (AREA)
- Manufacturing & Machinery (AREA)
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
The invention discloses an electronic module with low warpage and a preparation method thereof, wherein the electronic module with low warpage comprises: a PCB substrate; a plurality of electronic components mounted on the PCB substrate; the plastic package body is arranged on all or part of the surface of the electronic element; the silver colloid groove is positioned on the plastic package body to be filled with silver colloid; and the first solder paste part is coated on the PCB substrate and is correspondingly arranged below the silver colloid groove. The width of the first solder paste portion is larger than that of the silver colloid groove. The electronic module with the low warpage comprises at least two first solder paste portions, and the first solder paste portions are arranged at end point positions of the layout tracks of the plastic package body corresponding to the silver colloid grooves. At least one first solder paste part is arranged at the corner of the layout track on the plastic package body corresponding to the silver colloid groove. The warpage can be reduced, the product yield of the electronic module is reduced, and the time cost consumed by product testing is reduced.
Description
Technical Field
The present invention relates to the field of semiconductor technology, and more particularly, to an electronic module with low warpage and a method for manufacturing the same.
Background
In the semiconductor industry, system in package (SIP, system In a Package) mainly integrates various functional electronic components into one package, so as to achieve the purpose of functional integration. Electronic components required by the module are required to be attached to the PCB, and then the electronic module is prepared by plastic package curing.
The performance of the electronic products is stronger nowadays, and the space of each component is limited, so that the warping degree of the component is strictly required, and in actual production, the warping degree of the electronic module prepared by the system-in-package cannot meet the requirements of customers, so that the testing equipment is often required to be purchased to place to measure the warping degree of the electronic module, and products meeting the warping requirements of customers are screened. Both the time and cost of testing and the cost of scrapped materials due to excessive warpage of the product are significant, and thus, there is an urgent need to produce an electronic module with low warpage.
Disclosure of Invention
The invention aims to provide an electronic module with low warpage and a preparation method of the electronic module, which can reduce the warpage, improve the product yield of the prepared electronic module, reduce the time cost of product testing and reduce the scrapped raw material cost of the product due to overhigh warpage.
The technical scheme provided by the invention is as follows: an electronic module with low warpage, comprising:
A PCB substrate;
A plurality of electronic components mounted on the PCB substrate;
The plastic package body is arranged on all or part of the surface of the electronic element;
The silver colloid groove is positioned on the plastic package body to be filled with silver colloid; and
The first solder paste part is coated on the PCB substrate and is correspondingly arranged below the silver colloid groove.
The electronic module is generally very light, thin, short and small, so that the distribution density of electronic elements and circuits is too high, a lot of components are extruded in a narrow space, electromagnetic interference (EMI, electromagnetic Interference) is very easy to generate, and the conventional practice is to arrange a silver adhesive groove on a plastic package body to fill silver adhesive, and separate high-frequency components from other components to realize electromagnetic shielding. It has been found that the electronic module generates a large warpage at the periphery of the silver colloid groove, which is caused by a large thermal expansion coefficient of the silver colloid. According to the technical scheme, the thermal expansion coefficient of the first solder paste portion is far smaller than that of the silver paste, and the first solder paste portion is arranged below the silver paste groove, so that deformation of the silver paste can be effectively resisted, and warping degree of the electronic module is reduced. Meanwhile, in the process of preparing the electronic module, solder paste needs to be coated on the surface of the screen plate during design (STENCIL DESIGN), so that the structure cannot excessively influence the preparation process of the electronic module, the cost of a used threshold and a conversion process is reduced, and the structure has extremely high practical value.
Preferably, the electronic component further comprises a second solder paste portion, the electronic component is connected with the PCB substrate through the second solder paste portion, and the first solder paste portion, the electronic component and the second solder paste portion are arranged in a staggered mode. Short-circuiting can be avoided when the first solder paste portion overlaps the electronic component or the second solder paste portion.
Preferably, the width of the first solder paste portion is greater than the width of the silver colloid groove.
According to the technical scheme, the width of the first solder paste part is larger than that of the silver colloid groove, namely the silver colloid groove has a larger action area than that of the silver colloid, and deformation of the silver colloid can be effectively resisted.
Preferably, the electronic module with low warpage includes at least two first solder paste portions, and the first solder paste portions are disposed at end positions of the layout tracks of the plastic package body corresponding to the silver colloid grooves.
According to the technical scheme, as the research and development discovers that the warping of the electronic module generates the deformation of the silver colloid in the silver colloid groove, the deformation quantity generated at the two ends of the silver colloid groove is the largest, and the first solder paste part is directly arranged at the end point position of the silver colloid groove on the plastic package body, so that the deformation of the silver colloid can be resisted by less solder paste quantity, the material is saved, and the warping degree of the electronic module is effectively reduced.
Preferably, at least one first solder paste portion is disposed at a corner of the trace disposed on the plastic package body corresponding to the silver colloid groove.
According to the technical scheme, as the corners of the silver colloid groove layout tracks are the shape abrupt change parts, larger warping can be generated due to deformation of the silver colloid, and therefore the warping degree of the electronic module can be effectively reduced by arranging the first solder paste part.
The invention also discloses a preparation method of the electronic module, which is used for preparing the electronic module with low warpage and comprises the following steps:
S100, arranging the first solder paste part and the electronic element on the PCB substrate;
S200, carrying out plastic package on all or part of the electronic elements to form the plastic package body;
S300, cutting the plastic package body to form the silver colloid groove, and filling the silver colloid into the silver colloid groove to form the electronic module;
S400, forming an electromagnetic shielding layer on the surface of the electronic module through magnetron sputtering.
Preferably, the electronic module with low warpage further includes a second solder paste portion, and the step S100 includes:
S110, coating the second solder paste part on the PCB substrate to carry out surface mounting and welding;
s120, additionally coating a first solder paste part to a corresponding position on the PCB substrate according to design parameters of the silver colloid groove, so that the first solder paste part, the electronic element and the second solder paste part are staggered;
S130, the electronic element is arranged on the PCB substrate through the second solder paste part.
Specifically, in the step S100, the first solder paste portion and the second solder paste portion are coated on the PCB substrate by a coating machine.
The electronic module with low warpage and the preparation method of the electronic module provided by the invention can bring at least one of the following beneficial effects:
1. the first solder paste part is correspondingly arranged at the position where the warped silver paste is located, and the deformation quantity of the first solder paste part is far smaller than that of the silver paste because the thermal expansion rate of the first solder paste part is far lower than that of the silver paste, and the first solder paste part can resist the deformation of the silver paste, so that the aim of reducing the whole warping degree of the electronic module is fulfilled.
2. The product yield is improved.
3. Can be based on current equipment, directly use the coating machine lay the position coating tin cream at the tin cream can, based on original holder-paste technology realize can, it is less to original operation flow and equipment influence, the practicality is strong.
4. The time cost of product test is reduced, and the raw material cost of the product scrapped due to overhigh warping degree is reduced.
Drawings
The above characteristics, technical features, advantages and implementation manners of the electronic module with low warpage and the manufacturing method thereof will be further described with reference to the accompanying drawings in a clearly understood manner.
Fig. 1-a, 1-b and 1-c are schematic structural diagrams of a conventional electronic module.
Fig. 2-a, 2-b and 2-c are three structural schematic diagrams of an electronic module with low warpage.
Reference numerals illustrate: 100. PCB base plate, 200, electronic element, 300, silver glue groove, 400, first tin paste part, 410, a tin paste part, 420, b tin paste part, 430, c tin paste part, 440, d tin paste part, 450, e tin paste part, 460, f tin paste part, 470, g tin paste part, 480, h tin paste part, 500, plastic package body.
Detailed Description
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following description will explain the specific embodiments of the present invention with reference to the accompanying drawings. It is evident that the drawings in the following description are only examples of the invention, from which other drawings and other embodiments can be obtained by a person skilled in the art without inventive effort.
For simplicity of the drawing, only the parts relevant to the present invention are schematically shown in each drawing, and they do not represent the actual structure thereof as a product.
Fig. 1-a and 1-b show general structures of electronic modules in the prior art, fig. 1-b is a layout diagram on a surface of a PCB substrate, fig. 1-a is a cross-sectional view A-A in fig. 1-b, and in order to illustrate a relative positional relationship between a silver paste groove and an electronic component and a PCB substrate, fig. 1-b and other figures show projection lines of a silver paste groove 300 on a surface of a PCB substrate 100 in dotted lines. The electronic module is prepared by firstly attaching an electronic component 200 to a PCB substrate 100, then forming a plastic package body 500 by plastic package, and preparing a silver colloid groove 300 by laser or other cutting means, wherein referring to fig. 1-b, the silver colloid groove 300 is enclosed on the peripheral side of the high-frequency electronic component at the upper left corner, the track laid is two straight lines perpendicular to each other and transiting round angle, a rectangular area enveloping the high-frequency electronic component at the upper left corner is formed at the upper left corner, and the rectangular area is separated from other electronic components, thereby realizing electromagnetic shielding. And finally, forming an electromagnetic shielding layer on the surface of the electronic module by magnetron sputtering.
Because the electronic module is generally very light, thin, short and small, the distribution density of electronic elements and circuits is too high, and a lot of components are extruded in a narrow space, electromagnetic interference (EMI, electromagnetic Interference) is very easy to generate, so that a silver adhesive groove is arranged on the plastic package body to be filled with silver adhesive, and high-frequency components and other components are separated to realize electromagnetic shielding. The electronic module is found to generate great warpage at the periphery of the silver colloid groove, which is caused by the large thermal expansion coefficient of the silver colloid.
Based on the warpage mechanism, as shown in fig. 2-a and 2-b, a first solder paste portion 400 is added on the basis of the original electronic module structure shown in fig. 1-b, and the first solder paste portion 400 is coated on the PCB substrate 100 by a coating machine and correspondingly arranged below the silver paste groove 300 so as to resist deformation of the silver paste in the silver paste groove 300. In fig. 2-a, a first solder paste portion 400 is disposed on the PCB substrate 100 and is continuously distributed along the layout track of the silver paste trench 300, and preferably, the width of the extending track of the first solder paste portion 400 is greater than the width of the silver paste trench 300, so that a better bending resistance effect can be obtained. The first solder paste portion 400 may also be formed in a discontinuous manner, for example, in fig. 2-b, the first solder paste portion 400 includes a solder paste portion 410, b solder paste portion 420, and c solder paste portion 430, and is separated and discontinuous from each other. Specifically, the a solder paste portion 410 and the b solder paste portion 420 are disposed at the initial end positions of the layout trace of the silver paste trench 300, respectively, and the c solder paste portion 430 is disposed at the corner positions of the layout trace of the silver paste trench 300. Of course, the design features of fig. 2-a and fig. 2-b may be combined, and the PCB substrate 100 includes the first solder paste portions continuously distributed along the layout trace of the silver colloid trench 300, and solder pastes with widths greater than that of other portions are disposed at the inflection point and the start end point of the layout trace, so as to strengthen the limitation on deformation at the inflection point, and obtain a better anti-warping effect.
Since the original electronic module process needs to print the solder paste on the PCB so as to perform the bonding and soldering, that is, the electronic component needs to be connected with the PCB substrate through the second solder paste portion, but the newly added first solder paste portion in the embodiment is not for bonding and soldering, but is for resisting the deformation of the silver paste in the silver paste groove 300, the position, the size and the shape of the first solder paste portion in the embodiment are designed, only the corresponding design parameters are required to be added in the screen design (STENCIL DESIGN), the first solder paste portion with the warp resistance effect and the second solder paste portion with the connecting effect can be coated on the PCB substrate through the coater, so that the method has little influence on the original process, and good practicability is also achieved. In order to prevent short circuit, the first solder paste portion should avoid the second solder paste portion from being connected thereto to prevent short circuit, and similarly, the first solder paste portion should also avoid the electronic component.
For example, when the layout track of the silver colloid groove is changed and has more than one corner, as shown in fig. 1-c, the layout track of the silver colloid groove includes three corners, which are all positions with larger deformation, and when designing the first solder paste portion resisting deformation, on one hand, the first solder paste portion extending along the layout track of the silver colloid groove can be designed with reference to fig. 2-a, on the other hand, the silver colloid groove can be correspondingly arranged at the starting end point and the corner of the layout track of the silver colloid groove, and on the other hand, as shown in fig. 2-c, the surface of the PCB substrate includes a d solder paste portion 440, an e solder paste portion 450 and an f solder paste portion 460 corresponding to the corner of the layout track of the silver colloid groove 300, and a g solder paste portion 470 and an h solder paste portion 480 located at the end point of the layout track of the silver colloid groove 300.
The invention also discloses a preparation method of the electronic module with low warpage in the embodiment, which comprises the following steps:
And S100, coating a second solder paste part on the PCB substrate by using a coating machine to carry out surface mounting and welding, and simultaneously coating a first solder paste part to a corresponding position on the PCB substrate according to design parameters of the silver colloid groove, so that the first solder paste part is positioned below the silver colloid groove in the finally prepared electronic module, and the arrangement position of the first solder paste part is optimized or combined according to the embodiment. And after the electronic component is mounted, the staggered arrangement of the first solder paste part, the electronic component and the second solder paste part is met.
S200, plastic packaging is carried out on all or part of the electronic components to form a plastic package body;
s300, cutting a plastic package body to form a silver colloid groove, and filling silver colloid into the silver colloid groove to form an electronic module;
s400, forming an electromagnetic shielding layer on the surface of the electronic module by magnetron sputtering.
It should be noted that the above embodiments can be freely combined as needed. The foregoing is merely a preferred embodiment of the present invention and it should be noted that modifications and adaptations to those skilled in the art may be made without departing from the principles of the present invention, which are intended to be comprehended within the scope of the present invention.
Claims (5)
1. An electronic module having a low warpage, comprising:
A PCB substrate;
A plurality of electronic components mounted on the PCB substrate;
The plastic package body is arranged on all or part of the surface of the electronic element;
The silver colloid groove is positioned on the plastic package body to be filled with silver colloid; and
The first solder paste part is coated on the PCB substrate and is correspondingly arranged below the silver colloid groove;
the second solder paste part is used for connecting the electronic element with the PCB substrate, and the first solder paste part, the electronic element and the second solder paste part are arranged in a staggered manner;
The first solder paste portions are continuously distributed along the layout track of the silver colloid groove, and the arrangement width of the first solder paste portions at the end point positions and the corners of the layout track is larger than that of other parts.
2. The electronic module with low warpage as claimed in claim 1, wherein: the width of the first solder paste portion is larger than that of the silver colloid groove.
3. A method for manufacturing an electronic module according to claim 1 or 2, comprising the steps of:
S100, arranging the first solder paste part and the electronic element on the PCB substrate;
S200, carrying out plastic package on all or part of the electronic elements to form the plastic package body;
S300, cutting the plastic package body to form the silver colloid groove, and filling the silver colloid into the silver colloid groove to form the electronic module;
S400, forming an electromagnetic shielding layer on the surface of the electronic module through magnetron sputtering.
4. The method of claim 3, wherein the electronic module with low warpage further comprises a second solder paste portion, and the step S100 comprises:
S110, coating the second solder paste part on the PCB substrate to carry out surface mounting and welding;
S120, coating a first solder paste part to a corresponding position on a PCB substrate according to design parameters of the silver colloid groove, and enabling the first solder paste part, the electronic element and the second solder paste part to be staggered;
and S130, attaching the electronic element on the PCB substrate through the second solder paste part.
5. The method according to claim 4, wherein in the step S100, the first solder paste portion and the second solder paste portion are coated on the PCB substrate by a coater.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710882284.5A CN107706174B (en) | 2017-09-26 | 2017-09-26 | Electronic module with low warpage and preparation method of electronic module |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710882284.5A CN107706174B (en) | 2017-09-26 | 2017-09-26 | Electronic module with low warpage and preparation method of electronic module |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107706174A CN107706174A (en) | 2018-02-16 |
| CN107706174B true CN107706174B (en) | 2024-05-10 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710882284.5A Active CN107706174B (en) | 2017-09-26 | 2017-09-26 | Electronic module with low warpage and preparation method of electronic module |
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| Country | Link |
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| CN (1) | CN107706174B (en) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102005037040A1 (en) * | 2005-08-05 | 2007-02-08 | Epcos Ag | Electrical component |
| CN203812906U (en) * | 2014-03-12 | 2014-09-03 | 上海亚浦耳照明电器有限公司 | LED chip packaging body |
| CN104684258A (en) * | 2013-11-29 | 2015-06-03 | 三星电机株式会社 | Strip level substrate including warpage preventing member and method of manufacturing the same |
| CN105904099A (en) * | 2016-05-09 | 2016-08-31 | 环维电子(上海)有限公司 | SIP module manufacturing method and elargol groove cutting method and system |
| CN207183263U (en) * | 2017-09-26 | 2018-04-03 | 环维电子(上海)有限公司 | A kind of electronics module with low warpage |
-
2017
- 2017-09-26 CN CN201710882284.5A patent/CN107706174B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102005037040A1 (en) * | 2005-08-05 | 2007-02-08 | Epcos Ag | Electrical component |
| CN104684258A (en) * | 2013-11-29 | 2015-06-03 | 三星电机株式会社 | Strip level substrate including warpage preventing member and method of manufacturing the same |
| CN203812906U (en) * | 2014-03-12 | 2014-09-03 | 上海亚浦耳照明电器有限公司 | LED chip packaging body |
| CN105904099A (en) * | 2016-05-09 | 2016-08-31 | 环维电子(上海)有限公司 | SIP module manufacturing method and elargol groove cutting method and system |
| CN207183263U (en) * | 2017-09-26 | 2018-04-03 | 环维电子(上海)有限公司 | A kind of electronics module with low warpage |
Also Published As
| Publication number | Publication date |
|---|---|
| CN107706174A (en) | 2018-02-16 |
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