CN107706120A - The method for packing of ultra-thin wafers - Google Patents

The method for packing of ultra-thin wafers Download PDF

Info

Publication number
CN107706120A
CN107706120A CN201710895810.1A CN201710895810A CN107706120A CN 107706120 A CN107706120 A CN 107706120A CN 201710895810 A CN201710895810 A CN 201710895810A CN 107706120 A CN107706120 A CN 107706120A
Authority
CN
China
Prior art keywords
ultra
thin wafers
cutter
cut
counterdie
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201710895810.1A
Other languages
Chinese (zh)
Other versions
CN107706120B (en
Inventor
詹苏庚
王红
吴迪
刘天德
张鹏阳
唐叶新
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SHENZHEN SAIYIFA MICROELECTRONICS CO Ltd
Shenzhen STS Microelectronics Co Ltd
Original Assignee
SHENZHEN SAIYIFA MICROELECTRONICS CO Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SHENZHEN SAIYIFA MICROELECTRONICS CO Ltd filed Critical SHENZHEN SAIYIFA MICROELECTRONICS CO Ltd
Priority to CN201710895810.1A priority Critical patent/CN107706120B/en
Publication of CN107706120A publication Critical patent/CN107706120A/en
Application granted granted Critical
Publication of CN107706120B publication Critical patent/CN107706120B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings

Abstract

The invention provides a kind of method for packing of ultra-thin wafers, the ultra-thin wafers are formed in one structure, including:Ultra-thin wafers body is more than the thickness of the ultra-thin wafers body with the ultra-thin wafers body week extrorse outer shroud, the thickness of the outer shroud is arranged at;The front of outer shroud is positive concordant with ultra-thin wafers body;The back side of outer shroud protrudes from the back side of ultra-thin wafers body;The method for packing of the ultra-thin wafers includes:Step of membrane sticking:Counterdie is pasted at the back side of the ultra-thin wafers, ultra-thin wafers body and outer shroud is bonded with counterdie;Cutting step:Outer shroud is cut off, is cut from the front of ultra-thin wafers body, to cut out several chips;Paster encapsulation step:The chip for cutting formation is separated from counterdie, and moves on lead frame and is packaged.

Description

The method for packing of ultra-thin wafers
Technical field
The present invention relates to field of semiconductor package, more particularly to a kind of method for packing of ultra-thin wafers.
Background technology
At present, ultra-thin wafers are increasingly widely applied, variable because its thickness is between 50 microns~100 microns Shape, it is very big according to conventional package technique progress pad pasting, cutting and paster encapsulation difficulty, can be to ultra-thin in each process Wafer causes different degrees of damage.
The content of the invention
In order to solve the above-mentioned technical problem, it is existing to solve the invention reside in a kind of method for packing of ultra-thin wafers of offer It is different degrees of so as to occur causing the ultra-thin wafers because being difficult to using conventional packaging method to ultra-thin wafers in technology The problems such as damage.
For above-mentioned technical problem, the present invention proposes a kind of method for packing of ultra-thin wafers, and the ultra-thin wafers are integrated Molding structure, including:Ultra-thin wafers body and it is arranged at ultra-thin wafers body week extrorse outer shroud, the thickness of the outer shroud Thickness of the degree more than the ultra-thin wafers body;The front of outer shroud is positive concordant with ultra-thin wafers body;The back side of outer shroud is convex For the back side of ultra-thin wafers body;The method for packing of the ultra-thin wafers includes:Step of membrane sticking:At the back side of the ultra-thin wafers Counterdie is pasted, ultra-thin wafers body and outer shroud is bonded with counterdie;Cutting step:Outer shroud is cut off, from ultra-thin wafers body just Face is cut, to cut out several chips;Paster encapsulation step:The chip for cutting formation is separated from counterdie, and moved It is packaged on to lead frame.
In a preferred approach, in the step of membrane sticking, ultra-thin wafers are placed in vacuum laminator, while preheating temperature To 60 DEG C, and counterdie is affixed on under the atmospheric pressure conditions less than 50 millibars (mbar) back side of ultra-thin wafers, makes ultra-thin crystalline substance Circle body and outer shroud are bonded with counterdie.
In a preferred approach, the counterdie is UV films.
In a preferred approach, in the step of excision outer shroud, using cutter along the ultra-thin wafers body and outer shroud The position of connection carries out drawing round type cutting;Wherein, the particles of silicon carbide degree of the cutter is 8.0 microns ± 0.6 micron, the cutter Rotating speed is 30,000 revs/min, and cutter is cut using move angle each second as 5 ° of speed.
In a preferred approach, in the cutting step, successively using the first cutter and the second cutter to ultra-thin wafers sheet Body is cut:Cut into first with the first cutter perpendicular to the direction of ultra-thin wafers body, and ultra-thin wafers body is cut Enter a desired depth;Then the second cutter is also perpendicular to ultra-thin wafers body, and the feeding side of the second cutter and the first cutter To identical and continue to cut on the cut channel of the first cutter, until cutting off the ultra-thin wafers body and stopping in counterdie;Wherein, The thickness of first cutter be more than the second cutter thickness so that the first cutter kerf width be more than the second cutter cut channel width, The rotating speed of first cutter is 40,000 revs/min~50,000 revs/min (KRPM), the rotating speed of the second cutter for 18,000 revs/min~ 25000 revs/min (KRPM).
In a preferred approach, the thickness of first cutter is 25 microns~30 microns, and the thickness of second cutter is 10 microns~15 microns;First cutter and the second cutter are made by diamond dust, the diamond dust contained by first cutter Granularity is 3.0 microns ± 0.4 micron, and the particles of silicon carbide degree contained by second cutter is 2.0 microns ± 0.4 micron.
In a preferred approach, also include in the cutting step:The depth that first cutter is cut into is ultra-thin wafers body The 25% of gross thickness, the depth that the second cutter cuts into counterdie are the 30% of counterdie gross thickness.
In a preferred approach, in the paster step, using the thimble of square matrix distribution from ultra-thin wafers body The back side jacks up chip across counterdie, while is picked up chip from the front of ultra-thin wafers using suction nozzle, so that chip is the bottom of from Separated in film.
In a preferred approach, the center at the center of square matrix distribution thimble, the center of chip and suction nozzle is at one On straight line.
In a preferred approach, the suction nozzle includes an absorption end, and the size of its end face is less than the size of chip, the absorption end End face centre position be provided with the recess of right-angled intersection, the center of the recess is vacuum sucking holes, and the absorption end of suction nozzle is towards ultra-thin Wafer body front simultaneously makes the recess form vacuum chamber so as to which chip be picked up.
Compared with prior art, the invention has the advantages that:The method for packing of ultra-thin wafers of the present invention, is applied to Ultra-thin wafers with outer shroud, because outer ring thickness is more than the thickness of ultra-thin wafers body, thin wafer body can be supported in outer shroud, It is readily transported and the processing of pad pasting.In particular, in the back side elder generation pad pasting of ultra-thin wafers, then outer shroud cut off, avoids ultra-thin wafers The problems such as yielding and difficult processing that body is brought because thickness is small, it is ensured that the processing efficiency of chip, improve yield rate.
Brief description of the drawings
Fig. 1 is the structural representation of the present embodiment ultra-thin wafers.
Fig. 2 is the cross-sectional view of the present embodiment ultra-thin wafers.
Fig. 3 is the step flow chart of the method for packing of the present embodiment ultra-thin wafers.
Fig. 4 is the detailed step flow chart of the method for packing of the present embodiment ultra-thin wafers.
Fig. 5 is the structural representation of the present embodiment thimble seat.
Fig. 6 is the present embodiment thimble in the distributed architecture schematic diagram of thimble seat.
Fig. 7 is the structural representation of the present embodiment suction nozzle end.
Fig. 8 is the structural representation of the present embodiment suction nozzle section.
Description of reference numerals is as follows:2nd, ultra-thin wafers;21st, ultra-thin wafers body;22nd, outer shroud;3rd, thimble seat;31st, thimble; 32nd, perforate;4th, suction nozzle;41st, end is adsorbed;411st, recess;412nd, vacuum sucking holes.
Embodiment
Embodying the exemplary embodiment of feature of present invention and advantage will describe in detail in the following description.It should be understood that The present invention can have various changes in different embodiments, and it is neither departed from the scope of the present invention, and theory therein Bright and diagram is treated as purposes of discussion in itself, and is not used to the limitation present invention.
Refering to Fig. 1 to Fig. 2, the method for packing for the ultra-thin wafers that the present embodiment provides, its be applied to thickness 50 microns~ 100 microns of wafer.The ultra-thin wafers 2 of the thickness range include:Ultra-thin wafers body 21 and with its integrally formed outer shroud 22, The outer shroud 22 is arranged at the circumferential outer rim of ultra-thin wafers body 21, and the thickness of outer shroud 22 is more than ultra-thin wafers body 21 with will be ultra-thin Wafer body 21 is supported in outer shroud 22.The ultra-thin wafers 2 have front and back, wherein, the front of ultra-thin wafers 2 is plane So that the outer shroud 22 in the face and the flush of ultra-thin wafers body 21;The back side of ultra-thin wafers 2 is that surrounding is high, middle low knot Structure, so that outer shroud 22 protrudes from the surface of ultra-thin wafers body 21 in the face, so as to which outer shroud 22 and ultra-thin wafers body 21 connect Position formed ledge structure.
With continued reference to Fig. 3 and Fig. 4, the method for packing of the present embodiment ultra-thin wafers includes successively:Step of membrane sticking, cutting step With paster encapsulation step.
Step of membrane sticking S1 includes:Counterdie is pasted at the back side of ultra-thin wafers 2, makes ultra-thin wafers body 21 and outer shroud 22 and bottom Film is bonded.
In this step, ultra-thin wafers 2 and UV films are placed in the workbench of vacuum laminator using UV films by counterdie It is bonded.Due to the back side of ultra-thin wafers 2, the surface height of its outer shroud 22 and ultra-thin wafers body 21 differs, and makes both it Junction has ledge structure, and the position easily causes compression ring during being bonded.In the present embodiment, first preheating temperature To 60 DEG C, and UV films are affixed on under the atmospheric pressure conditions less than 50 millibars (mbar) back side of ultra-thin wafers 2, and made ultra-thin Wafer body 21 and outer shroud 22 are bonded with UV films, under this condition, can ensure that the width of compression ring is less than 600 microns, the width The outer rim of ultra-thin wafers body 21 is preferably sticked together with UV films when the compression ring of degree scope ensures to cut off outer shroud 22, so that Reduced in subsequent cutting step the degree of chipping, prevent the outward flange of ultra-thin wafers body 21 because be bonded with UV films it is poor cause Infiltration and the problem of siliconising powder, meanwhile, reduce ultra-thin wafers body 21 and be cut into after chip from the difficulty of UV UF membranes.
Cutting step S2 includes:Outer shroud 22 is cut off, is cut from the front of ultra-thin wafers body 21, it is some to cut out Individual chip.
Specifically, this step includes two sub-steps of front and rear progress:1) step S21, outer shroud 22, and 2) step are cut off Rapid S22, cuts out chip.
In the step s 21, the cutting ring of cutting for setting particles of silicon carbide degree to be 8.0 microns ± 0.6 micron on cutter device has, And calibrated in the front of ultra-thin wafers 2 on the basis of the center of circle of ultra-thin wafers 2 to cutting cutting ring tool, to reduce in subsequent step In cut inclined problem.Afterwards, cut using cutting cutting ring tool and carry out drawing a round type along the position that ultra-thin wafers body 21 and outer shroud 22 connect Cut;Wherein, during ring is cut, the rotating speed for cutting cutting ring tool is 30,000 revs/min, cuts cutting ring tool using move angle each second as 5 ° Speed cut, ensure to cut the breakage of cutting ring tool under this condition in cutting process, while prevent ultra-thin wafers body The rupture at 21 edges.
Diced chip in step S22 is carried out using the knife of double-pole two cut-out cutting method.In the first main shaft of cutter device With the first cutter and the second cutter are installed respectively on the second main shaft, the first main shaft and the second main shaft are separated by certain spacing so that With the feeding of feed arrangement, the first cutter and the second cutter are cut with time order and function to same cut channel position in the same direction Cut.
Specifically, ultra-thin wafers body 21 is cut using the first cutter and the second cutter successively for same position Cut:First, ultra-thin wafers body 21 is cut into using rotating speed for first cutter of 40,000 revs/min~50,000 revs/min (KRPM) One desired depth, wherein, the first cutter is cut into perpendicular to ultra-thin wafers body 21 along Cutting Road;Then, the second cutter is same Sample is perpendicular to ultra-thin wafers body 21, and the second cutter is identical with the direction of feed of the first cutter and on the cut channel of the first cutter Continue to cut into, the second cutter is cut into the 18000 revs/min~rotating speed of 25,000 revs/min (KRPM), until cutting off the ultra-thin crystalline substance Circle body 21 is simultaneously stopped in counterdie.Wherein, the first cutter and the second cutter are made by diamond dust, the gold contained by the first cutter Emery granularity is 3.0 microns ± 0.4 micron, and the particles of silicon carbide degree contained by the second cutter is 2.0 microns ± 0.4 micron.Enter One step, the thickness of the first cutter is 25 microns~30 microns, and the thickness of the second cutter is 10 microns~15 microns, so that first The thickness of cutter is more than the thickness of the second cutter so that the kerf width of the first cutter is more than the width of the second cutter cut channel.
It should be noted that when the first cutter and the second cutter are cut to the same position of ultra-thin wafers body 21, the The tool marks of two cutters are located at the centre of the first cutter tool marks width, the i.e. axis of the first cutter tool marks and the second cutter tool marks Axis it is overlapping.
More preferably, in step s 2, on ultra-thin wafers body 21 before diced chip, also using high-precision control System first measures the thickness of ultra-thin wafers body 21 and counterdie, so that the depth that the first cutter is cut into is total for ultra-thin wafers body 21 The 25% of thickness, the depth that the second cutter cuts into counterdie are the 30% of counterdie gross thickness.
Paster encapsulation step S3 includes:The chip for cutting formation is separated from counterdie, and moves on lead frame and carries out Encapsulation.
With continued reference to Fig. 5 to Fig. 8, during chip separates from counterdie, the thimble 31 of square matrix distribution is utilized Chip is jacked up across counterdie from the back side of ultra-thin wafers body 21, while utilizes suction nozzle 4 from the front of ultra-thin wafers body 21 Chip is picked up, so that chip separates from counterdie.
Specifically, the thimble 31 of square matrix distribution is arranged on square thimble seat 3, the tip of every thimble 31 it is straight Footpath is 0.3 millimeter.The thimble seat 3 is located at the side at the back side of ultra-thin wafers body 21, and thimble seat 3 is carried on the back towards ultra-thin wafers body 21 The end face in face is provided with multiple perforation 32, and thimble 31 is protruding with towards ultra-thin crystalline substance from the inside of thimble seat 3 along the perforation 32 Circle body 21 back side jacks up chip.It should be noted that multiple perforation 32 are distributed as square matrix distribution on thimble seat 3, And in actual use, the quantity of thimble 31 stretched out is adjusted according to the size of chip and thickness, and the multiple thimbles stretched out are also Square matrix is distributed.
Suction nozzle 4 is located at 21 positive side of ultra-thin wafers body, and the suction nozzle 4 includes absorption end 41, the end face of absorption end 41 Size be less than chip size, wherein, absorption the end face centre position of end 41 be provided with right-angled intersection recess 411, the recess 411 Center there are vacuum sucking holes 412, the absorption end 41 of suction nozzle 4 towards the front of ultra-thin wafers body 21 and forms recess 411 For vacuum chamber so as to which chip be picked up, the vacuum chamber of right-angled intersection make it that dynamics evenly, is reduced to chip when suction nozzle 4 adsorbs chip Damage.
It should be noted that size and the size at absorption end 41 that the multiple thimbles 31 for acting on chip are distributed are respectively less than core The size of piece;Meanwhile the center at the center of square matrix distribution thimble, the center of chip and suction nozzle 4 is point-blank, And act on chip multiple thimbles 31 be distributed one group of relative outward flange, adsorb end 41 one group of relative outward flange with Two sides of chip along its length are parallel.Needing to particularly point out is, the center of the square matrix distribution thimble is to act on core The center that multiple thimbles of piece are distributed.
More preferably, adsorb end 41 perpendicular to Chip-wide direction an edge lengths compared with Chip-wide small 5mil~ 10mil.When chip separates from counterdie, thimble 31 and suction nozzle 4 act on chip simultaneously.
Using the thimble of the more traditional circular distribution of square matrix distribution thimble 31 in this step S3, the arrangement of thimble 31 is more Add uniform close, being jacked up chip makes to be more uniformly stressed, and avoids the rupture of chip.More preferably, the present embodiment suction nozzle 4 Absorption end 41 be made of soft material, it is smaller compared to conventional suction nozzle hardness, to chip when reducing suction nozzle 3 because of contact chip Damage.
In step s3, chip first carries out bonding wire after moving on lead frame, with by bonding wire by chip and lead frame Pin welding on frame.And then by plastic packaging, solidification, deburring, rib cutting separation, pin plating, test mark and pack out Goods, to complete ultra-thin wafers encapsulation, see Fig. 4.The concrete operations of bonding wire, plastic packaging and each operation afterwards refer to prior art, The present invention is no longer specific to be introduced.
The method for packing of ultra-thin wafers of the present invention, suitable for the ultra-thin wafers with outer shroud, because outer ring thickness is more than ultra-thin crystalline substance The thickness of circle body, thin wafer body can be supported in outer shroud, be readily transported and the processing of pad pasting.In particular, in ultra-thin crystalline substance Round back side elder generation pad pasting, then outer shroud is cut off, avoid yielding and difficult processing that ultra-thin wafers body brings because thickness is small etc. Problem, it is ensured that the processing efficiency of chip, improve yield rate.
Although describing the present invention with reference to above exemplary embodiment, it is to be understood that, term used be explanation and Exemplary and nonrestrictive term.Due to the present invention can be embodied in a variety of forms without departing from invention spirit or Essence, it should therefore be appreciated that above-mentioned embodiment is not limited to any foregoing details, and should be limited in appended claims Widely explained in spirit and scope, thus the whole changes fallen into claim or its equivalent scope and remodeling all should be with Attached claim is covered.

Claims (10)

  1. A kind of 1. method for packing of ultra-thin wafers, it is characterised in that the ultra-thin wafers are formed in one structure, including:It is ultra-thin Wafer body is more than the ultra-thin wafers with the ultra-thin wafers body week extrorse outer shroud, the thickness of the outer shroud is arranged at The thickness of body;The front of outer shroud is positive concordant with ultra-thin wafers body;The back side of outer shroud protrudes from ultra-thin wafers body The back side;
    The method for packing of the ultra-thin wafers includes:
    Step of membrane sticking:Counterdie is pasted at the back side of the ultra-thin wafers, ultra-thin wafers body and outer shroud is bonded with counterdie;
    Cutting step:Outer shroud is cut off, is cut from the front of ultra-thin wafers body, to cut out several chips;
    Paster encapsulation step:The chip for cutting formation is separated from counterdie, and moves on lead frame and is packaged.
  2. 2. the method for packing of ultra-thin wafers as claimed in claim 1, it is characterised in that, will be ultra-thin in the step of membrane sticking Wafer is placed in vacuum laminator, while preheating temperature is to 60 DEG C, and under the atmospheric pressure conditions less than 50 millibars (mbar) Counterdie is affixed on to the back side of ultra-thin wafers, ultra-thin wafers body and outer shroud is bonded with counterdie.
  3. 3. the method for packing of ultra-thin wafers as claimed in claim 2, it is characterised in that the counterdie is UV films.
  4. 4. the method for packing of ultra-thin wafers as claimed in claim 1, it is characterised in that in the step of excision outer shroud, Using cutter a stroke round type cutting is carried out along the position that the ultra-thin wafers body connects with outer shroud;
    Wherein, the particles of silicon carbide degree of the cutter is 8.0 microns ± 0.6 micron, and the rotating speed of the cutter is 30,000 revs/min, knife Tool is cut using move angle each second as 5 ° of speed.
  5. 5. the method for packing of ultra-thin wafers as claimed in claim 1, it is characterised in that sharp successively in the cutting step Ultra-thin wafers body is cut with the first cutter and the second cutter:First with the first cutter perpendicular to ultra-thin wafers body Direction is cut into, and cuts into a desired depth to ultra-thin wafers body;Then the second cutter is also perpendicular to ultra-thin wafers sheet Body, and the second cutter is identical with the direction of feed of the first cutter and continues to cut on the cut channel of the first cutter, until cut-out should Ultra-thin wafers body is simultaneously stopped in counterdie;Wherein,
    The thickness of first cutter is more than the thickness of the second cutter so that the kerf width of the first cutter is more than the second cutter cut channel Width, the rotating speed of the first cutter is 40,000 revs/min~50,000 revs/min (KRPM), and the rotating speed of the second cutter is 18,000 revs/min Clock~25,000 rev/min (KRPM).
  6. 6. the method for packing of ultra-thin wafers as claimed in claim 5, it is characterised in that the thickness of first cutter is 25 micro- Rice~30 microns, the thickness of second cutter is 10 microns~15 microns;
    First cutter and the second cutter are made by diamond dust, and the particles of silicon carbide degree contained by first cutter is 3.0 ± 0.4 micron of micron, the particles of silicon carbide degree contained by second cutter are 2.0 microns ± 0.4 micron.
  7. 7. the method for packing of ultra-thin wafers as claimed in claim 5, it is characterised in that also include in the cutting step: The depth that first cutter is cut into is the 25% of ultra-thin wafers body gross thickness, and the depth that the second cutter cuts into counterdie is counterdie total thickness The 30% of degree.
  8. 8. the method for packing of ultra-thin wafers as claimed in claim 1, it is characterised in that in the paster step, utilize side The thimble of shape matrix distribution jacks up chip across counterdie from the back side of ultra-thin wafers body, while utilizes suction nozzle from ultra-thin wafers Front chip is picked up so that chip separates from counterdie.
  9. 9. the method for packing of ultra-thin wafers as claimed in claim 8, it is characterised in that the center of square matrix distribution thimble, The center of chip and the center of suction nozzle are point-blank.
  10. 10. the method for packing of ultra-thin wafers as claimed in claim 8, it is characterised in that the suction nozzle includes an absorption end, its The size of end face is less than the size of chip, and the end face centre position at the absorption end is provided with the recess of right-angled intersection, in the recess The heart is vacuum sucking holes, and the absorption end of suction nozzle towards ultra-thin wafers body front and makes the recess form vacuum chamber so as to which chip be inhaled Rise.
CN201710895810.1A 2017-09-28 2017-09-28 The packaging method of ultra-thin wafers Active CN107706120B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201710895810.1A CN107706120B (en) 2017-09-28 2017-09-28 The packaging method of ultra-thin wafers

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201710895810.1A CN107706120B (en) 2017-09-28 2017-09-28 The packaging method of ultra-thin wafers

Publications (2)

Publication Number Publication Date
CN107706120A true CN107706120A (en) 2018-02-16
CN107706120B CN107706120B (en) 2019-10-22

Family

ID=61175132

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201710895810.1A Active CN107706120B (en) 2017-09-28 2017-09-28 The packaging method of ultra-thin wafers

Country Status (1)

Country Link
CN (1) CN107706120B (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109103141A (en) * 2018-07-14 2018-12-28 全讯射频科技(无锡)有限公司 A kind of the cutting protection technique and protection structure of surface-sensitive wafer
CN111017626A (en) * 2019-12-23 2020-04-17 青岛歌尔微电子研究院有限公司 Film sticking device and film sticking method
CN111070448A (en) * 2019-12-30 2020-04-28 成都先进功率半导体股份有限公司 Wafer ring cutting method
CN111799186A (en) * 2020-07-15 2020-10-20 芯盟科技有限公司 Method for bonding chip to wafer and wafer with chip
CN112975148A (en) * 2021-02-07 2021-06-18 苏州镭明激光科技有限公司 Wafer laser invisible cutting equipment and cutting method

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103515250A (en) * 2013-09-10 2014-01-15 天水华天科技股份有限公司 Production method of 75-micron ultrathin chips
CN103515316A (en) * 2013-09-10 2014-01-15 天水华天科技股份有限公司 Production method of 50-micron ultrathin chips
CN104124176A (en) * 2013-04-24 2014-10-29 万国半导体股份有限公司 Method for preparation of semiconductor device used in flip installing process
CN105428220A (en) * 2015-12-22 2016-03-23 上海华虹宏力半导体制造有限公司 Annular cutting process method of Taiko thinning process
CN106800272A (en) * 2017-02-17 2017-06-06 烟台睿创微纳技术股份有限公司 A kind of MEMS wafer cutting and wafer scale release and method of testing

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104124176A (en) * 2013-04-24 2014-10-29 万国半导体股份有限公司 Method for preparation of semiconductor device used in flip installing process
CN103515250A (en) * 2013-09-10 2014-01-15 天水华天科技股份有限公司 Production method of 75-micron ultrathin chips
CN103515316A (en) * 2013-09-10 2014-01-15 天水华天科技股份有限公司 Production method of 50-micron ultrathin chips
CN105428220A (en) * 2015-12-22 2016-03-23 上海华虹宏力半导体制造有限公司 Annular cutting process method of Taiko thinning process
CN106800272A (en) * 2017-02-17 2017-06-06 烟台睿创微纳技术股份有限公司 A kind of MEMS wafer cutting and wafer scale release and method of testing

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109103141A (en) * 2018-07-14 2018-12-28 全讯射频科技(无锡)有限公司 A kind of the cutting protection technique and protection structure of surface-sensitive wafer
CN111017626A (en) * 2019-12-23 2020-04-17 青岛歌尔微电子研究院有限公司 Film sticking device and film sticking method
CN111017626B (en) * 2019-12-23 2021-09-03 青岛歌尔微电子研究院有限公司 Film sticking device and film sticking method
CN111070448A (en) * 2019-12-30 2020-04-28 成都先进功率半导体股份有限公司 Wafer ring cutting method
CN111799186A (en) * 2020-07-15 2020-10-20 芯盟科技有限公司 Method for bonding chip to wafer and wafer with chip
CN112975148A (en) * 2021-02-07 2021-06-18 苏州镭明激光科技有限公司 Wafer laser invisible cutting equipment and cutting method

Also Published As

Publication number Publication date
CN107706120B (en) 2019-10-22

Similar Documents

Publication Publication Date Title
CN107706120A (en) The method for packing of ultra-thin wafers
CN101026126B (en) Method for producing semiconductor chip
JP4818187B2 (en) Manufacturing method of semiconductor device
JP2009010178A (en) Method of processing wafer
CN102623402A (en) Manufacturing method for semiconductor integrated device
US20140238207A1 (en) Adhesive tape cutting method and adhesive tape cutting apparatus
CN103681490A (en) Processing method
JP6071702B2 (en) Wafer processing method
KR101966997B1 (en) Machining method
JP2008258412A (en) Method for singulating silicon wafer
CN111299866B (en) Laser full cutting method for wafer
CN110600372B (en) Three-side cutting method for wafer
CN111564367B (en) Method for processing wafer cracking abnormity before wafer grinding
JP2011181951A (en) Method of manufacturing semiconductor device
CN203774284U (en) Dicing saw for semiconductor packaging
CN111070448A (en) Wafer ring cutting method
CN113172780B (en) Scribing structure for silicon carbide cutting and online trimming method thereof
CN112967999B (en) Preparation method for semiconductor chip film expansion
JP6464818B2 (en) Dicing machine and table for dicing machine
JP2005260154A (en) Method of manufacturing chip
CN109849201A (en) A kind of wafer splitting device and its method
CN113539956A (en) Wafer processing method
JP2013219245A (en) Method for manufacturing semiconductor device
CN112287543A (en) Gallium nitride wafer production process parameter design method
CN206322685U (en) A kind of paster frock in GaAs base LED chips reduction process

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant