CN107623009A - 阵列基板的制备方法、阵列基板和显示装置 - Google Patents

阵列基板的制备方法、阵列基板和显示装置 Download PDF

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CN107623009A
CN107623009A CN201710908171.8A CN201710908171A CN107623009A CN 107623009 A CN107623009 A CN 107623009A CN 201710908171 A CN201710908171 A CN 201710908171A CN 107623009 A CN107623009 A CN 107623009A
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array base
base palte
viewing area
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王守坤
郭会斌
韩皓
付方彬
宋勇志
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BOE Technology Group Co Ltd
Beijing BOE Display Technology Co Ltd
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BOE Technology Group Co Ltd
Beijing BOE Display Technology Co Ltd
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Priority to US16/028,017 priority patent/US11189641B2/en
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Abstract

本发明属于显示技术领域，具体涉及一种阵列基板的制备方法、阵列基板和显示装置。该阵列基板包括显示区和位于所述显示区周边的非显示区，所述显示区包括多个像素区，所述显示区和所述非显示区均开设有过孔，其中，所述像素区在朝向显示侧的一侧设置有反射层，所述反射层用于反射所述阵列基板的外部光源以形成显示图像；以及，所述显示区和所述非显示区的过孔的区域还至少设置有抗劣化层，所述抗劣化层与所述反射层接触、且相对所述反射层更远离外部光源。该阵列基板及其相应的制备方法，在不增加现掩膜工艺的情况下，通过采用新的材料提高外部光源利用率，还实现了显示区、特别是非显示区的过孔搭接，防止过孔劣化和接触电阻不良，提高产品良率。

Description

阵列基板的制备方法、阵列基板和显示装置
技术领域
本发明属于显示技术领域，具体涉及一种阵列基板的制备方法、阵列基板和显示装置。
背景技术
目前常用的平板显示装置包括LCD(Liquid Crystal Display：液晶显示装置)和OLED(Organic Light-Emitting Diode:有机发光二极管)显示装置。对于液晶显示面板而言，由于液晶本身并不发光，因此需要额外的光源来实现显示。目前的显示面板，大多通过背光源来提供光源来实现显示，这无疑增加了显示产品的体积和能耗。
另外，液晶显示面板通常采用薄膜晶体管(Thin Film Transistor，简称TFT)进行出光控制，薄膜晶体管的漏极与像素电极等连接时一般需要开设过孔；非显示区也需要开设过孔，以连接外部驱动端子。目前的像素电极一般采用透明的铟锡氧化物(Indium tinoxide，简称ITO)材料形成，ITO材料也同时填充到非显示区的过孔中。ITO材料在高温高湿的环境下，容易发生电化学腐蚀，产生劣化和接触电阻大的情况，从而导致过孔信号传输异常，降低了显示品质。
因此，设计一种无需背光源、且显示品质高的显示面板，成为目前亟待解决的技术问题。
发明内容
本发明所要解决的技术问题是针对现有技术中上述不足，提供一种阵列基板的制备方法、阵列基板和显示装置，能实现对外部光源的完全反射显示，而且还能保证过孔品质，提高显示品质。
解决本发明技术问题所采用的技术方案是该阵列基板，包括显示区和位于所述显示区周边的非显示区，所述显示区包括多个像素区，所述显示区和所述非显示区均开设有过孔，其中，所述像素区在朝向显示侧的一侧设置有反射层，所述反射层用于反射所述阵列基板的外部光源以形成显示图像；
以及，所述显示区和所述非显示区的过孔的区域还至少设置有抗劣化层，所述抗劣化层与所述反射层接触、且相对所述反射层更远离外部光源。
优选的是，在所述显示区，所述抗劣化层和所述反射层具有相同的图形。
优选的是，所述抗劣化层采用钼、铌、钼钛合金中的任一种材料或组合材料形成。
优选的是，所述反射层采用铝、银、铝钕合金中的任一种材料或组合材料形成。
优选的是，每一所述像素区均设置有薄膜晶体管，所述反射层和所述抗劣化层与薄膜晶体管的漏极相连接。
一种阵列基板的制备方法，所述阵列基板包括显示区和位于所述显示区周边的非显示区，所述显示区包括多个像素区，所述显示区和所述非显示区均开设有过孔，其中，所述像素区在朝向显示侧的一侧形成有反射层，所述反射层用于反射所述阵列基板的外部光源以形成显示图像；
以及，所述显示区和所述非显示区的过孔的区域还至少形成有抗劣化层，所述抗劣化层与所述反射层接触、且相对所述反射层更远离外部光源。
优选的是，在所述显示区，所述抗劣化层和所述反射层具有相同的图形，且在同一构图工艺中形成。
优选的是，包括所述抗劣化层和所述反射层的图形，采用半色调掩模板或灰色调掩模板形成；其中：对应着所述显示区的像素区和过孔的区域为遮挡区域，对应着所述非显示区的过孔的区域为半曝光区域，其他区域为完全曝光区域。
优选的是，每一所述像素区均形成有薄膜晶体管，所述反射层和所述抗劣化层与薄膜晶体管的漏极相连接
一种显示装置，包括上述的阵列基板。
本发明的有益效果是：该阵列基板及其相应的制备方法，在不增加现掩膜工艺的情况下，通过采用新的材料提高外部光源利用率，实现对外部光源的完全反射显示；还实现了显示区、特别是非显示区的过孔搭接，防止过孔劣化和接触电阻不良，提高产品良率，提高显示品质。
附图说明
图1为本发明实施例1中的阵列基板的结构示意图图；
图2为本发明实施例1中阵列基板的制备工艺流程图；
图3为本发明实施例2中的阵列基板的结构示意图图；
图4为本发明实施例2中阵列基板的制备工艺流程图；
图5为本发明实施例3中显示装置的显示原理图；
图6为本发明实施例1中阵列基板包括显示区的过孔的俯视图；
附图标识中：
1-基板；2-栅极；3-栅绝缘层；4-有源层；5-源极；6-漏极；7-钝化层；8-透明电极层；9-抗劣化层；10-反射层；
11-掩模板；12-光刻胶；
21-显示区；22-非显示区；23-过孔；
31-彩膜基板；32-液晶；33-阵列基板。
具体实施方式
为使本领域技术人员更好地理解本发明的技术方案，下面结合附图和具体实施方式对本发明阵列基板的制备方法、阵列基板和显示装置作进一步详细描述。
本发明中，光刻工艺，是指包括曝光、显影、刻蚀等工艺过程的利用光刻胶、掩模板、曝光机等进行刻蚀形成图形的工艺；构图工艺，包括光刻工艺，还包括打印、喷墨等其他用于形成预定图形的工艺。
实施例1：
本实施例提供了一种全反射(Omni Directional Reflector，简称ODR)的显示面板，不仅能增加反射率，而且可以解决显示工艺和使用过程中的非显示区的过孔劣化和接触电阻增加的问题，提高显示品质。
该阵列基板包括显示区和位于显示区周边的非显示区，显示区包括多个像素区，显示区和非显示区均开设有过孔，如图1所示，该阵列基板的像素区在朝向显示侧的一侧设置有反射层10，反射层10用于反射阵列基板的外部光源以形成显示图像；以及，显示区21和非显示区22的过孔的区域均设置有抗劣化层9，抗劣化层9与反射层10接触、且相对反射层10更远离外部光源。
如图6所示，显示区21中的过孔23，通常开设在相邻像素区之间的区域(不属于像素区)，例如数据线、扫描线(图1和图6未具体标识)的上方。
其中，在显示区21，透明电极层8、抗劣化层9和反射层10具有相同的图形。
优选的是，抗劣化层9采用钼(Mo)、铌(Nb)、钼钛合金(MoTi)等稳定性较好的金属材料形成；反射层10采用铝(Al)、银(Ag)、铝钕合金(AlNd)等反射率较高的金属材料形成。
其中，每一像素区均设置有薄膜晶体管，反射层10和抗劣化层9与薄膜晶体管的漏极相连接，透明电极层8与反射层10和抗劣化层9相连接，也即使得透明电极层8、反射层10、抗劣化层9形成像素电极与薄膜晶体管的漏极相连接。
相应的，本实施例还提供一种阵列基板的制备方法，阵列基板包括显示区21和位于显示区21周边的非显示区22，显示区21包括多个像素区，显示区21和非显示区22均开设有过孔，其中，像素区在朝向显示侧的一侧形成有反射层10，反射层10用于反射阵列基板的外部光源以形成显示图像；以及，显示区21和非显示区22的过孔的区域均形成有抗劣化层9，抗劣化层9与反射层10接触、且相对反射层10更远离外部光源。
其中，在显示区21，抗劣化层9和反射层10具有相同的图形，且在同一构图工艺中形成。
优选的是，抗劣化层9和反射层10采用半色调掩模板或灰色调掩模板形成；其中：对应着显示区21的像素区和过孔的区域为遮挡区域，对应着非显示区22的过孔的区域为半曝光区域，其他区域为曝光区域。
该阵列基板的制备过程中，首先通过构图工艺制备形成薄膜晶体管作为控制元件，然后在薄膜晶体管的上方通过构图工艺制备形成至少包括抗劣化层9和反射层10的图形，反射层10和抗劣化层9与薄膜晶体管的漏极相连接，以对对应着像素区的液晶进行控制。
该阵列基板的制备工艺过程具体包括步骤：
步骤S11)：在基板1上方进行栅极材料层沉积(gate deposition)，采用普通掩模板(mask)对栅极材料层进行曝光、刻蚀(gate etch)，形成包括栅极2的图形，如图2A所示。
步骤S12)：形成栅绝缘层3，进行有源材料层(active deposition)和源漏材料层的沉积(SD deposition)，采用半色调掩模板(half tone mask)或灰色调掩模板(graytone mask)对源漏材料层进行曝光、刻蚀(SD etch)，形成包括源极5和漏极6的图形，并形成有源层4的图形、以在源极5和漏极6之间形成薄膜晶体管在导通过程中形成沟道(channel)的沟槽，如图2B所示。
通过以上步骤，完成薄膜晶体管的制备。在上述结构完成后，继续进行薄膜晶体管上方的层结构的制备，具体包括步骤：
步骤S13)：进行钝化层7的沉积(PVX deposition)，采用普通掩模板(normalmask)对钝化层7进行曝光，通过过孔(via hole)工艺，在显示区21和周边的非显示区22、扫描线和数据线上方形成过孔23，扫描线和公共电极线(common)上方形成的过孔23通过刻蚀栅绝缘层3和钝化层7两层形成，为深孔；数据线上方的过孔23通过刻蚀且仅刻蚀钝化层7形成，为浅孔，深孔和浅孔在显示区21和周边的非显示区22都存在，如图2C所示。
步骤S14)：依次先后进行透明电极材料层(ITO)、抗劣化金属层(Mo)和反射金属层(Al)的沉积，如图2D所示。
步骤S15)：进行透明电极材料层、抗劣化金属层和反射金属层曝光工艺流程。曝光工艺中，在光刻胶12的遮挡作用下，采用灰色调或半色调的掩模板11，对应着显示区21的像素区和过孔的区域为遮挡区域，对应着非显示区22的过孔的区域为半曝光区域，其他区域为完全曝光区域，从而实现周边的非显示区22对应着过孔的区域的半曝光，以及其他区域的正常曝光，如图2E所示。
步骤S16)：通过刻蚀(etch)工艺，将曝光区域的抗劣化金属层和反射金属层的膜层刻蚀掉，半曝光区域和遮挡区域部分因光刻胶12未曝光而得以保留，从而遮挡住抗劣化金属层和反射金属层的对应部分；然后通过干法刻蚀进行光刻胶12灰化(ashing)，控制参数(例如，采用SF6+O2作为刻蚀气体，控制灰化时间和灰化气体流量)，以将半曝光区域的光刻胶灰化完全，非曝光区域的光刻胶保留适量，如图2F所示。
步骤S17)：进行湿刻(wet etch)工艺，控制刻蚀时间(例如，以刻蚀掉反射金属层厚度的时间为基准稍过量刻蚀，以保证完全刻蚀掉金属)，将半曝光区域的反射金属层进行刻蚀，剩余ITO材料和Mo材料，形成包括透明电极层8、抗劣化层9和反射层10的图形，如图2G所示。
步骤S18)：将所有的光刻胶12剥离，如图2H所示。
该阵列基板，在显示区采用反射层实现光源反射，完成对盒后其中的过孔也被密封，从而与空气隔绝；在非显示区的过孔区域，连接膜层是通过ITO+Mo实现连接，更好的实现过孔接触；因为周边的非显示区与大气接触，采用ITO+Mo的设计可以更有效的防止腐蚀。另外，由于在显示区的各像素区，朝向显示侧的一侧均设置有反射层10，因此反射率大大增加，无需背光源而实现显示，可以省去背光源，实现无背光源全反射显示；当然，也可以在具备背光源的情况下通过反射层10来提高外部光源的利用率，实现半反半透显示。
本实施例中的阵列基板及其相应的制备方法，采用与现有技术不同的Mo+Al材料，一方面实现增加反射率，提高外部光源的利用率；另一方面可以避免非显示区域的过孔填充材料Al的氧化，以及过孔区域ITO的劣化导致的接触不良，并且无需增加额外的工艺步骤。
实施例2：
本实施例中的阵列基板与实施例1中的阵列基板的区别在于：如图3所示，本实施例中的阵列基板直接省略ITO材料形成透明电极层的结构，而仅采用反射层和抗劣化层形成像素电极实现与薄膜晶体管的漏极的连接。
参考图4A-图4H，该阵列基板的制备方法与实施例1的阵列基板的不同之处在于：
步骤S25)：在钝化层7沉积工艺后，先通过Via hole工艺，在显示区和周边的非显示区，栅极与数据线上方进行过孔，依次先后进行抗劣化金属层(Mo)和反射金属层(Al)的沉积，如图4D所示，而省略现有技术中作为像素电极的ITO材料；
相应的，在后续步骤中的结构中省略了对ITO材料层的构图工艺。其他结构与制备工艺与实施例1相应的结构和工艺相同，这里不再详述。
实施例1、实施例2中的阵列基板及其相应的制备方法，在不增加现掩膜工艺的情况下，通过采用新的材料提高外部光源利用率，还实现了显示区、特别是非显示区的过孔搭接，防止过孔劣化和接触电阻不良，提高产品良率。
实施例3：
本实施例提供一种显示装置，该显示装置包括实施例1-实施例2中任一的阵列基板，以及与该阵列基板相对设置的彩膜基板，彩膜基板和阵列基板之间设置有液晶。
如图5所示，该显示装置的工作原理为：外部光源从显示侧经彩膜基板31进入该显示装置，经过阵列基板33朝向彩膜基板32侧的反射层10完全反射出显示装置，无需背光源，在外界环境光的情况下即可实现显示。
该显示装置可以为：台式电脑、平板电脑、笔记本电脑、手机、PDA、GPS、车载显示、投影显示、摄像机、数码相机、电子手表、计算器、电子仪器、仪表、液晶面板、电子纸、电视机、显示器、数码相框、导航仪等任何具有显示功能的产品或部件，可应用于公共显示和虚幻显示等多个领域。
可以理解的是，以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式，然而本发明并不局限于此。对于本领域内的普通技术人员而言，在不脱离本发明的精神和实质的情况下，可以做出各种变型和改进，这些变型和改进也视为本发明的保护范围。

Claims (10)

1.一种阵列基板，包括显示区和位于所述显示区周边的非显示区，所述显示区包括多个像素区，所述显示区和所述非显示区均开设有过孔，其特征在于，所述像素区在朝向显示侧的一侧设置有反射层，所述反射层用于反射所述阵列基板的外部光源以形成显示图像；
以及，所述显示区和所述非显示区的过孔的区域还至少设置有抗劣化层，所述抗劣化层与所述反射层接触、且相对所述反射层更远离外部光源。
2.根据权利要求1所述的阵列基板，其特征在于，在所述显示区，所述抗劣化层和所述反射层具有相同的图形。
3.根据权利要求1所述的阵列基板，其特征在于，所述抗劣化层采用钼、铌、钼钛合金中的任一种材料或组合材料形成。
4.根据权利要求1所述的阵列基板，其特征在于，所述反射层采用铝、银、铝钕合金中的任一种材料或组合材料形成。
5.根据权利要求1-4任一项所述的阵列基板，其特征在于，每一所述像素区均设置有薄膜晶体管，所述反射层和所述抗劣化层与薄膜晶体管的漏极相连接。
6.一种阵列基板的制备方法，所述阵列基板包括显示区和位于所述显示区周边的非显示区，所述显示区包括多个像素区，所述显示区和所述非显示区均开设有过孔，其特征在于，所述像素区在朝向显示侧的一侧形成有反射层，所述反射层用于反射所述阵列基板的外部光源以形成显示图像；
以及，所述显示区和所述非显示区的过孔的区域还至少形成有抗劣化层，所述抗劣化层与所述反射层接触、且相对所述反射层更远离外部光源。
7.根据权利要求6所述的阵列基板的制备方法，其特征在于，在所述显示区，所述抗劣化层和所述反射层具有相同的图形，且在同一构图工艺中形成。
8.根据权利要求6所述的阵列基板的制备方法，其特征在于，包括所述抗劣化层和所述反射层的图形，采用半色调掩模板或灰色调掩模板形成；其中：对应着所述显示区的像素区和过孔的区域为遮挡区域，对应着所述非显示区的过孔的区域为半曝光区域，其他区域为完全曝光区域。
9.根据权利要求6所述的阵列基板的制备方法，其特征在于，每一所述像素区均形成有薄膜晶体管，所述反射层和所述抗劣化层与薄膜晶体管的漏极相连接。
10.一种显示装置，其特征在于，包括权利要求1-5任一项所述的阵列基板。
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