CN107491132B - Voltage-current converter circuit - Google Patents
Voltage-current converter circuit Download PDFInfo
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- CN107491132B CN107491132B CN201610407623.XA CN201610407623A CN107491132B CN 107491132 B CN107491132 B CN 107491132B CN 201610407623 A CN201610407623 A CN 201610407623A CN 107491132 B CN107491132 B CN 107491132B
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
Abstract
A kind of voltage-current converter circuit, the voltage-current converter circuit include: that initial voltage provides circuit and OTA circuit；The initial voltage provides circuit, is coupled between the feedback output end of the OTA circuit and the first NMOS tube of the OTA circuit, is suitable for when the OTA circuit is opened, the feedback output end for the OTA circuit provides an initial voltage；The OTA circuit, suitable for amplifying preset power supply voltage signal according to preset gain, to export the current signal for following preset triangular signal to be changed on the basis of the initial voltage.OTA circuit quickly following to triangular signal in voltage-current converter circuit may be implemented in above-mentioned scheme.
Description
Technical field
The present invention relates to technical field of integrated circuits, more particularly to a kind of voltage-current converter circuit.
Background technique
Voltage-current converter circuit is commonly used in current compensation circuit in the switching power circuit of current mode.Current compensation
Circuit can eliminate the subharmonic oscillation of switching power circuit, improve loop stability.Its main body of current compensation circuit is one
Trsanscondutance amplifier (Operational Transconductance Amplifier, OTA circuit) circuit.As compensation circuit,
OTA circuit needs to provide the electric current that triangular wave can be followed to change, and follows due to needing to realize triangular wave, it is desirable that with roomy
In the frequency of triangular signal.
In the prior art, the OTA circuit in voltage-current converter circuit, which takes a long time, is just able to achieve to described three
Angle signal wave current follows.
Summary of the invention
Technical problems to be solved of the embodiment of the present invention are how to realize that OTA circuit is to triangle in voltage-current converter circuit
Wave signal quickly follows.
To solve the above-mentioned problems, the embodiment of the present invention provides a kind of voltage-current converter circuit, comprising: initial voltage mentions
For circuit and OTA circuit；The initial voltage provides circuit, is coupled in the feedback output end and OTA electricity of the OTA circuit
Between first NMOS tube on road, it is suitable for when the OTA circuit is opened, the feedback output end for the OTA circuit is provided at the beginning of one
Beginning voltage；The OTA circuit, suitable for amplifying preset power supply voltage signal according to preset gain, described first
The current signal for following preset triangular signal to be changed is exported on the basis of beginning voltage；
Wherein, the OTA circuit includes: the first NMOS tube, third NMOS tube, the 4th NMOS tube to the 8th NMOS tube,
One POMS pipe to the tenth POMS is managed；The preset triangular signal is managed and the 4th in the 4th POMS pipe to the tenth POMS
Under NMOS tube to the synergy of the 8th NMOS tube, so that the voltage of the feedback output end of the OTA circuit is in initial voltage
On the basis of be gradually increasing；The first POMS pipe to the 3rd POMS pipe forms current mirroring circuit, and passes through the third NMOS tube
Grid and the OTA circuit feedback output end couple, the source electrode resistance grounded of the third NMOS tube；The initial electricity
One end that pressure provides circuit is grounded through first NMOS tube.
Optionally, it includes the second NMOS tube that the initial voltage, which provides circuit,；Second NMOS tube is with the shape of diode
Formula is coupled between the feedback output end of the OTA circuit and first NMOS tube.
Optionally, the voltage-current converter circuit further include: inverter circuit is suitable for being based on preset pulldown signal,
In the first pulldown signal that the output of preset first moment is opened for controlling first NMOS tube, and at preset second
Carve the second pulldown signal that the first PMOS tube is opened in the current mirroring circuit in the output control OTA circuit；When described first
It carves earlier than second moment.
Optionally, the inverter circuit includes the phase inverter of the first phase inverter, NAND gate and N number of series connection；It is described
The input terminal of first phase inverter and preset clock signal couple, and the first input end of output end and the NAND gate couples；Institute
The second input terminal and preset pulldown signal for stating NAND gate couple, and output end is defeated with the phase inverter of N number of series connection
Enter end coupling.
Optionally, the inverter circuit includes the first phase inverter, NAND gate, the second phase inverter, third phase inverter, the 4th
Phase inverter and delay circuit；The input terminal of first phase inverter and preset clock signal couple, output end with it is described with it is non-
The first input end coupling of door；Second input terminal of the NAND gate and preset pulldown signal couple, output end respectively with institute
State the input terminal of the second phase inverter and the grid end coupling of first NMOS tube；The output end of second phase inverter with it is described
The input terminal of third phase inverter couples, and couples with the input terminal of the delay circuit, the output end of the delay circuit and described
The input terminal of 4th phase inverter couples；The output end of 4th phase inverter and first PMOS tube couple.
Optionally, the delay circuit is the RC delay circuit for including resistance and capacitor；The first end of the resistance and institute
State the output end coupling of third phase inverter, the second end positive coupling with the input terminal of the 4th phase inverter and the capacitor respectively
It connects；The cathode of the capacitor and preset ground voltage couple.
Optionally, the delay duration of the RC delay circuit is related to the resistance and capacitor.
Optionally, the value range of the initial voltage is 0.5V to 0.8V.
Optionally, the initial voltage is 0.7V.
Compared with prior art, technical solution of the present invention has the advantages that
Above-mentioned scheme provides circuit by initial voltage, can open in the OTA circuit in voltage-current converter circuit
When, a preset initial voltage is provided for its feedback output end, so that the voltage of the feedback output end of OTA circuit can be
Fast lifting is carried out on the basis of the predeterminated voltage, and the voltage of OTA electronic feedback output end may be implemented to preset triangle
Wave signal quickly follows.
Further, further include inverter circuit in the voltage-current converter circuit, the first pulldown signal of output and
Second pulldown signal can control the first NMOS tube in OTA circuit and beat prior to the first PMOS tube in the current mirror of OTA circuit
It opens, so as to the voltage of the first PMOS tube be pulled down, so as to prevent the first PMOS when the first PMOS tube is opened
The voltage overshoot of pipe, thus the safety and reliability of circuit can be improved.
It further, include RC delay circuit in the inverter circuit, it is possible to reduce phase inverter in inverter circuit
Number, and improve the accuracy of delays time to control.
Detailed description of the invention
Fig. 1 is the circuit diagram of the voltage-current converter circuit in the embodiment of the present invention；
Fig. 2 is the simulation result schematic diagram of the output voltage of the feedback output end of the OTA circuit in the embodiment of the present invention；
Fig. 3 is the simulation result schematic diagram of the output voltage of the feedback output end of OTA circuit in the prior art；
Fig. 4 is the structural schematic diagram of one of embodiment of the present invention inverter circuit；
Fig. 5 is the structural schematic diagram of another inverter circuit in the embodiment of the present invention.
Specific embodiment
Voltage and current compensation circuit in the prior art includes voltage-current converter circuit, and voltage-current converter circuit is in electricity
It is typically applied in current compensation circuit in the switching power circuit of flow pattern.Current compensation circuit can eliminate switching power circuit
Subharmonic oscillation, improve loop stability.Current compensation circuit as compensation circuit needs to provide one and follows triangular wave
The current signal of variation follows, it is desirable that band is wider than triangular current signal due to needing to realize triangular current signal
Frequency.
Current compensation circuit in the prior art includes OTA circuit, its working principle is that by unit gain negative-feedback, it is real
The voltage follow triangular signal variation of the feedback output end of existing OTA circuit.Due to being a triangular signal, so circuit
The voltage of feedback output end exists in the form of triangular wave.The electricity being connected between the ground voltage of the feedback output end of OTA circuit
The electric current at the both ends of resistance is VRAMP/R14, and is changed with triangular wave patterns, and VRAMP therein is the number of the triangular signal
Value, R14 are the resistance value of resistance.Size is that VRAMP/R14 electric current is amplified by the current mirroring circuit in OTA circuit 101, is used
It is compensated in artificial slope.
In specific implementation, for save the cost, the lining for the NMOS tube that the feedback output end of grid end and OTA circuit is coupled
Bottom is connected to the ground, to save deep N-well layer, because the lining drain voltage VBS of grid end and the NMOS tube of the feedback output end of OTA circuit is not
Zero, so that its threshold voltage is greater than normal threshold voltage, so that the output voltage for being also required to OTA circuit is higher.Because artificial oblique
Slope compensation is just worked in the unlatching each time of Switching Power Supply, it requires the voltage of the feedback output end output of OTA circuit
It needs that triangular signal is quickly followed and worked normally.
But the voltage of the feedback output end of OTA circuit in the prior art output usually requires longer time and just may be used
Triangular signal is followed with realizing, there is slow-footed problem is followed, has seriously affected voltage-current converter circuit
Performance.
To solve the above problems, the technical solution of the embodiment of the present invention provides circuit by initial voltage, it can be in voltage
When OTA circuit in current converter circuit is opened, a preset initial voltage is provided for its feedback output end, so that OTA
The voltage of the feedback output end of circuit can carry out fast lifting on the basis of the predeterminated voltage, to realize OTA circuit
The voltage of feedback output end is quickly followed to preset triangular signal.
It is understandable to enable above-mentioned purpose of the invention, feature and beneficial effect to become apparent, with reference to the accompanying drawing to this
The specific embodiment of invention is described in detail.
Fig. 1 is the structural schematic diagram of one of embodiment of the present invention voltage-current converter circuit.Fig. 1 is please referred to, is being had
During body is implemented, the voltage-current converter circuit in the embodiment of the present invention may include that OTA circuit 101 and initial voltage provide circuit
102。
Wherein, initial voltage offer circuit 102 is coupled in feedback output end OUT and the OTA circuit 101 of OTA circuit 101
It, can be when OTA circuit 101 be opened, at the beginning of the feedback output end OUT output one in OTA circuit 101 between first NMOS tube NM1
Beginning voltage, preset triangular signal VRAMP therein pass through the 4th POMS pipe PM4 to the tenth POMS pipe PM10 and the 4th
Under NMOS tube NM4 to the synergy of the devices such as the 8th NMOS tube NM8, so that the voltage of 101 feedback output end OUT of OTA circuit
It is gradually increasing on the basis of initial voltage, to reach quickly following to preset triangular signal VRAMP.
In specific implementation, the value of the initial voltage can be configured according to the actual needs, such as described initial
The value range of voltage can be 0.5V to 0.8V.In an embodiment of the present invention, the initial voltage is 0.7V.
In an embodiment of the present invention, it is the 2nd NOMS pipe NM2 that initial voltage, which provides circuit 102,.Wherein, the 2nd NOMS is managed
NM2 with diode be coupled in OTA circuit 101 feedback output end OUT and OTA circuit 101 the first NOMS pipe NM1 it
Between.
Wherein, the working principle of voltage-current converter circuit as shown in Figure 1 is as follows:
When power vd D is not opened, the 2nd NOMS pipe NM2 exports one or two poles in the feedback output end OUT of OTA circuit 101
Tube voltage, as initial voltage.Simultaneously as the lining drain voltage VBS of the third NMOS tube NM3 in OTA circuit 101 is not zero,
And deep N-well is not used in third NMOS tube NM3, so that the threshold voltage of third NMOS tube NM3 is larger, and the 2nd NOMS pipe NM2 exists
The initial voltage that the feedback output end OUT of OTA circuit 101 is generated is not enough to open third NMOS tube NM3.Meanwhile current mirror
In the second PMOS tube PM1 and third PMOS tube PM2 grid end voltage be high level, thus by under the voltage of current mirroring circuit
It draws.
When power vd D electric power starting, the first NMOS of low level control is set to by the grid end voltage of NMOS tube NM1 first
Pipe NM1 is disconnected, and the voltage of the feedback output end OUT of OTA circuit 101 slowly rises on the basis of initial voltage, the first PMOS
The weak current of pipe PM1 flows through third NMOS tube NM3.At this point, the first PMOS tube PM1 in current mirroring circuit is disconnected, entirely
Circuit enters Voltage to current transducer process.Since the feedback output end OUT of OTA circuit 101 is basic electric when OTA circuit is opened
Pressure is the initial voltage, so that this allows OTA circuit to enter following state at once, specific following state please join
See Fig. 2 and Fig. 3.
Fig. 2 shows the outputs of the feedback output end of OTA circuit in the voltage-current converter circuit in the embodiment of the present invention
Simulation result, Fig. 3 shows the output of the feedback output end of OTA circuit in voltage-current converter circuit in the prior art
Simulation result.It can be seen that the output needs of the feedback output end OUT of OTA circuit in the prior art compared with Fig. 3 from Fig. 2
Time more than 100ns completes to follow triangular signal, there is slow-footed problem is followed, affects the property of circuit
Energy；And the OTA circuit 101 in the embodiment of the present invention feedback output end OUT output voltage voltage-current converter circuit just
The moment often to work enters the following state to triangular signal VRAMP, this will substantially reduce OTA circuit output and follow
The settling time of triangular signal.Meanwhile because third NMOS tube NM3 does not use deep N-well, it can make third NMOS tube NM3's
Threshold voltage increases, so that the initial voltage that initial voltage provides circuit output can not open third NMOS tube NM3, it can
To save cost, and shorten the time that OTA circuit enters following state.
In an embodiment of the present invention, the grid end voltage of the PMOS tube of current mirroring circuit occurs in OTA circuit in order to prevent
Overshoot can carry out delay to preset pulldown signal by inverter circuit and generate preset first pulldown signal and preset
Second pulldown signal, control OTA circuit in the first NMOS tube prior in current mirror the second PMOS tube and third PMOS tube beat
Open, in current mirror the second PMOS tube and third PMOS tube open when, by the grid end of the second PMOS tube and third PMOS tube
Voltage is pulled down, and Fig. 4 is specifically referred to.
Refer to Fig. 4 and combine Fig. 1, in an embodiment of the present invention, inverter circuit include the first phase inverter A1, with it is non-
The phase inverter A of door NAND and N number of series connection1~AN.Wherein, the input terminal of the first phase inverter A1 and preset clock signal CP
The first input end of coupling, output end and NAND gate NAND couple, and the second input terminal of NAND gate NAND and preset drop-down are believed
Number PDn coupling, the phase inverter A of output end and N number of series connection1~ANInput terminal coupling.
Wherein, preset clock signal CP is exported after the first phase inverter A1 carries out reverse phase to the of NAND gate NAND
The pulldown signal PDn of one output end, control access the second input terminal of NAND gate NAND is exporting tool after NOT gate NAND processing
There is the first pulldown signal SLnn of a fixed response time.The coupling of the grid end of first pulldown signal SLnn and the NM1 of the first NMOS tube, thus
The first NMOS tube NM1 is controlled to open at preset first moment.
Meanwhile first pulldown signal SLnn pass through the phase inverter A of N number of series connection in inverter circuit again1~ANRespectively
Delay process is carried out, in phase inverter ANOutput end output second pull down signal SL.Second pulls down signal SL by controlling OTA electricity
The unlatching of the first PMOS tube PM1 in road 101, so that the second PMOS tube PM2 in current mirroring circuit in OTA circuit 101
It is opened with third PMOS tube at preset second moment.M is the integer less than or equal to N, and the numerical value of M can be according to actual
Control needs to be configured.
It is the phase inverter A by N number of series connection since the second pulldown signal SL is by the first pulldown signal SLnn1~AN
Respectively carry out delay process obtain so that grid end and the first pulldown signal SLnn coupling the first NMOS tube NM1 earlier than
PMOS tube in circuit mirror circuit, i.e. the second PMOS tube PM2 and third PMOS tube PM3 are opened, thus in the second PMOS tube PM2 and
It when third PMOS tube PM3 is opened, can will be pulled down in the voltage of the second PMOS tube PM2 and third PMOS tube PM3, avoid the
There is voltage overshoot in the grid end of two PMOS tube PM2 and third PMOS tube PM3, to improve the safety and reliability of circuit work.
In an embodiment of the present invention, in order to simplify the structure of inverter circuit, the precise control of postpones signal is improved,
By using RC delay circuit in inverter circuit, to reduce the quantity of phase inverter used in inverter circuit, and improve
Carryover effects specifically refer to Fig. 5.
Refer to Fig. 5 and combine Fig. 1, in an embodiment of the present invention, inverter circuit include the first phase inverter A1, with it is non-
Door NAND, the second phase inverter A2, third phase inverter A3, the 4th phase inverter A4 and delay circuit 501.Wherein, the first phase inverter A1
Input terminal and preset clock signal CP couple, the first input end of output end and NAND gate NAND couple, NAND gate NAND
The second input terminal and preset pulldown signal PDn couple, the output end input terminal and first with the second phase inverter A2 respectively
The grid end of NMOS tube NM1 couples, and the output end of the second phase inverter A2 and the input terminal of third phase inverter A3 couple, third phase inverter
The output end of A3 is coupled with the input terminal of delay circuit 501 respectively, the output end and the 4th phase inverter A4 of the delay circuit 501
Input terminal coupling, the first PMOS tube PM1 coupling in the output end of the 4th phase inverter A4 and the current mirroring circuit of OTA circuit 101
It connects.
In an embodiment of the present invention, delay circuit 501 is RC delay circuit.Wherein, RC delay circuit include resistance R and
The first end of capacitor C, resistance R and the output end of third phase inverter A3 couple, the second end input with the 4th phase inverter A4 respectively
The anode coupling at end and capacitor C, the cathode of capacitor C and preset ground voltage AVSS are coupled.
Pass through and RC delay circuit be added in inverter circuit, it is possible to reduce phase inverter number in inverter circuit it is same
When, improve carryover effects.
In specific implementation, the delay time of RC delay circuit is T=RC, the electricity of the resistance R by changing delay circuit
Corresponding delay time is adjusted in the capacitance of resistance value and capacitor C, to realize the setting of different delays time.
The working principle of other devices refers to the introduction of Fig. 4 corresponding portion in inverter circuit shown in fig. 5, herein not
It repeats again.
Above-mentioned scheme provides circuit by initial voltage, can open in the OTA circuit in voltage-current converter circuit
When, a preset initial voltage is provided for its feedback output end, so that the voltage of OTA circuit output end can be described pre-
If carrying out fast lifting on the basis of voltage, the voltage of OTA circuit output end may be implemented to the fast of preset triangular signal
Speed follows.
Although present disclosure is as above, present invention is not limited to this.Anyone skilled in the art are not departing from this
It in the spirit and scope of invention, can make various changes or modifications, therefore protection scope of the present invention should be with claim institute
Subject to the range of restriction.
Claims (9)
1. a kind of voltage-current converter circuit characterized by comprising initial voltage provides circuit and OTA circuit；
The initial voltage provides circuit, is coupled in the feedback output end of the OTA circuit and the first NMOS of the OTA circuit
Between pipe, it is suitable for when the OTA circuit is opened, the feedback output end for the OTA circuit provides an initial voltage；
The OTA circuit, suitable for amplifying preset power supply voltage signal according to preset gain when opening, in institute
State the current signal for exporting on the basis of initial voltage and preset triangular signal being followed to be changed；
Wherein, the OTA circuit includes: the first NMOS tube, third NMOS tube, the 4th NMOS tube to the 8th NMOS tube, first
POMS pipe is managed to the tenth POMS；
The grid end and the first pulldown signal of first NMOS tube couple, and drain terminal and the initial voltage provide circuit coupling, source
End provides circuit coupling with preset ground voltage and the initial voltage；
The grid end and drain terminal of the third NMOS tube are coupled with the feedback output end of the OTA circuit, and source is preset with described
Ground voltage coupling；
4th NMOS tube to the 8th NMOS tube source is coupled with the preset ground voltage；
The drain terminal and grid end of 4th NMOS tube, the grid with the feedback output end of the OTA circuit, the 5th NMOS tube
The drain terminal coupling of end and drain terminal, the 8th NMOS tube；
The grid end and drain terminal of 5th NMOS tube are also coupled with the drain terminal of the 4th PMOS tube；
The drain terminal and grid end of 6th NMOS tube, the drain terminal with the grid end of the 7th NMOS tube, the 5th PMOS tube
Coupling；
The drain terminal of 7th NMOS tube is coupled with the drain terminal and grid end of the 9th PMOS tube；
The grid end of 8th NMOS tube and a signal couple, and source and the preset ground voltage couple；
The grid end and drain terminal of the tenth POMS pipe, the drain terminal coupling with the preset ground voltage and the 8th PMOS tube
It connects, source and the supply coupling；
The grid end and drain terminal of 9th PMOS tube are coupled with the grid end of the 11st PMOS tube；
The feedback output end of the source of 11st PMOS tube and the supply coupling, drain terminal and the OTA circuit couples；
The grid end of the source of 8th PMOS tube and the supply coupling, drain terminal and the 6th PMOS tube couples；
The drain terminal of 7th PMOS tube and the grid end of the 11st PMOS tube couple；
The source of 6th PMOS tube and the supply coupling, the source and the described 4th of drain terminal and the 5th PMOS tube
The source of PMOS tube couples；
The grid end of 5th PMOS tube and the source of the third NMOS tube couple；
The grid end of 4th PMOS tube and the preset triangular signal couple；
The source of second PMOS tube, the source of third PMOS tube with the supply coupling；The grid of second PMOS tube
End and drain terminal, the grid with the drain terminal of the third NMOS tube, the drain terminal of first PMOS tube and the third PMOS tube
End coupling；
The grid end and the second pulldown signal of first PMOS tube couple, source and the supply coupling.
2. voltage-current converter circuit according to claim 1, which is characterized in that the initial voltage provides circuit and includes
Second NMOS tube；
Second NMOS tube be coupled in the form of diode the OTA circuit feedback output end and first NMOS tube
Drain terminal between.
3. voltage-current converter circuit according to claim 2, which is characterized in that further include:
Inverter circuit is suitable for being based on the preset pulldown signal, in the output of preset first moment for controlling described the
The first pulldown signal that one NMOS tube is opened, and output controls the first PMOS tube in the OTA circuit at preset second moment
Second pulldown signal opened；First moment is earlier than second moment.
4. voltage-current converter circuit according to claim 3, which is characterized in that the inverter circuit includes first anti-
The phase inverter of phase device, NAND gate and N number of series connection；
The input terminal of first phase inverter and preset clock signal couple, the first input end of output end and the NAND gate
Coupling；
Second input terminal of the NAND gate and the preset pulldown signal couple, output end and N number of series connection
The input terminal of phase inverter couples.
5. voltage-current converter circuit according to claim 3, which is characterized in that the inverter circuit includes first anti-
Phase device, NAND gate, the second phase inverter, third phase inverter, the 4th phase inverter and delay circuit；
The input terminal of first phase inverter and preset clock signal couple, the first input end of output end and the NAND gate
Coupling；
Second input terminal of the NAND gate and the preset pulldown signal couple, output end respectively with second phase inverter
Input terminal and first NMOS tube grid end coupling；
The input terminal of the output end of second phase inverter and the third phase inverter couples, the output end of the third phase inverter
It is coupled with the input terminal of the delay circuit, the input terminal coupling of the output end of the delay circuit and the 4th phase inverter；
The output end of 4th phase inverter and the grid end of first PMOS tube couple.
6. voltage-current converter circuit according to claim 5, which is characterized in that the delay circuit be include resistance and
The RC delay circuit of capacitor；
The output end of the first end of the resistance and the third phase inverter couples, second end respectively with the 4th phase inverter
The anode coupling of input terminal and the capacitor；
The cathode of the capacitor and preset ground voltage couple.
7. voltage-current converter circuit according to claim 6, which is characterized in that the delay duration of the RC delay circuit
It is related to the resistance and capacitor.
8. voltage-current converter circuit according to claim 1, which is characterized in that the value range of the initial voltage is
0.5V to 0.8V.
9. voltage-current converter circuit according to claim 8, which is characterized in that the initial voltage is 0.7V.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610407623.XA CN107491132B (en) | 2016-06-12 | 2016-06-12 | Voltage-current converter circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610407623.XA CN107491132B (en) | 2016-06-12 | 2016-06-12 | Voltage-current converter circuit |
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| CN107491132B true CN107491132B (en) | 2019-11-05 |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| EP3514953B1 (en) * | 2018-01-19 | 2021-03-03 | Socionext Inc. | Voltage-to-current conversion |
| US11323085B2 (en) * | 2019-09-04 | 2022-05-03 | Analog Devices International Unlimited Company | Voltage-to-current converter with complementary current mirrors |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4835487A (en) * | 1988-04-14 | 1989-05-30 | Motorola, Inc. | MOS voltage to current converter |
| US5047729A (en) * | 1989-12-01 | 1991-09-10 | Deutsche Itt Industries Gmbh | Transconductance amplifier |
| CN101034873A (en) * | 2007-02-02 | 2007-09-12 | 清华大学 | Lower voltage conductor-spanning amplifier capable of improving the linearity and input range |
| CN103326682A (en) * | 2013-05-27 | 2013-09-25 | 苏州贝克微电子有限公司 | Adjustable operational transconductance amplifier with high linearity |
| CN105406829A (en) * | 2015-12-03 | 2016-03-16 | 中国科学院电子学研究所 | Variable gain amplifier with continuously adjustable gain |
-
2016
- 2016-06-12 CN CN201610407623.XA patent/CN107491132B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4835487A (en) * | 1988-04-14 | 1989-05-30 | Motorola, Inc. | MOS voltage to current converter |
| US5047729A (en) * | 1989-12-01 | 1991-09-10 | Deutsche Itt Industries Gmbh | Transconductance amplifier |
| CN101034873A (en) * | 2007-02-02 | 2007-09-12 | 清华大学 | Lower voltage conductor-spanning amplifier capable of improving the linearity and input range |
| CN103326682A (en) * | 2013-05-27 | 2013-09-25 | 苏州贝克微电子有限公司 | Adjustable operational transconductance amplifier with high linearity |
| CN105406829A (en) * | 2015-12-03 | 2016-03-16 | 中国科学院电子学研究所 | Variable gain amplifier with continuously adjustable gain |
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| CN107491132A (en) | 2017-12-19 |
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